xref: /OK3568_Linux_fs/kernel/scripts/dtc/include-prefixes/arm64/amlogic/meson-gxl-s905x-nexbox-a95x.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Copyright (c) 2016 Andreas Färber
4*4882a593Smuzhiyun * Copyright (c) 2016 BayLibre, Inc.
5*4882a593Smuzhiyun * Author: Neil Armstrong <narmstrong@kernel.org>
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun/dts-v1/;
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun#include "meson-gxl-s905x.dtsi"
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun/ {
13*4882a593Smuzhiyun	compatible = "nexbox,a95x", "amlogic,s905x", "amlogic,meson-gxl";
14*4882a593Smuzhiyun	model = "NEXBOX A95X (S905X)";
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun	aliases {
17*4882a593Smuzhiyun		serial0 = &uart_AO;
18*4882a593Smuzhiyun		ethernet0 = &ethmac;
19*4882a593Smuzhiyun	};
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun	chosen {
22*4882a593Smuzhiyun		stdout-path = "serial0:115200n8";
23*4882a593Smuzhiyun	};
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun	memory@0 {
26*4882a593Smuzhiyun		device_type = "memory";
27*4882a593Smuzhiyun		reg = <0x0 0x0 0x0 0x80000000>;
28*4882a593Smuzhiyun	};
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun	vddio_card: gpio-regulator {
31*4882a593Smuzhiyun		compatible = "regulator-gpio";
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun		regulator-name = "VDDIO_CARD";
34*4882a593Smuzhiyun		regulator-min-microvolt = <1800000>;
35*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun		gpios = <&gpio_ao GPIOAO_5 GPIO_ACTIVE_HIGH>;
38*4882a593Smuzhiyun		gpios-states = <1>;
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun		/* Based on P200 schematics, signal CARD_1.8V/3.3V_CTR */
41*4882a593Smuzhiyun		states = <1800000 0>,
42*4882a593Smuzhiyun			 <3300000 1>;
43*4882a593Smuzhiyun	};
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun	vddio_boot: regulator-vddio_boot {
46*4882a593Smuzhiyun		compatible = "regulator-fixed";
47*4882a593Smuzhiyun		regulator-name = "VDDIO_BOOT";
48*4882a593Smuzhiyun		regulator-min-microvolt = <1800000>;
49*4882a593Smuzhiyun		regulator-max-microvolt = <1800000>;
50*4882a593Smuzhiyun	};
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun	vddao_3v3: regulator-vddao_3v3 {
53*4882a593Smuzhiyun		compatible = "regulator-fixed";
54*4882a593Smuzhiyun		regulator-name = "VDDAO_3V3";
55*4882a593Smuzhiyun		regulator-min-microvolt = <3300000>;
56*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
57*4882a593Smuzhiyun	};
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun	vcc_3v3: regulator-vcc_3v3 {
60*4882a593Smuzhiyun		compatible = "regulator-fixed";
61*4882a593Smuzhiyun		regulator-name = "VCC_3V3";
62*4882a593Smuzhiyun		regulator-min-microvolt = <3300000>;
63*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
64*4882a593Smuzhiyun	};
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun	emmc_pwrseq: emmc-pwrseq {
67*4882a593Smuzhiyun		compatible = "mmc-pwrseq-emmc";
68*4882a593Smuzhiyun		reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
69*4882a593Smuzhiyun	};
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun	wifi32k: wifi32k {
72*4882a593Smuzhiyun		compatible = "pwm-clock";
73*4882a593Smuzhiyun		#clock-cells = <0>;
74*4882a593Smuzhiyun		clock-frequency = <32768>;
75*4882a593Smuzhiyun		pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */
76*4882a593Smuzhiyun	};
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun	sdio_pwrseq: sdio-pwrseq {
79*4882a593Smuzhiyun		compatible = "mmc-pwrseq-simple";
80*4882a593Smuzhiyun		reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>;
81*4882a593Smuzhiyun		clocks = <&wifi32k>;
82*4882a593Smuzhiyun		clock-names = "ext_clock";
83*4882a593Smuzhiyun	};
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun	cvbs-connector {
86*4882a593Smuzhiyun		compatible = "composite-video-connector";
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun		port {
89*4882a593Smuzhiyun			cvbs_connector_in: endpoint {
90*4882a593Smuzhiyun				remote-endpoint = <&cvbs_vdac_out>;
91*4882a593Smuzhiyun			};
92*4882a593Smuzhiyun		};
93*4882a593Smuzhiyun	};
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun	hdmi-connector {
96*4882a593Smuzhiyun		compatible = "hdmi-connector";
97*4882a593Smuzhiyun		type = "a";
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun		port {
100*4882a593Smuzhiyun			hdmi_connector_in: endpoint {
101*4882a593Smuzhiyun				remote-endpoint = <&hdmi_tx_tmds_out>;
102*4882a593Smuzhiyun			};
103*4882a593Smuzhiyun		};
104*4882a593Smuzhiyun	};
105*4882a593Smuzhiyun};
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun&cec_AO {
108*4882a593Smuzhiyun	status = "okay";
109*4882a593Smuzhiyun	pinctrl-0 = <&ao_cec_pins>;
110*4882a593Smuzhiyun	pinctrl-names = "default";
111*4882a593Smuzhiyun	hdmi-phandle = <&hdmi_tx>;
112*4882a593Smuzhiyun};
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun&cvbs_vdac_port {
115*4882a593Smuzhiyun	cvbs_vdac_out: endpoint {
116*4882a593Smuzhiyun		remote-endpoint = <&cvbs_connector_in>;
117*4882a593Smuzhiyun	};
118*4882a593Smuzhiyun};
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun&ethmac {
121*4882a593Smuzhiyun	status = "okay";
122*4882a593Smuzhiyun	phy-mode = "rmii";
123*4882a593Smuzhiyun	phy-handle = <&internal_phy>;
124*4882a593Smuzhiyun};
125*4882a593Smuzhiyun
126*4882a593Smuzhiyun&hdmi_tx {
127*4882a593Smuzhiyun	status = "okay";
128*4882a593Smuzhiyun	pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>;
129*4882a593Smuzhiyun	pinctrl-names = "default";
130*4882a593Smuzhiyun};
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun&hdmi_tx_tmds_port {
133*4882a593Smuzhiyun	hdmi_tx_tmds_out: endpoint {
134*4882a593Smuzhiyun		remote-endpoint = <&hdmi_connector_in>;
135*4882a593Smuzhiyun	};
136*4882a593Smuzhiyun};
137*4882a593Smuzhiyun
138*4882a593Smuzhiyun&ir {
139*4882a593Smuzhiyun	status = "okay";
140*4882a593Smuzhiyun	pinctrl-0 = <&remote_input_ao_pins>;
141*4882a593Smuzhiyun	pinctrl-names = "default";
142*4882a593Smuzhiyun};
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun&pwm_ef {
145*4882a593Smuzhiyun	status = "okay";
146*4882a593Smuzhiyun	pinctrl-0 = <&pwm_e_pins>;
147*4882a593Smuzhiyun	pinctrl-names = "default";
148*4882a593Smuzhiyun	clocks = <&clkc CLKID_FCLK_DIV4>;
149*4882a593Smuzhiyun	clock-names = "clkin0";
150*4882a593Smuzhiyun};
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun/* Wireless SDIO Module */
153*4882a593Smuzhiyun&sd_emmc_a {
154*4882a593Smuzhiyun	status = "okay";
155*4882a593Smuzhiyun	pinctrl-0 = <&sdio_pins>;
156*4882a593Smuzhiyun	pinctrl-1 = <&sdio_clk_gate_pins>;
157*4882a593Smuzhiyun	pinctrl-names = "default", "clk-gate";
158*4882a593Smuzhiyun	#address-cells = <1>;
159*4882a593Smuzhiyun	#size-cells = <0>;
160*4882a593Smuzhiyun
161*4882a593Smuzhiyun	bus-width = <4>;
162*4882a593Smuzhiyun	cap-sd-highspeed;
163*4882a593Smuzhiyun	max-frequency = <100000000>;
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun	non-removable;
166*4882a593Smuzhiyun	disable-wp;
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun	/* WiFi firmware requires power to be kept while in suspend */
169*4882a593Smuzhiyun	keep-power-in-suspend;
170*4882a593Smuzhiyun
171*4882a593Smuzhiyun	mmc-pwrseq = <&sdio_pwrseq>;
172*4882a593Smuzhiyun
173*4882a593Smuzhiyun	vmmc-supply = <&vddao_3v3>;
174*4882a593Smuzhiyun	vqmmc-supply = <&vddio_boot>;
175*4882a593Smuzhiyun};
176*4882a593Smuzhiyun
177*4882a593Smuzhiyun/* SD card */
178*4882a593Smuzhiyun&sd_emmc_b {
179*4882a593Smuzhiyun	status = "okay";
180*4882a593Smuzhiyun	pinctrl-0 = <&sdcard_pins>;
181*4882a593Smuzhiyun	pinctrl-1 = <&sdcard_clk_gate_pins>;
182*4882a593Smuzhiyun	pinctrl-names = "default", "clk-gate";
183*4882a593Smuzhiyun
184*4882a593Smuzhiyun	bus-width = <4>;
185*4882a593Smuzhiyun	cap-sd-highspeed;
186*4882a593Smuzhiyun	max-frequency = <50000000>;
187*4882a593Smuzhiyun	disable-wp;
188*4882a593Smuzhiyun
189*4882a593Smuzhiyun	cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>;
190*4882a593Smuzhiyun
191*4882a593Smuzhiyun	vmmc-supply = <&vddao_3v3>;
192*4882a593Smuzhiyun	vqmmc-supply = <&vddio_card>;
193*4882a593Smuzhiyun};
194*4882a593Smuzhiyun
195*4882a593Smuzhiyun/* eMMC */
196*4882a593Smuzhiyun&sd_emmc_c {
197*4882a593Smuzhiyun	status = "okay";
198*4882a593Smuzhiyun	pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>;
199*4882a593Smuzhiyun	pinctrl-1 = <&emmc_clk_gate_pins>;
200*4882a593Smuzhiyun	pinctrl-names = "default", "clk-gate";
201*4882a593Smuzhiyun
202*4882a593Smuzhiyun	bus-width = <8>;
203*4882a593Smuzhiyun	cap-mmc-highspeed;
204*4882a593Smuzhiyun	max-frequency = <200000000>;
205*4882a593Smuzhiyun	non-removable;
206*4882a593Smuzhiyun	disable-wp;
207*4882a593Smuzhiyun	mmc-ddr-1_8v;
208*4882a593Smuzhiyun	mmc-hs200-1_8v;
209*4882a593Smuzhiyun
210*4882a593Smuzhiyun	mmc-pwrseq = <&emmc_pwrseq>;
211*4882a593Smuzhiyun	vmmc-supply = <&vcc_3v3>;
212*4882a593Smuzhiyun	vqmmc-supply = <&vddio_boot>;
213*4882a593Smuzhiyun};
214*4882a593Smuzhiyun
215*4882a593Smuzhiyun&uart_AO {
216*4882a593Smuzhiyun	status = "okay";
217*4882a593Smuzhiyun	pinctrl-0 = <&uart_ao_a_pins>;
218*4882a593Smuzhiyun	pinctrl-names = "default";
219*4882a593Smuzhiyun};
220*4882a593Smuzhiyun
221*4882a593Smuzhiyun&usb {
222*4882a593Smuzhiyun	status = "okay";
223*4882a593Smuzhiyun	dr_mode = "host";
224*4882a593Smuzhiyun};
225