1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Copyright (c) 2017 Carlo Caione 4*4882a593Smuzhiyun * Copyright (c) 2016 BayLibre, Inc. 5*4882a593Smuzhiyun * Author: Neil Armstrong <narmstrong@kernel.org> 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun/dts-v1/; 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun#include "meson-gxl-s905x.dtsi" 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun/ { 13*4882a593Smuzhiyun compatible = "hwacom,amazetv", "amlogic,s905x", "amlogic,meson-gxl"; 14*4882a593Smuzhiyun model = "Hwacom AmazeTV (S905X)"; 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun aliases { 17*4882a593Smuzhiyun serial0 = &uart_AO; 18*4882a593Smuzhiyun ethernet0 = ðmac; 19*4882a593Smuzhiyun }; 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun chosen { 22*4882a593Smuzhiyun stdout-path = "serial0:115200n8"; 23*4882a593Smuzhiyun }; 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun memory@0 { 26*4882a593Smuzhiyun device_type = "memory"; 27*4882a593Smuzhiyun reg = <0x0 0x0 0x0 0x80000000>; 28*4882a593Smuzhiyun }; 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun vddio_card: gpio-regulator { 31*4882a593Smuzhiyun compatible = "regulator-gpio"; 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun regulator-name = "VDDIO_CARD"; 34*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 35*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun gpios = <&gpio_ao GPIOAO_5 GPIO_ACTIVE_HIGH>; 38*4882a593Smuzhiyun gpios-states = <1>; 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun /* Based on P200 schematics, signal CARD_1.8V/3.3V_CTR */ 41*4882a593Smuzhiyun states = <1800000 0>, 42*4882a593Smuzhiyun <3300000 1>; 43*4882a593Smuzhiyun }; 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun vddio_boot: regulator-vddio_boot { 46*4882a593Smuzhiyun compatible = "regulator-fixed"; 47*4882a593Smuzhiyun regulator-name = "VDDIO_BOOT"; 48*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 49*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 50*4882a593Smuzhiyun }; 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun vddao_3v3: regulator-vddao_3v3 { 53*4882a593Smuzhiyun compatible = "regulator-fixed"; 54*4882a593Smuzhiyun regulator-name = "VDDAO_3V3"; 55*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 56*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 57*4882a593Smuzhiyun }; 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun vcc_3v3: regulator-vcc_3v3 { 60*4882a593Smuzhiyun compatible = "regulator-fixed"; 61*4882a593Smuzhiyun regulator-name = "VCC_3V3"; 62*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 63*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 64*4882a593Smuzhiyun }; 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun emmc_pwrseq: emmc-pwrseq { 67*4882a593Smuzhiyun compatible = "mmc-pwrseq-emmc"; 68*4882a593Smuzhiyun reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>; 69*4882a593Smuzhiyun }; 70*4882a593Smuzhiyun 71*4882a593Smuzhiyun wifi32k: wifi32k { 72*4882a593Smuzhiyun compatible = "pwm-clock"; 73*4882a593Smuzhiyun #clock-cells = <0>; 74*4882a593Smuzhiyun clock-frequency = <32768>; 75*4882a593Smuzhiyun pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */ 76*4882a593Smuzhiyun }; 77*4882a593Smuzhiyun 78*4882a593Smuzhiyun sdio_pwrseq: sdio-pwrseq { 79*4882a593Smuzhiyun compatible = "mmc-pwrseq-simple"; 80*4882a593Smuzhiyun reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>; 81*4882a593Smuzhiyun clocks = <&wifi32k>; 82*4882a593Smuzhiyun clock-names = "ext_clock"; 83*4882a593Smuzhiyun }; 84*4882a593Smuzhiyun 85*4882a593Smuzhiyun cvbs-connector { 86*4882a593Smuzhiyun compatible = "composite-video-connector"; 87*4882a593Smuzhiyun 88*4882a593Smuzhiyun port { 89*4882a593Smuzhiyun cvbs_connector_in: endpoint { 90*4882a593Smuzhiyun remote-endpoint = <&cvbs_vdac_out>; 91*4882a593Smuzhiyun }; 92*4882a593Smuzhiyun }; 93*4882a593Smuzhiyun }; 94*4882a593Smuzhiyun}; 95*4882a593Smuzhiyun 96*4882a593Smuzhiyun&cvbs_vdac_port { 97*4882a593Smuzhiyun cvbs_vdac_out: endpoint { 98*4882a593Smuzhiyun remote-endpoint = <&cvbs_connector_in>; 99*4882a593Smuzhiyun }; 100*4882a593Smuzhiyun}; 101*4882a593Smuzhiyun 102*4882a593Smuzhiyunðmac { 103*4882a593Smuzhiyun status = "okay"; 104*4882a593Smuzhiyun phy-mode = "rmii"; 105*4882a593Smuzhiyun phy-handle = <&internal_phy>; 106*4882a593Smuzhiyun}; 107*4882a593Smuzhiyun 108*4882a593Smuzhiyun&ir { 109*4882a593Smuzhiyun status = "okay"; 110*4882a593Smuzhiyun pinctrl-0 = <&remote_input_ao_pins>; 111*4882a593Smuzhiyun pinctrl-names = "default"; 112*4882a593Smuzhiyun}; 113*4882a593Smuzhiyun 114*4882a593Smuzhiyun&pwm_ef { 115*4882a593Smuzhiyun status = "okay"; 116*4882a593Smuzhiyun pinctrl-0 = <&pwm_e_pins>; 117*4882a593Smuzhiyun pinctrl-names = "default"; 118*4882a593Smuzhiyun clocks = <&clkc CLKID_FCLK_DIV4>; 119*4882a593Smuzhiyun clock-names = "clkin0"; 120*4882a593Smuzhiyun}; 121*4882a593Smuzhiyun 122*4882a593Smuzhiyun/* SD card */ 123*4882a593Smuzhiyun&sd_emmc_b { 124*4882a593Smuzhiyun status = "okay"; 125*4882a593Smuzhiyun pinctrl-0 = <&sdcard_pins>; 126*4882a593Smuzhiyun pinctrl-1 = <&sdcard_clk_gate_pins>; 127*4882a593Smuzhiyun pinctrl-names = "default", "clk-gate"; 128*4882a593Smuzhiyun 129*4882a593Smuzhiyun bus-width = <4>; 130*4882a593Smuzhiyun cap-sd-highspeed; 131*4882a593Smuzhiyun max-frequency = <100000000>; 132*4882a593Smuzhiyun disable-wp; 133*4882a593Smuzhiyun 134*4882a593Smuzhiyun cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>; 135*4882a593Smuzhiyun 136*4882a593Smuzhiyun vmmc-supply = <&vddao_3v3>; 137*4882a593Smuzhiyun vqmmc-supply = <&vddio_card>; 138*4882a593Smuzhiyun}; 139*4882a593Smuzhiyun 140*4882a593Smuzhiyun/* eMMC */ 141*4882a593Smuzhiyun&sd_emmc_c { 142*4882a593Smuzhiyun status = "okay"; 143*4882a593Smuzhiyun pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>; 144*4882a593Smuzhiyun pinctrl-1 = <&emmc_clk_gate_pins>; 145*4882a593Smuzhiyun pinctrl-names = "default", "clk-gate"; 146*4882a593Smuzhiyun 147*4882a593Smuzhiyun bus-width = <8>; 148*4882a593Smuzhiyun cap-mmc-highspeed; 149*4882a593Smuzhiyun max-frequency = <100000000>; 150*4882a593Smuzhiyun non-removable; 151*4882a593Smuzhiyun disable-wp; 152*4882a593Smuzhiyun mmc-ddr-1_8v; 153*4882a593Smuzhiyun mmc-hs200-1_8v; 154*4882a593Smuzhiyun 155*4882a593Smuzhiyun mmc-pwrseq = <&emmc_pwrseq>; 156*4882a593Smuzhiyun vmmc-supply = <&vcc_3v3>; 157*4882a593Smuzhiyun vqmmc-supply = <&vddio_boot>; 158*4882a593Smuzhiyun}; 159*4882a593Smuzhiyun 160*4882a593Smuzhiyun&uart_AO { 161*4882a593Smuzhiyun status = "okay"; 162*4882a593Smuzhiyun pinctrl-0 = <&uart_ao_a_pins>; 163*4882a593Smuzhiyun pinctrl-names = "default"; 164*4882a593Smuzhiyun}; 165