1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Copyright (c) 2016 Endless Computers, Inc. 4*4882a593Smuzhiyun * Author: Carlo Caione <carlo@endlessm.com> 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun/* Common DTSI for same Amlogic Q200/Q201 and P230/P231 boards using either 8*4882a593Smuzhiyun * the pin-compatible S912 (GXM) or S905D (GXL) SoCs. 9*4882a593Smuzhiyun */ 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun#include <dt-bindings/sound/meson-aiu.h> 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun/ { 14*4882a593Smuzhiyun aliases { 15*4882a593Smuzhiyun serial0 = &uart_AO; 16*4882a593Smuzhiyun ethernet0 = ðmac; 17*4882a593Smuzhiyun }; 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun dio2133: analog-amplifier { 20*4882a593Smuzhiyun compatible = "simple-audio-amplifier"; 21*4882a593Smuzhiyun sound-name-prefix = "AU2"; 22*4882a593Smuzhiyun VCC-supply = <&hdmi_5v>; 23*4882a593Smuzhiyun enable-gpios = <&gpio GPIOH_5 GPIO_ACTIVE_HIGH>; 24*4882a593Smuzhiyun }; 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun spdif_dit: audio-codec-0 { 27*4882a593Smuzhiyun #sound-dai-cells = <0>; 28*4882a593Smuzhiyun compatible = "linux,spdif-dit"; 29*4882a593Smuzhiyun status = "okay"; 30*4882a593Smuzhiyun sound-name-prefix = "DIT"; 31*4882a593Smuzhiyun }; 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun chosen { 34*4882a593Smuzhiyun stdout-path = "serial0:115200n8"; 35*4882a593Smuzhiyun }; 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun memory@0 { 38*4882a593Smuzhiyun device_type = "memory"; 39*4882a593Smuzhiyun reg = <0x0 0x0 0x0 0x80000000>; 40*4882a593Smuzhiyun }; 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun hdmi_5v: regulator-hdmi-5v { 43*4882a593Smuzhiyun compatible = "regulator-fixed"; 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun regulator-name = "HDMI_5V"; 46*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 47*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun gpio = <&gpio GPIOH_3 GPIO_ACTIVE_HIGH>; 50*4882a593Smuzhiyun enable-active-high; 51*4882a593Smuzhiyun regulator-always-on; 52*4882a593Smuzhiyun }; 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun vddio_ao18: regulator-vddio_ao18 { 55*4882a593Smuzhiyun compatible = "regulator-fixed"; 56*4882a593Smuzhiyun regulator-name = "VDDIO_AO18"; 57*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 58*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 59*4882a593Smuzhiyun }; 60*4882a593Smuzhiyun 61*4882a593Smuzhiyun vddio_boot: regulator-vddio_boot { 62*4882a593Smuzhiyun compatible = "regulator-fixed"; 63*4882a593Smuzhiyun regulator-name = "VDDIO_BOOT"; 64*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 65*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 66*4882a593Smuzhiyun }; 67*4882a593Smuzhiyun 68*4882a593Smuzhiyun vddao_3v3: regulator-vddao_3v3 { 69*4882a593Smuzhiyun compatible = "regulator-fixed"; 70*4882a593Smuzhiyun regulator-name = "VDDAO_3V3"; 71*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 72*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 73*4882a593Smuzhiyun }; 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun vcc_3v3: regulator-vcc_3v3 { 76*4882a593Smuzhiyun compatible = "regulator-fixed"; 77*4882a593Smuzhiyun regulator-name = "VCC_3V3"; 78*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 79*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 80*4882a593Smuzhiyun }; 81*4882a593Smuzhiyun 82*4882a593Smuzhiyun emmc_pwrseq: emmc-pwrseq { 83*4882a593Smuzhiyun compatible = "mmc-pwrseq-emmc"; 84*4882a593Smuzhiyun reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>; 85*4882a593Smuzhiyun }; 86*4882a593Smuzhiyun 87*4882a593Smuzhiyun wifi32k: wifi32k { 88*4882a593Smuzhiyun compatible = "pwm-clock"; 89*4882a593Smuzhiyun #clock-cells = <0>; 90*4882a593Smuzhiyun clock-frequency = <32768>; 91*4882a593Smuzhiyun pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */ 92*4882a593Smuzhiyun }; 93*4882a593Smuzhiyun 94*4882a593Smuzhiyun sdio_pwrseq: sdio-pwrseq { 95*4882a593Smuzhiyun compatible = "mmc-pwrseq-simple"; 96*4882a593Smuzhiyun reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>; 97*4882a593Smuzhiyun clocks = <&wifi32k>; 98*4882a593Smuzhiyun clock-names = "ext_clock"; 99*4882a593Smuzhiyun }; 100*4882a593Smuzhiyun 101*4882a593Smuzhiyun cvbs-connector { 102*4882a593Smuzhiyun compatible = "composite-video-connector"; 103*4882a593Smuzhiyun 104*4882a593Smuzhiyun port { 105*4882a593Smuzhiyun cvbs_connector_in: endpoint { 106*4882a593Smuzhiyun remote-endpoint = <&cvbs_vdac_out>; 107*4882a593Smuzhiyun }; 108*4882a593Smuzhiyun }; 109*4882a593Smuzhiyun }; 110*4882a593Smuzhiyun 111*4882a593Smuzhiyun hdmi-connector { 112*4882a593Smuzhiyun compatible = "hdmi-connector"; 113*4882a593Smuzhiyun type = "a"; 114*4882a593Smuzhiyun 115*4882a593Smuzhiyun port { 116*4882a593Smuzhiyun hdmi_connector_in: endpoint { 117*4882a593Smuzhiyun remote-endpoint = <&hdmi_tx_tmds_out>; 118*4882a593Smuzhiyun }; 119*4882a593Smuzhiyun }; 120*4882a593Smuzhiyun }; 121*4882a593Smuzhiyun 122*4882a593Smuzhiyun sound { 123*4882a593Smuzhiyun compatible = "amlogic,gx-sound-card"; 124*4882a593Smuzhiyun model = "GX-P230-Q200"; 125*4882a593Smuzhiyun audio-aux-devs = <&dio2133>; 126*4882a593Smuzhiyun audio-widgets = "Line", "Lineout"; 127*4882a593Smuzhiyun audio-routing = "AU2 INL", "ACODEC LOLP", 128*4882a593Smuzhiyun "AU2 INR", "ACODEC LORP", 129*4882a593Smuzhiyun "AU2 INL", "ACODEC LOLN", 130*4882a593Smuzhiyun "AU2 INR", "ACODEC LORN", 131*4882a593Smuzhiyun "Lineout", "AU2 OUTL", 132*4882a593Smuzhiyun "Lineout", "AU2 OUTR"; 133*4882a593Smuzhiyun assigned-clocks = <&clkc CLKID_MPLL0>, 134*4882a593Smuzhiyun <&clkc CLKID_MPLL1>, 135*4882a593Smuzhiyun <&clkc CLKID_MPLL2>; 136*4882a593Smuzhiyun assigned-clock-parents = <0>, <0>, <0>; 137*4882a593Smuzhiyun assigned-clock-rates = <294912000>, 138*4882a593Smuzhiyun <270950400>, 139*4882a593Smuzhiyun <393216000>; 140*4882a593Smuzhiyun status = "okay"; 141*4882a593Smuzhiyun 142*4882a593Smuzhiyun dai-link-0 { 143*4882a593Smuzhiyun sound-dai = <&aiu AIU_CPU CPU_I2S_FIFO>; 144*4882a593Smuzhiyun }; 145*4882a593Smuzhiyun 146*4882a593Smuzhiyun dai-link-1 { 147*4882a593Smuzhiyun sound-dai = <&aiu AIU_CPU CPU_SPDIF_FIFO>; 148*4882a593Smuzhiyun }; 149*4882a593Smuzhiyun 150*4882a593Smuzhiyun dai-link-2 { 151*4882a593Smuzhiyun sound-dai = <&aiu AIU_CPU CPU_I2S_ENCODER>; 152*4882a593Smuzhiyun dai-format = "i2s"; 153*4882a593Smuzhiyun mclk-fs = <256>; 154*4882a593Smuzhiyun 155*4882a593Smuzhiyun codec-0 { 156*4882a593Smuzhiyun sound-dai = <&aiu AIU_HDMI CTRL_I2S>; 157*4882a593Smuzhiyun }; 158*4882a593Smuzhiyun 159*4882a593Smuzhiyun codec-1 { 160*4882a593Smuzhiyun sound-dai = <&aiu AIU_ACODEC CTRL_I2S>; 161*4882a593Smuzhiyun }; 162*4882a593Smuzhiyun }; 163*4882a593Smuzhiyun 164*4882a593Smuzhiyun dai-link-3 { 165*4882a593Smuzhiyun sound-dai = <&aiu AIU_CPU CPU_SPDIF_ENCODER>; 166*4882a593Smuzhiyun 167*4882a593Smuzhiyun codec-0 { 168*4882a593Smuzhiyun sound-dai = <&spdif_dit>; 169*4882a593Smuzhiyun }; 170*4882a593Smuzhiyun }; 171*4882a593Smuzhiyun 172*4882a593Smuzhiyun dai-link-4 { 173*4882a593Smuzhiyun sound-dai = <&aiu AIU_HDMI CTRL_OUT>; 174*4882a593Smuzhiyun 175*4882a593Smuzhiyun codec-0 { 176*4882a593Smuzhiyun sound-dai = <&hdmi_tx>; 177*4882a593Smuzhiyun }; 178*4882a593Smuzhiyun }; 179*4882a593Smuzhiyun 180*4882a593Smuzhiyun dai-link-5 { 181*4882a593Smuzhiyun sound-dai = <&aiu AIU_ACODEC CTRL_OUT>; 182*4882a593Smuzhiyun 183*4882a593Smuzhiyun codec-0 { 184*4882a593Smuzhiyun sound-dai = <&acodec>; 185*4882a593Smuzhiyun }; 186*4882a593Smuzhiyun }; 187*4882a593Smuzhiyun }; 188*4882a593Smuzhiyun}; 189*4882a593Smuzhiyun 190*4882a593Smuzhiyun&acodec { 191*4882a593Smuzhiyun AVDD-supply = <&vddio_ao18>; 192*4882a593Smuzhiyun status = "okay"; 193*4882a593Smuzhiyun}; 194*4882a593Smuzhiyun 195*4882a593Smuzhiyun&aiu { 196*4882a593Smuzhiyun status = "okay"; 197*4882a593Smuzhiyun pinctrl-0 = <&spdif_out_h_pins>; 198*4882a593Smuzhiyun pinctrl-names = "default"; 199*4882a593Smuzhiyun 200*4882a593Smuzhiyun}; 201*4882a593Smuzhiyun 202*4882a593Smuzhiyun&cec_AO { 203*4882a593Smuzhiyun status = "okay"; 204*4882a593Smuzhiyun pinctrl-0 = <&ao_cec_pins>; 205*4882a593Smuzhiyun pinctrl-names = "default"; 206*4882a593Smuzhiyun hdmi-phandle = <&hdmi_tx>; 207*4882a593Smuzhiyun}; 208*4882a593Smuzhiyun 209*4882a593Smuzhiyun&cvbs_vdac_port { 210*4882a593Smuzhiyun cvbs_vdac_out: endpoint { 211*4882a593Smuzhiyun remote-endpoint = <&cvbs_connector_in>; 212*4882a593Smuzhiyun }; 213*4882a593Smuzhiyun}; 214*4882a593Smuzhiyun 215*4882a593Smuzhiyunðmac { 216*4882a593Smuzhiyun status = "okay"; 217*4882a593Smuzhiyun}; 218*4882a593Smuzhiyun 219*4882a593Smuzhiyun&hdmi_tx { 220*4882a593Smuzhiyun status = "okay"; 221*4882a593Smuzhiyun pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>; 222*4882a593Smuzhiyun pinctrl-names = "default"; 223*4882a593Smuzhiyun hdmi-supply = <&hdmi_5v>; 224*4882a593Smuzhiyun}; 225*4882a593Smuzhiyun 226*4882a593Smuzhiyun&hdmi_tx_tmds_port { 227*4882a593Smuzhiyun hdmi_tx_tmds_out: endpoint { 228*4882a593Smuzhiyun remote-endpoint = <&hdmi_connector_in>; 229*4882a593Smuzhiyun }; 230*4882a593Smuzhiyun}; 231*4882a593Smuzhiyun 232*4882a593Smuzhiyun&ir { 233*4882a593Smuzhiyun status = "okay"; 234*4882a593Smuzhiyun pinctrl-0 = <&remote_input_ao_pins>; 235*4882a593Smuzhiyun pinctrl-names = "default"; 236*4882a593Smuzhiyun}; 237*4882a593Smuzhiyun 238*4882a593Smuzhiyun&pwm_ef { 239*4882a593Smuzhiyun status = "okay"; 240*4882a593Smuzhiyun pinctrl-0 = <&pwm_e_pins>; 241*4882a593Smuzhiyun pinctrl-names = "default"; 242*4882a593Smuzhiyun clocks = <&clkc CLKID_FCLK_DIV4>; 243*4882a593Smuzhiyun clock-names = "clkin0"; 244*4882a593Smuzhiyun}; 245*4882a593Smuzhiyun 246*4882a593Smuzhiyun&saradc { 247*4882a593Smuzhiyun status = "okay"; 248*4882a593Smuzhiyun vref-supply = <&vddio_ao18>; 249*4882a593Smuzhiyun}; 250*4882a593Smuzhiyun 251*4882a593Smuzhiyun/* Wireless SDIO Module */ 252*4882a593Smuzhiyun&sd_emmc_a { 253*4882a593Smuzhiyun status = "okay"; 254*4882a593Smuzhiyun pinctrl-0 = <&sdio_pins>; 255*4882a593Smuzhiyun pinctrl-1 = <&sdio_clk_gate_pins>; 256*4882a593Smuzhiyun pinctrl-names = "default", "clk-gate"; 257*4882a593Smuzhiyun #address-cells = <1>; 258*4882a593Smuzhiyun #size-cells = <0>; 259*4882a593Smuzhiyun 260*4882a593Smuzhiyun bus-width = <4>; 261*4882a593Smuzhiyun cap-sd-highspeed; 262*4882a593Smuzhiyun max-frequency = <50000000>; 263*4882a593Smuzhiyun 264*4882a593Smuzhiyun non-removable; 265*4882a593Smuzhiyun disable-wp; 266*4882a593Smuzhiyun 267*4882a593Smuzhiyun /* WiFi firmware requires power to be kept while in suspend */ 268*4882a593Smuzhiyun keep-power-in-suspend; 269*4882a593Smuzhiyun 270*4882a593Smuzhiyun mmc-pwrseq = <&sdio_pwrseq>; 271*4882a593Smuzhiyun 272*4882a593Smuzhiyun vmmc-supply = <&vddao_3v3>; 273*4882a593Smuzhiyun vqmmc-supply = <&vddio_boot>; 274*4882a593Smuzhiyun}; 275*4882a593Smuzhiyun 276*4882a593Smuzhiyun/* SD card */ 277*4882a593Smuzhiyun&sd_emmc_b { 278*4882a593Smuzhiyun status = "okay"; 279*4882a593Smuzhiyun pinctrl-0 = <&sdcard_pins>; 280*4882a593Smuzhiyun pinctrl-1 = <&sdcard_clk_gate_pins>; 281*4882a593Smuzhiyun pinctrl-names = "default", "clk-gate"; 282*4882a593Smuzhiyun 283*4882a593Smuzhiyun bus-width = <4>; 284*4882a593Smuzhiyun cap-sd-highspeed; 285*4882a593Smuzhiyun max-frequency = <50000000>; 286*4882a593Smuzhiyun disable-wp; 287*4882a593Smuzhiyun 288*4882a593Smuzhiyun cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>; 289*4882a593Smuzhiyun 290*4882a593Smuzhiyun vmmc-supply = <&vddao_3v3>; 291*4882a593Smuzhiyun vqmmc-supply = <&vddio_boot>; 292*4882a593Smuzhiyun}; 293*4882a593Smuzhiyun 294*4882a593Smuzhiyun/* eMMC */ 295*4882a593Smuzhiyun&sd_emmc_c { 296*4882a593Smuzhiyun status = "okay"; 297*4882a593Smuzhiyun pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>; 298*4882a593Smuzhiyun pinctrl-1 = <&emmc_clk_gate_pins>; 299*4882a593Smuzhiyun pinctrl-names = "default", "clk-gate"; 300*4882a593Smuzhiyun 301*4882a593Smuzhiyun bus-width = <8>; 302*4882a593Smuzhiyun cap-mmc-highspeed; 303*4882a593Smuzhiyun max-frequency = <200000000>; 304*4882a593Smuzhiyun non-removable; 305*4882a593Smuzhiyun disable-wp; 306*4882a593Smuzhiyun mmc-ddr-1_8v; 307*4882a593Smuzhiyun mmc-hs200-1_8v; 308*4882a593Smuzhiyun 309*4882a593Smuzhiyun mmc-pwrseq = <&emmc_pwrseq>; 310*4882a593Smuzhiyun vmmc-supply = <&vcc_3v3>; 311*4882a593Smuzhiyun vqmmc-supply = <&vddio_boot>; 312*4882a593Smuzhiyun}; 313*4882a593Smuzhiyun 314*4882a593Smuzhiyun/* This UART is brought out to the DB9 connector */ 315*4882a593Smuzhiyun&uart_AO { 316*4882a593Smuzhiyun status = "okay"; 317*4882a593Smuzhiyun pinctrl-0 = <&uart_ao_a_pins>; 318*4882a593Smuzhiyun pinctrl-names = "default"; 319*4882a593Smuzhiyun}; 320*4882a593Smuzhiyun 321*4882a593Smuzhiyun&usb { 322*4882a593Smuzhiyun status = "okay"; 323*4882a593Smuzhiyun dr_mode = "otg"; 324*4882a593Smuzhiyun}; 325