xref: /OK3568_Linux_fs/kernel/scripts/dtc/include-prefixes/arm/zynq-zc702.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun *  Copyright (C) 2011 - 2014 Xilinx
4*4882a593Smuzhiyun *  Copyright (C) 2012 National Instruments Corp.
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun/dts-v1/;
7*4882a593Smuzhiyun#include "zynq-7000.dtsi"
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun/ {
10*4882a593Smuzhiyun	model = "Xilinx ZC702 board";
11*4882a593Smuzhiyun	compatible = "xlnx,zynq-zc702", "xlnx,zynq-7000";
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun	aliases {
14*4882a593Smuzhiyun		ethernet0 = &gem0;
15*4882a593Smuzhiyun		i2c0 = &i2c0;
16*4882a593Smuzhiyun		serial0 = &uart1;
17*4882a593Smuzhiyun		mmc0 = &sdhci0;
18*4882a593Smuzhiyun	};
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun	memory@0 {
21*4882a593Smuzhiyun		device_type = "memory";
22*4882a593Smuzhiyun		reg = <0x0 0x40000000>;
23*4882a593Smuzhiyun	};
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun	chosen {
26*4882a593Smuzhiyun		bootargs = "";
27*4882a593Smuzhiyun		stdout-path = "serial0:115200n8";
28*4882a593Smuzhiyun	};
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun	gpio-keys {
31*4882a593Smuzhiyun		compatible = "gpio-keys";
32*4882a593Smuzhiyun		autorepeat;
33*4882a593Smuzhiyun		sw14 {
34*4882a593Smuzhiyun			label = "sw14";
35*4882a593Smuzhiyun			gpios = <&gpio0 12 0>;
36*4882a593Smuzhiyun			linux,code = <108>; /* down */
37*4882a593Smuzhiyun			wakeup-source;
38*4882a593Smuzhiyun			autorepeat;
39*4882a593Smuzhiyun		};
40*4882a593Smuzhiyun		sw13 {
41*4882a593Smuzhiyun			label = "sw13";
42*4882a593Smuzhiyun			gpios = <&gpio0 14 0>;
43*4882a593Smuzhiyun			linux,code = <103>; /* up */
44*4882a593Smuzhiyun			wakeup-source;
45*4882a593Smuzhiyun			autorepeat;
46*4882a593Smuzhiyun		};
47*4882a593Smuzhiyun	};
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun	leds {
50*4882a593Smuzhiyun		compatible = "gpio-leds";
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun		ds23 {
53*4882a593Smuzhiyun			label = "ds23";
54*4882a593Smuzhiyun			gpios = <&gpio0 10 0>;
55*4882a593Smuzhiyun			linux,default-trigger = "heartbeat";
56*4882a593Smuzhiyun		};
57*4882a593Smuzhiyun	};
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun	usb_phy0: phy0 {
60*4882a593Smuzhiyun		compatible = "usb-nop-xceiv";
61*4882a593Smuzhiyun		#phy-cells = <0>;
62*4882a593Smuzhiyun	};
63*4882a593Smuzhiyun};
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun&amba {
66*4882a593Smuzhiyun	ocm: sram@fffc0000 {
67*4882a593Smuzhiyun		compatible = "mmio-sram";
68*4882a593Smuzhiyun		reg = <0xfffc0000 0x10000>;
69*4882a593Smuzhiyun	};
70*4882a593Smuzhiyun};
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun&can0 {
73*4882a593Smuzhiyun	status = "okay";
74*4882a593Smuzhiyun	pinctrl-names = "default";
75*4882a593Smuzhiyun	pinctrl-0 = <&pinctrl_can0_default>;
76*4882a593Smuzhiyun};
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun&clkc {
79*4882a593Smuzhiyun	ps-clk-frequency = <33333333>;
80*4882a593Smuzhiyun};
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun&gem0 {
83*4882a593Smuzhiyun	status = "okay";
84*4882a593Smuzhiyun	phy-mode = "rgmii-id";
85*4882a593Smuzhiyun	phy-handle = <&ethernet_phy>;
86*4882a593Smuzhiyun	pinctrl-names = "default";
87*4882a593Smuzhiyun	pinctrl-0 = <&pinctrl_gem0_default>;
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun	ethernet_phy: ethernet-phy@7 {
90*4882a593Smuzhiyun		reg = <7>;
91*4882a593Smuzhiyun		device_type = "ethernet-phy";
92*4882a593Smuzhiyun	};
93*4882a593Smuzhiyun};
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun&gpio0 {
96*4882a593Smuzhiyun	pinctrl-names = "default";
97*4882a593Smuzhiyun	pinctrl-0 = <&pinctrl_gpio0_default>;
98*4882a593Smuzhiyun};
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun&i2c0 {
101*4882a593Smuzhiyun	status = "okay";
102*4882a593Smuzhiyun	clock-frequency = <400000>;
103*4882a593Smuzhiyun	pinctrl-names = "default";
104*4882a593Smuzhiyun	pinctrl-0 = <&pinctrl_i2c0_default>;
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun	i2c-mux@74 {
107*4882a593Smuzhiyun		compatible = "nxp,pca9548";
108*4882a593Smuzhiyun		#address-cells = <1>;
109*4882a593Smuzhiyun		#size-cells = <0>;
110*4882a593Smuzhiyun		reg = <0x74>;
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun		i2c@0 {
113*4882a593Smuzhiyun			#address-cells = <1>;
114*4882a593Smuzhiyun			#size-cells = <0>;
115*4882a593Smuzhiyun			reg = <0>;
116*4882a593Smuzhiyun			si570: clock-generator@5d {
117*4882a593Smuzhiyun				#clock-cells = <0>;
118*4882a593Smuzhiyun				compatible = "silabs,si570";
119*4882a593Smuzhiyun				temperature-stability = <50>;
120*4882a593Smuzhiyun				reg = <0x5d>;
121*4882a593Smuzhiyun				factory-fout = <156250000>;
122*4882a593Smuzhiyun				clock-frequency = <148500000>;
123*4882a593Smuzhiyun			};
124*4882a593Smuzhiyun		};
125*4882a593Smuzhiyun
126*4882a593Smuzhiyun		i2c@1 {
127*4882a593Smuzhiyun			#address-cells = <1>;
128*4882a593Smuzhiyun			#size-cells = <0>;
129*4882a593Smuzhiyun			reg = <1>;
130*4882a593Smuzhiyun			adv7511: hdmi-tx@39 {
131*4882a593Smuzhiyun				compatible = "adi,adv7511";
132*4882a593Smuzhiyun				reg = <0x39>;
133*4882a593Smuzhiyun				adi,input-depth = <8>;
134*4882a593Smuzhiyun				adi,input-colorspace = "yuv422";
135*4882a593Smuzhiyun				adi,input-clock = "1x";
136*4882a593Smuzhiyun				adi,input-style = <3>;
137*4882a593Smuzhiyun				adi,input-justification = "right";
138*4882a593Smuzhiyun			};
139*4882a593Smuzhiyun		};
140*4882a593Smuzhiyun
141*4882a593Smuzhiyun		i2c@2 {
142*4882a593Smuzhiyun			#address-cells = <1>;
143*4882a593Smuzhiyun			#size-cells = <0>;
144*4882a593Smuzhiyun			reg = <2>;
145*4882a593Smuzhiyun			eeprom@54 {
146*4882a593Smuzhiyun				compatible = "atmel,24c08";
147*4882a593Smuzhiyun				reg = <0x54>;
148*4882a593Smuzhiyun			};
149*4882a593Smuzhiyun		};
150*4882a593Smuzhiyun
151*4882a593Smuzhiyun		i2c@3 {
152*4882a593Smuzhiyun			#address-cells = <1>;
153*4882a593Smuzhiyun			#size-cells = <0>;
154*4882a593Smuzhiyun			reg = <3>;
155*4882a593Smuzhiyun			gpio@21 {
156*4882a593Smuzhiyun				compatible = "ti,tca6416";
157*4882a593Smuzhiyun				reg = <0x21>;
158*4882a593Smuzhiyun				gpio-controller;
159*4882a593Smuzhiyun				#gpio-cells = <2>;
160*4882a593Smuzhiyun			};
161*4882a593Smuzhiyun		};
162*4882a593Smuzhiyun
163*4882a593Smuzhiyun		i2c@4 {
164*4882a593Smuzhiyun			#address-cells = <1>;
165*4882a593Smuzhiyun			#size-cells = <0>;
166*4882a593Smuzhiyun			reg = <4>;
167*4882a593Smuzhiyun			rtc@51 {
168*4882a593Smuzhiyun				compatible = "nxp,pcf8563";
169*4882a593Smuzhiyun				reg = <0x51>;
170*4882a593Smuzhiyun			};
171*4882a593Smuzhiyun		};
172*4882a593Smuzhiyun
173*4882a593Smuzhiyun		i2c@7 {
174*4882a593Smuzhiyun			#address-cells = <1>;
175*4882a593Smuzhiyun			#size-cells = <0>;
176*4882a593Smuzhiyun			reg = <7>;
177*4882a593Smuzhiyun			hwmon@34 {
178*4882a593Smuzhiyun				compatible = "ti,ucd9248";
179*4882a593Smuzhiyun				reg = <0x34>;
180*4882a593Smuzhiyun			};
181*4882a593Smuzhiyun			hwmon@35 {
182*4882a593Smuzhiyun				compatible = "ti,ucd9248";
183*4882a593Smuzhiyun				reg = <0x35>;
184*4882a593Smuzhiyun			};
185*4882a593Smuzhiyun			hwmon@36 {
186*4882a593Smuzhiyun				compatible = "ti,ucd9248";
187*4882a593Smuzhiyun				reg = <0x36>;
188*4882a593Smuzhiyun			};
189*4882a593Smuzhiyun		};
190*4882a593Smuzhiyun	};
191*4882a593Smuzhiyun};
192*4882a593Smuzhiyun
193*4882a593Smuzhiyun&pinctrl0 {
194*4882a593Smuzhiyun	pinctrl_can0_default: can0-default {
195*4882a593Smuzhiyun		mux {
196*4882a593Smuzhiyun			function = "can0";
197*4882a593Smuzhiyun			groups = "can0_9_grp";
198*4882a593Smuzhiyun		};
199*4882a593Smuzhiyun
200*4882a593Smuzhiyun		conf {
201*4882a593Smuzhiyun			groups = "can0_9_grp";
202*4882a593Smuzhiyun			slew-rate = <0>;
203*4882a593Smuzhiyun			io-standard = <1>;
204*4882a593Smuzhiyun		};
205*4882a593Smuzhiyun
206*4882a593Smuzhiyun		conf-rx {
207*4882a593Smuzhiyun			pins = "MIO46";
208*4882a593Smuzhiyun			bias-high-impedance;
209*4882a593Smuzhiyun		};
210*4882a593Smuzhiyun
211*4882a593Smuzhiyun		conf-tx {
212*4882a593Smuzhiyun			pins = "MIO47";
213*4882a593Smuzhiyun			bias-disable;
214*4882a593Smuzhiyun		};
215*4882a593Smuzhiyun	};
216*4882a593Smuzhiyun
217*4882a593Smuzhiyun	pinctrl_gem0_default: gem0-default {
218*4882a593Smuzhiyun		mux {
219*4882a593Smuzhiyun			function = "ethernet0";
220*4882a593Smuzhiyun			groups = "ethernet0_0_grp";
221*4882a593Smuzhiyun		};
222*4882a593Smuzhiyun
223*4882a593Smuzhiyun		conf {
224*4882a593Smuzhiyun			groups = "ethernet0_0_grp";
225*4882a593Smuzhiyun			slew-rate = <0>;
226*4882a593Smuzhiyun			io-standard = <4>;
227*4882a593Smuzhiyun		};
228*4882a593Smuzhiyun
229*4882a593Smuzhiyun		conf-rx {
230*4882a593Smuzhiyun			pins = "MIO22", "MIO23", "MIO24", "MIO25", "MIO26", "MIO27";
231*4882a593Smuzhiyun			bias-high-impedance;
232*4882a593Smuzhiyun			low-power-disable;
233*4882a593Smuzhiyun		};
234*4882a593Smuzhiyun
235*4882a593Smuzhiyun		conf-tx {
236*4882a593Smuzhiyun			pins = "MIO16", "MIO17", "MIO18", "MIO19", "MIO20", "MIO21";
237*4882a593Smuzhiyun			bias-disable;
238*4882a593Smuzhiyun			low-power-enable;
239*4882a593Smuzhiyun		};
240*4882a593Smuzhiyun
241*4882a593Smuzhiyun		mux-mdio {
242*4882a593Smuzhiyun			function = "mdio0";
243*4882a593Smuzhiyun			groups = "mdio0_0_grp";
244*4882a593Smuzhiyun		};
245*4882a593Smuzhiyun
246*4882a593Smuzhiyun		conf-mdio {
247*4882a593Smuzhiyun			groups = "mdio0_0_grp";
248*4882a593Smuzhiyun			slew-rate = <0>;
249*4882a593Smuzhiyun			io-standard = <1>;
250*4882a593Smuzhiyun			bias-disable;
251*4882a593Smuzhiyun		};
252*4882a593Smuzhiyun	};
253*4882a593Smuzhiyun
254*4882a593Smuzhiyun	pinctrl_gpio0_default: gpio0-default {
255*4882a593Smuzhiyun		mux {
256*4882a593Smuzhiyun			function = "gpio0";
257*4882a593Smuzhiyun			groups = "gpio0_7_grp", "gpio0_8_grp", "gpio0_9_grp",
258*4882a593Smuzhiyun				 "gpio0_10_grp", "gpio0_11_grp", "gpio0_12_grp",
259*4882a593Smuzhiyun				 "gpio0_13_grp", "gpio0_14_grp";
260*4882a593Smuzhiyun		};
261*4882a593Smuzhiyun
262*4882a593Smuzhiyun		conf {
263*4882a593Smuzhiyun			groups = "gpio0_7_grp", "gpio0_8_grp", "gpio0_9_grp",
264*4882a593Smuzhiyun				 "gpio0_10_grp", "gpio0_11_grp", "gpio0_12_grp",
265*4882a593Smuzhiyun				 "gpio0_13_grp", "gpio0_14_grp";
266*4882a593Smuzhiyun			slew-rate = <0>;
267*4882a593Smuzhiyun			io-standard = <1>;
268*4882a593Smuzhiyun		};
269*4882a593Smuzhiyun
270*4882a593Smuzhiyun		conf-pull-up {
271*4882a593Smuzhiyun			pins = "MIO9", "MIO10", "MIO11", "MIO12", "MIO13", "MIO14";
272*4882a593Smuzhiyun			bias-pull-up;
273*4882a593Smuzhiyun		};
274*4882a593Smuzhiyun
275*4882a593Smuzhiyun		conf-pull-none {
276*4882a593Smuzhiyun			pins = "MIO7", "MIO8";
277*4882a593Smuzhiyun			bias-disable;
278*4882a593Smuzhiyun		};
279*4882a593Smuzhiyun	};
280*4882a593Smuzhiyun
281*4882a593Smuzhiyun	pinctrl_i2c0_default: i2c0-default {
282*4882a593Smuzhiyun		mux {
283*4882a593Smuzhiyun			groups = "i2c0_10_grp";
284*4882a593Smuzhiyun			function = "i2c0";
285*4882a593Smuzhiyun		};
286*4882a593Smuzhiyun
287*4882a593Smuzhiyun		conf {
288*4882a593Smuzhiyun			groups = "i2c0_10_grp";
289*4882a593Smuzhiyun			bias-pull-up;
290*4882a593Smuzhiyun			slew-rate = <0>;
291*4882a593Smuzhiyun			io-standard = <1>;
292*4882a593Smuzhiyun		};
293*4882a593Smuzhiyun	};
294*4882a593Smuzhiyun
295*4882a593Smuzhiyun	pinctrl_sdhci0_default: sdhci0-default {
296*4882a593Smuzhiyun		mux {
297*4882a593Smuzhiyun			groups = "sdio0_2_grp";
298*4882a593Smuzhiyun			function = "sdio0";
299*4882a593Smuzhiyun		};
300*4882a593Smuzhiyun
301*4882a593Smuzhiyun		conf {
302*4882a593Smuzhiyun			groups = "sdio0_2_grp";
303*4882a593Smuzhiyun			slew-rate = <0>;
304*4882a593Smuzhiyun			io-standard = <1>;
305*4882a593Smuzhiyun			bias-disable;
306*4882a593Smuzhiyun		};
307*4882a593Smuzhiyun
308*4882a593Smuzhiyun		mux-cd {
309*4882a593Smuzhiyun			groups = "gpio0_0_grp";
310*4882a593Smuzhiyun			function = "sdio0_cd";
311*4882a593Smuzhiyun		};
312*4882a593Smuzhiyun
313*4882a593Smuzhiyun		conf-cd {
314*4882a593Smuzhiyun			groups = "gpio0_0_grp";
315*4882a593Smuzhiyun			bias-high-impedance;
316*4882a593Smuzhiyun			bias-pull-up;
317*4882a593Smuzhiyun			slew-rate = <0>;
318*4882a593Smuzhiyun			io-standard = <1>;
319*4882a593Smuzhiyun		};
320*4882a593Smuzhiyun
321*4882a593Smuzhiyun		mux-wp {
322*4882a593Smuzhiyun			groups = "gpio0_15_grp";
323*4882a593Smuzhiyun			function = "sdio0_wp";
324*4882a593Smuzhiyun		};
325*4882a593Smuzhiyun
326*4882a593Smuzhiyun		conf-wp {
327*4882a593Smuzhiyun			groups = "gpio0_15_grp";
328*4882a593Smuzhiyun			bias-high-impedance;
329*4882a593Smuzhiyun			bias-pull-up;
330*4882a593Smuzhiyun			slew-rate = <0>;
331*4882a593Smuzhiyun			io-standard = <1>;
332*4882a593Smuzhiyun		};
333*4882a593Smuzhiyun	};
334*4882a593Smuzhiyun
335*4882a593Smuzhiyun	pinctrl_uart1_default: uart1-default {
336*4882a593Smuzhiyun		mux {
337*4882a593Smuzhiyun			groups = "uart1_10_grp";
338*4882a593Smuzhiyun			function = "uart1";
339*4882a593Smuzhiyun		};
340*4882a593Smuzhiyun
341*4882a593Smuzhiyun		conf {
342*4882a593Smuzhiyun			groups = "uart1_10_grp";
343*4882a593Smuzhiyun			slew-rate = <0>;
344*4882a593Smuzhiyun			io-standard = <1>;
345*4882a593Smuzhiyun		};
346*4882a593Smuzhiyun
347*4882a593Smuzhiyun		conf-rx {
348*4882a593Smuzhiyun			pins = "MIO49";
349*4882a593Smuzhiyun			bias-high-impedance;
350*4882a593Smuzhiyun		};
351*4882a593Smuzhiyun
352*4882a593Smuzhiyun		conf-tx {
353*4882a593Smuzhiyun			pins = "MIO48";
354*4882a593Smuzhiyun			bias-disable;
355*4882a593Smuzhiyun		};
356*4882a593Smuzhiyun	};
357*4882a593Smuzhiyun
358*4882a593Smuzhiyun	pinctrl_usb0_default: usb0-default {
359*4882a593Smuzhiyun		mux {
360*4882a593Smuzhiyun			groups = "usb0_0_grp";
361*4882a593Smuzhiyun			function = "usb0";
362*4882a593Smuzhiyun		};
363*4882a593Smuzhiyun
364*4882a593Smuzhiyun		conf {
365*4882a593Smuzhiyun			groups = "usb0_0_grp";
366*4882a593Smuzhiyun			slew-rate = <0>;
367*4882a593Smuzhiyun			io-standard = <1>;
368*4882a593Smuzhiyun		};
369*4882a593Smuzhiyun
370*4882a593Smuzhiyun		conf-rx {
371*4882a593Smuzhiyun			pins = "MIO29", "MIO31", "MIO36";
372*4882a593Smuzhiyun			bias-high-impedance;
373*4882a593Smuzhiyun		};
374*4882a593Smuzhiyun
375*4882a593Smuzhiyun		conf-tx {
376*4882a593Smuzhiyun			pins = "MIO28", "MIO30", "MIO32", "MIO33", "MIO34",
377*4882a593Smuzhiyun			       "MIO35", "MIO37", "MIO38", "MIO39";
378*4882a593Smuzhiyun			bias-disable;
379*4882a593Smuzhiyun		};
380*4882a593Smuzhiyun	};
381*4882a593Smuzhiyun};
382*4882a593Smuzhiyun
383*4882a593Smuzhiyun&sdhci0 {
384*4882a593Smuzhiyun	status = "okay";
385*4882a593Smuzhiyun	pinctrl-names = "default";
386*4882a593Smuzhiyun	pinctrl-0 = <&pinctrl_sdhci0_default>;
387*4882a593Smuzhiyun};
388*4882a593Smuzhiyun
389*4882a593Smuzhiyun&uart1 {
390*4882a593Smuzhiyun	status = "okay";
391*4882a593Smuzhiyun	pinctrl-names = "default";
392*4882a593Smuzhiyun	pinctrl-0 = <&pinctrl_uart1_default>;
393*4882a593Smuzhiyun};
394*4882a593Smuzhiyun
395*4882a593Smuzhiyun&usb0 {
396*4882a593Smuzhiyun	status = "okay";
397*4882a593Smuzhiyun	dr_mode = "host";
398*4882a593Smuzhiyun	usb-phy = <&usb_phy0>;
399*4882a593Smuzhiyun	pinctrl-names = "default";
400*4882a593Smuzhiyun	pinctrl-0 = <&pinctrl_usb0_default>;
401*4882a593Smuzhiyun};
402