1*4882a593Smuzhiyun/* 2*4882a593Smuzhiyun * Copyright 2015 Vishnu Patekar 3*4882a593Smuzhiyun * Vishnu Patekar <vishnupatekar0510@gmail.com> 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * This file is dual-licensed: you can use it either under the terms 6*4882a593Smuzhiyun * of the GPL or the X11 license, at your option. Note that this dual 7*4882a593Smuzhiyun * licensing only applies to this file, and not this project as a 8*4882a593Smuzhiyun * whole. 9*4882a593Smuzhiyun * 10*4882a593Smuzhiyun * a) This file is free software; you can redistribute it and/or 11*4882a593Smuzhiyun * modify it under the terms of the GNU General Public License as 12*4882a593Smuzhiyun * published by the Free Software Foundation; either version 2 of the 13*4882a593Smuzhiyun * License, or (at your option) any later version. 14*4882a593Smuzhiyun * 15*4882a593Smuzhiyun * This file is distributed in the hope that it will be useful, 16*4882a593Smuzhiyun * but WITHOUT ANY WARRANTY; without even the implied warranty of 17*4882a593Smuzhiyun * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18*4882a593Smuzhiyun * GNU General Public License for more details. 19*4882a593Smuzhiyun * 20*4882a593Smuzhiyun * Or, alternatively, 21*4882a593Smuzhiyun * 22*4882a593Smuzhiyun * b) Permission is hereby granted, free of charge, to any person 23*4882a593Smuzhiyun * obtaining a copy of this software and associated documentation 24*4882a593Smuzhiyun * files (the "Software"), to deal in the Software without 25*4882a593Smuzhiyun * restriction, including without limitation the rights to use, 26*4882a593Smuzhiyun * copy, modify, merge, publish, distribute, sublicense, and/or 27*4882a593Smuzhiyun * sell copies of the Software, and to permit persons to whom the 28*4882a593Smuzhiyun * Software is furnished to do so, subject to the following 29*4882a593Smuzhiyun * conditions: 30*4882a593Smuzhiyun * 31*4882a593Smuzhiyun * The above copyright notice and this permission notice shall be 32*4882a593Smuzhiyun * included in all copies or substantial portions of the Software. 33*4882a593Smuzhiyun * 34*4882a593Smuzhiyun * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 35*4882a593Smuzhiyun * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 36*4882a593Smuzhiyun * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 37*4882a593Smuzhiyun * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 38*4882a593Smuzhiyun * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 39*4882a593Smuzhiyun * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 40*4882a593Smuzhiyun * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 41*4882a593Smuzhiyun * OTHER DEALINGS IN THE SOFTWARE. 42*4882a593Smuzhiyun */ 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun/dts-v1/; 45*4882a593Smuzhiyun#include "sun8i-a83t.dtsi" 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h> 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun/ { 50*4882a593Smuzhiyun model = "Allwinner A83T H8Homlet Proto Dev Board v2.0"; 51*4882a593Smuzhiyun compatible = "allwinner,h8homlet-v2", "allwinner,sun8i-a83t"; 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun aliases { 54*4882a593Smuzhiyun serial0 = &uart0; 55*4882a593Smuzhiyun }; 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun chosen { 58*4882a593Smuzhiyun stdout-path = "serial0:115200n8"; 59*4882a593Smuzhiyun }; 60*4882a593Smuzhiyun 61*4882a593Smuzhiyun reg_usb0_vbus: reg-usb0-vbus { 62*4882a593Smuzhiyun compatible = "regulator-fixed"; 63*4882a593Smuzhiyun regulator-name = "usb0-vbus"; 64*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 65*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 66*4882a593Smuzhiyun regulator-boot-on; 67*4882a593Smuzhiyun enable-active-high; 68*4882a593Smuzhiyun gpio = <&r_pio 0 5 GPIO_ACTIVE_HIGH>; /* PL5 */ 69*4882a593Smuzhiyun }; 70*4882a593Smuzhiyun 71*4882a593Smuzhiyun reg_usb1_vbus: reg-usb1-vbus { 72*4882a593Smuzhiyun compatible = "regulator-fixed"; 73*4882a593Smuzhiyun regulator-name = "usb1-vbus"; 74*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 75*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 76*4882a593Smuzhiyun regulator-boot-on; 77*4882a593Smuzhiyun enable-active-high; 78*4882a593Smuzhiyun gpio = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */ 79*4882a593Smuzhiyun }; 80*4882a593Smuzhiyun}; 81*4882a593Smuzhiyun 82*4882a593Smuzhiyun&cpu0 { 83*4882a593Smuzhiyun cpu-supply = <®_dcdc2>; 84*4882a593Smuzhiyun}; 85*4882a593Smuzhiyun 86*4882a593Smuzhiyun&cpu100 { 87*4882a593Smuzhiyun cpu-supply = <®_dcdc3>; 88*4882a593Smuzhiyun}; 89*4882a593Smuzhiyun 90*4882a593Smuzhiyun&ehci0 { 91*4882a593Smuzhiyun status = "okay"; 92*4882a593Smuzhiyun}; 93*4882a593Smuzhiyun 94*4882a593Smuzhiyun&mmc0 { 95*4882a593Smuzhiyun pinctrl-names = "default"; 96*4882a593Smuzhiyun pinctrl-0 = <&mmc0_pins>; 97*4882a593Smuzhiyun vmmc-supply = <®_dcdc1>; 98*4882a593Smuzhiyun cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ 99*4882a593Smuzhiyun bus-width = <4>; 100*4882a593Smuzhiyun status = "okay"; 101*4882a593Smuzhiyun}; 102*4882a593Smuzhiyun 103*4882a593Smuzhiyun&mmc2 { 104*4882a593Smuzhiyun pinctrl-names = "default"; 105*4882a593Smuzhiyun pinctrl-0 = <&mmc2_8bit_emmc_pins>; 106*4882a593Smuzhiyun vmmc-supply = <®_dcdc1>; 107*4882a593Smuzhiyun vqmmc-supply = <®_dcdc1>; 108*4882a593Smuzhiyun bus-width = <8>; 109*4882a593Smuzhiyun non-removable; 110*4882a593Smuzhiyun cap-mmc-hw-reset; 111*4882a593Smuzhiyun status = "okay"; 112*4882a593Smuzhiyun}; 113*4882a593Smuzhiyun 114*4882a593Smuzhiyun&ohci0 { 115*4882a593Smuzhiyun status = "okay"; 116*4882a593Smuzhiyun}; 117*4882a593Smuzhiyun 118*4882a593Smuzhiyun&r_rsb { 119*4882a593Smuzhiyun status = "okay"; 120*4882a593Smuzhiyun 121*4882a593Smuzhiyun axp81x: pmic@3a3 { 122*4882a593Smuzhiyun compatible = "x-powers,axp818", "x-powers,axp813"; 123*4882a593Smuzhiyun reg = <0x3a3>; 124*4882a593Smuzhiyun interrupt-parent = <&r_intc>; 125*4882a593Smuzhiyun interrupts = <0 IRQ_TYPE_LEVEL_LOW>; 126*4882a593Smuzhiyun eldoin-supply = <®_dcdc1>; 127*4882a593Smuzhiyun swin-supply = <®_dcdc1>; 128*4882a593Smuzhiyun }; 129*4882a593Smuzhiyun 130*4882a593Smuzhiyun ac100: codec@e89 { 131*4882a593Smuzhiyun compatible = "x-powers,ac100"; 132*4882a593Smuzhiyun reg = <0xe89>; 133*4882a593Smuzhiyun 134*4882a593Smuzhiyun ac100_codec: codec { 135*4882a593Smuzhiyun compatible = "x-powers,ac100-codec"; 136*4882a593Smuzhiyun interrupt-parent = <&r_pio>; 137*4882a593Smuzhiyun interrupts = <0 11 IRQ_TYPE_LEVEL_LOW>; /* PL11 */ 138*4882a593Smuzhiyun #clock-cells = <0>; 139*4882a593Smuzhiyun clock-output-names = "4M_adda"; 140*4882a593Smuzhiyun }; 141*4882a593Smuzhiyun 142*4882a593Smuzhiyun ac100_rtc: rtc { 143*4882a593Smuzhiyun compatible = "x-powers,ac100-rtc"; 144*4882a593Smuzhiyun interrupt-parent = <&r_intc>; 145*4882a593Smuzhiyun interrupts = <0 IRQ_TYPE_LEVEL_LOW>; 146*4882a593Smuzhiyun clocks = <&ac100_codec>; 147*4882a593Smuzhiyun #clock-cells = <1>; 148*4882a593Smuzhiyun clock-output-names = "cko1_rtc", 149*4882a593Smuzhiyun "cko2_rtc", 150*4882a593Smuzhiyun "cko3_rtc"; 151*4882a593Smuzhiyun }; 152*4882a593Smuzhiyun }; 153*4882a593Smuzhiyun}; 154*4882a593Smuzhiyun 155*4882a593Smuzhiyun#include "axp81x.dtsi" 156*4882a593Smuzhiyun 157*4882a593Smuzhiyun&ac_power_supply { 158*4882a593Smuzhiyun status = "okay"; 159*4882a593Smuzhiyun}; 160*4882a593Smuzhiyun 161*4882a593Smuzhiyun®_aldo1 { 162*4882a593Smuzhiyun regulator-always-on; 163*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 164*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 165*4882a593Smuzhiyun regulator-name = "vcc-1v8"; 166*4882a593Smuzhiyun}; 167*4882a593Smuzhiyun 168*4882a593Smuzhiyun®_aldo2 { 169*4882a593Smuzhiyun regulator-always-on; 170*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 171*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 172*4882a593Smuzhiyun regulator-name = "dram-pll"; 173*4882a593Smuzhiyun}; 174*4882a593Smuzhiyun 175*4882a593Smuzhiyun®_aldo3 { 176*4882a593Smuzhiyun regulator-always-on; 177*4882a593Smuzhiyun regulator-min-microvolt = <3000000>; 178*4882a593Smuzhiyun regulator-max-microvolt = <3000000>; 179*4882a593Smuzhiyun regulator-name = "avcc"; 180*4882a593Smuzhiyun}; 181*4882a593Smuzhiyun 182*4882a593Smuzhiyun®_dcdc1 { 183*4882a593Smuzhiyun regulator-always-on; 184*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 185*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 186*4882a593Smuzhiyun regulator-name = "vcc-3v3"; 187*4882a593Smuzhiyun}; 188*4882a593Smuzhiyun 189*4882a593Smuzhiyun®_dcdc2 { 190*4882a593Smuzhiyun regulator-always-on; 191*4882a593Smuzhiyun regulator-min-microvolt = <700000>; 192*4882a593Smuzhiyun regulator-max-microvolt = <1100000>; 193*4882a593Smuzhiyun regulator-name = "vdd-cpua"; 194*4882a593Smuzhiyun}; 195*4882a593Smuzhiyun 196*4882a593Smuzhiyun®_dcdc3 { 197*4882a593Smuzhiyun regulator-always-on; 198*4882a593Smuzhiyun regulator-min-microvolt = <700000>; 199*4882a593Smuzhiyun regulator-max-microvolt = <1100000>; 200*4882a593Smuzhiyun regulator-name = "vdd-cpub"; 201*4882a593Smuzhiyun}; 202*4882a593Smuzhiyun 203*4882a593Smuzhiyun®_dcdc4 { 204*4882a593Smuzhiyun regulator-min-microvolt = <700000>; 205*4882a593Smuzhiyun regulator-max-microvolt = <1100000>; 206*4882a593Smuzhiyun regulator-name = "vdd-gpu"; 207*4882a593Smuzhiyun}; 208*4882a593Smuzhiyun 209*4882a593Smuzhiyun®_dcdc5 { 210*4882a593Smuzhiyun regulator-always-on; 211*4882a593Smuzhiyun regulator-min-microvolt = <1500000>; 212*4882a593Smuzhiyun regulator-max-microvolt = <1500000>; 213*4882a593Smuzhiyun regulator-name = "vcc-dram"; 214*4882a593Smuzhiyun}; 215*4882a593Smuzhiyun 216*4882a593Smuzhiyun®_dcdc6 { 217*4882a593Smuzhiyun regulator-always-on; 218*4882a593Smuzhiyun regulator-min-microvolt = <900000>; 219*4882a593Smuzhiyun regulator-max-microvolt = <900000>; 220*4882a593Smuzhiyun regulator-name = "vdd-sys"; 221*4882a593Smuzhiyun}; 222*4882a593Smuzhiyun 223*4882a593Smuzhiyun®_dldo2 { 224*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 225*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 226*4882a593Smuzhiyun regulator-name = "vcc-mipi"; 227*4882a593Smuzhiyun}; 228*4882a593Smuzhiyun 229*4882a593Smuzhiyun®_dldo4 { 230*4882a593Smuzhiyun /* 231*4882a593Smuzhiyun * The PHY requires 20ms after all voltages are applied until core 232*4882a593Smuzhiyun * logic is ready and 30ms after the reset pin is de-asserted. 233*4882a593Smuzhiyun * Set a 100ms delay to account for PMIC ramp time and board traces. 234*4882a593Smuzhiyun */ 235*4882a593Smuzhiyun regulator-enable-ramp-delay = <100000>; 236*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 237*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 238*4882a593Smuzhiyun regulator-name = "vcc-ephy"; 239*4882a593Smuzhiyun}; 240*4882a593Smuzhiyun 241*4882a593Smuzhiyun®_fldo1 { 242*4882a593Smuzhiyun regulator-min-microvolt = <1080000>; 243*4882a593Smuzhiyun regulator-max-microvolt = <1320000>; 244*4882a593Smuzhiyun regulator-name = "vdd12-hsic"; 245*4882a593Smuzhiyun}; 246*4882a593Smuzhiyun 247*4882a593Smuzhiyun®_fldo2 { 248*4882a593Smuzhiyun /* 249*4882a593Smuzhiyun * Despite the embedded CPUs core not being used in any way, 250*4882a593Smuzhiyun * this must remain on or the system will hang. 251*4882a593Smuzhiyun */ 252*4882a593Smuzhiyun regulator-always-on; 253*4882a593Smuzhiyun regulator-min-microvolt = <700000>; 254*4882a593Smuzhiyun regulator-max-microvolt = <1100000>; 255*4882a593Smuzhiyun regulator-name = "vdd-cpus"; 256*4882a593Smuzhiyun}; 257*4882a593Smuzhiyun 258*4882a593Smuzhiyun®_rtc_ldo { 259*4882a593Smuzhiyun regulator-name = "vcc-rtc"; 260*4882a593Smuzhiyun}; 261*4882a593Smuzhiyun 262*4882a593Smuzhiyun®_sw { 263*4882a593Smuzhiyun regulator-name = "vcc-wifi"; 264*4882a593Smuzhiyun}; 265*4882a593Smuzhiyun 266*4882a593Smuzhiyun&uart0 { 267*4882a593Smuzhiyun pinctrl-names = "default"; 268*4882a593Smuzhiyun pinctrl-0 = <&uart0_pb_pins>; 269*4882a593Smuzhiyun status = "okay"; 270*4882a593Smuzhiyun}; 271*4882a593Smuzhiyun 272*4882a593Smuzhiyun&usbphy { 273*4882a593Smuzhiyun usb0_vbus-supply = <®_usb0_vbus>; 274*4882a593Smuzhiyun usb1_vbus-supply = <®_usb1_vbus>; 275*4882a593Smuzhiyun status = "okay"; 276*4882a593Smuzhiyun}; 277*4882a593Smuzhiyun 278*4882a593Smuzhiyun&usb_otg { 279*4882a593Smuzhiyun dr_mode = "host"; 280*4882a593Smuzhiyun status = "okay"; 281*4882a593Smuzhiyun}; 282