1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Device Tree Source for A20-SOM204-EVB Board 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (C) 2018 Olimex Ltd. 6*4882a593Smuzhiyun * Author: Stefan Mavrodiev <stefan@olimex.com> 7*4882a593Smuzhiyun */ 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun/dts-v1/; 10*4882a593Smuzhiyun#include "sun7i-a20.dtsi" 11*4882a593Smuzhiyun#include "sunxi-common-regulators.dtsi" 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h> 15*4882a593Smuzhiyun#include <dt-bindings/interrupt-controller/irq.h> 16*4882a593Smuzhiyun#include <dt-bindings/pwm/pwm.h> 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun/ { 19*4882a593Smuzhiyun model = "Olimex A20-SOM204-EVB"; 20*4882a593Smuzhiyun compatible = "olimex,a20-olimex-som204-evb", "allwinner,sun7i-a20"; 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun aliases { 23*4882a593Smuzhiyun serial0 = &uart0; 24*4882a593Smuzhiyun serial1 = &uart4; 25*4882a593Smuzhiyun serial2 = &uart7; 26*4882a593Smuzhiyun spi0 = &spi1; 27*4882a593Smuzhiyun spi1 = &spi2; 28*4882a593Smuzhiyun ethernet1 = &rtl8723bs; 29*4882a593Smuzhiyun }; 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun chosen { 32*4882a593Smuzhiyun stdout-path = "serial0:115200n8"; 33*4882a593Smuzhiyun }; 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun hdmi-connector { 36*4882a593Smuzhiyun compatible = "hdmi-connector"; 37*4882a593Smuzhiyun type = "a"; 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun port { 40*4882a593Smuzhiyun hdmi_con_in: endpoint { 41*4882a593Smuzhiyun remote-endpoint = <&hdmi_out_con>; 42*4882a593Smuzhiyun }; 43*4882a593Smuzhiyun }; 44*4882a593Smuzhiyun }; 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun leds { 47*4882a593Smuzhiyun compatible = "gpio-leds"; 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun stat { 50*4882a593Smuzhiyun label = "a20-som204-evb:green:stat"; 51*4882a593Smuzhiyun gpios = <&pio 8 0 GPIO_ACTIVE_HIGH>; 52*4882a593Smuzhiyun default-state = "on"; 53*4882a593Smuzhiyun }; 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun led1 { 56*4882a593Smuzhiyun label = "a20-som204-evb:green:led1"; 57*4882a593Smuzhiyun gpios = <&pio 8 10 GPIO_ACTIVE_HIGH>; 58*4882a593Smuzhiyun default-state = "on"; 59*4882a593Smuzhiyun }; 60*4882a593Smuzhiyun 61*4882a593Smuzhiyun led2 { 62*4882a593Smuzhiyun label = "a20-som204-evb:yellow:led2"; 63*4882a593Smuzhiyun gpios = <&pio 8 11 GPIO_ACTIVE_HIGH>; 64*4882a593Smuzhiyun default-state = "on"; 65*4882a593Smuzhiyun }; 66*4882a593Smuzhiyun }; 67*4882a593Smuzhiyun 68*4882a593Smuzhiyun rtl_pwrseq: rtl_pwrseq { 69*4882a593Smuzhiyun compatible = "mmc-pwrseq-simple"; 70*4882a593Smuzhiyun reset-gpios = <&pio 6 9 GPIO_ACTIVE_LOW>; 71*4882a593Smuzhiyun }; 72*4882a593Smuzhiyun}; 73*4882a593Smuzhiyun 74*4882a593Smuzhiyun&ahci { 75*4882a593Smuzhiyun target-supply = <®_ahci_5v>; 76*4882a593Smuzhiyun status = "okay"; 77*4882a593Smuzhiyun}; 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun&can0 { 80*4882a593Smuzhiyun pinctrl-names = "default"; 81*4882a593Smuzhiyun pinctrl-0 = <&can_ph_pins>; 82*4882a593Smuzhiyun status = "okay"; 83*4882a593Smuzhiyun}; 84*4882a593Smuzhiyun 85*4882a593Smuzhiyun&codec { 86*4882a593Smuzhiyun status = "okay"; 87*4882a593Smuzhiyun}; 88*4882a593Smuzhiyun 89*4882a593Smuzhiyun&cpu0 { 90*4882a593Smuzhiyun cpu-supply = <®_dcdc2>; 91*4882a593Smuzhiyun}; 92*4882a593Smuzhiyun 93*4882a593Smuzhiyun&de { 94*4882a593Smuzhiyun status = "okay"; 95*4882a593Smuzhiyun}; 96*4882a593Smuzhiyun 97*4882a593Smuzhiyun&ehci0 { 98*4882a593Smuzhiyun status = "okay"; 99*4882a593Smuzhiyun}; 100*4882a593Smuzhiyun 101*4882a593Smuzhiyun&ehci1 { 102*4882a593Smuzhiyun status = "okay"; 103*4882a593Smuzhiyun}; 104*4882a593Smuzhiyun 105*4882a593Smuzhiyun&gmac { 106*4882a593Smuzhiyun pinctrl-names = "default"; 107*4882a593Smuzhiyun pinctrl-0 = <&gmac_rgmii_pins>; 108*4882a593Smuzhiyun phy-handle = <&phy3>; 109*4882a593Smuzhiyun phy-mode = "rgmii"; 110*4882a593Smuzhiyun phy-supply = <®_vcc3v3>; 111*4882a593Smuzhiyun status = "okay"; 112*4882a593Smuzhiyun}; 113*4882a593Smuzhiyun 114*4882a593Smuzhiyun&hdmi { 115*4882a593Smuzhiyun status = "okay"; 116*4882a593Smuzhiyun}; 117*4882a593Smuzhiyun 118*4882a593Smuzhiyun&hdmi_out { 119*4882a593Smuzhiyun hdmi_out_con: endpoint { 120*4882a593Smuzhiyun remote-endpoint = <&hdmi_con_in>; 121*4882a593Smuzhiyun }; 122*4882a593Smuzhiyun}; 123*4882a593Smuzhiyun 124*4882a593Smuzhiyun&i2c0 { 125*4882a593Smuzhiyun status = "okay"; 126*4882a593Smuzhiyun 127*4882a593Smuzhiyun axp209: pmic@34 { 128*4882a593Smuzhiyun reg = <0x34>; 129*4882a593Smuzhiyun interrupt-parent = <&nmi_intc>; 130*4882a593Smuzhiyun interrupts = <0 IRQ_TYPE_LEVEL_LOW>; 131*4882a593Smuzhiyun }; 132*4882a593Smuzhiyun}; 133*4882a593Smuzhiyun 134*4882a593Smuzhiyun/* Exposed to UEXT1 */ 135*4882a593Smuzhiyun&i2c1 { 136*4882a593Smuzhiyun status = "okay"; 137*4882a593Smuzhiyun 138*4882a593Smuzhiyun eeprom: eeprom@50 { 139*4882a593Smuzhiyun compatible = "atmel,24c16"; 140*4882a593Smuzhiyun reg = <0x50>; 141*4882a593Smuzhiyun pagesize = <16>; 142*4882a593Smuzhiyun }; 143*4882a593Smuzhiyun}; 144*4882a593Smuzhiyun 145*4882a593Smuzhiyun/* Exposed to UEXT2 */ 146*4882a593Smuzhiyun&i2c2 { 147*4882a593Smuzhiyun status = "okay"; 148*4882a593Smuzhiyun}; 149*4882a593Smuzhiyun 150*4882a593Smuzhiyun&ir0 { 151*4882a593Smuzhiyun pinctrl-names = "default"; 152*4882a593Smuzhiyun pinctrl-0 = <&ir0_rx_pin>; 153*4882a593Smuzhiyun status = "okay"; 154*4882a593Smuzhiyun}; 155*4882a593Smuzhiyun 156*4882a593Smuzhiyun&gmac_mdio { 157*4882a593Smuzhiyun phy3: ethernet-phy@3 { 158*4882a593Smuzhiyun reg = <3>; 159*4882a593Smuzhiyun reset-gpios = <&pio 0 17 GPIO_ACTIVE_LOW>; /* PA17 */ 160*4882a593Smuzhiyun reset-assert-us = <10000>; 161*4882a593Smuzhiyun /* wait 1s after reset, otherwise fail to read phy id */ 162*4882a593Smuzhiyun reset-deassert-us = <1000000>; 163*4882a593Smuzhiyun }; 164*4882a593Smuzhiyun}; 165*4882a593Smuzhiyun 166*4882a593Smuzhiyun&mmc0 { 167*4882a593Smuzhiyun vmmc-supply = <®_vcc3v3>; 168*4882a593Smuzhiyun bus-width = <4>; 169*4882a593Smuzhiyun cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; 170*4882a593Smuzhiyun status = "okay"; 171*4882a593Smuzhiyun}; 172*4882a593Smuzhiyun 173*4882a593Smuzhiyun&mmc3 { 174*4882a593Smuzhiyun vmmc-supply = <®_vcc3v3>; 175*4882a593Smuzhiyun mmc-pwrseq = <&rtl_pwrseq>; 176*4882a593Smuzhiyun bus-width = <4>; 177*4882a593Smuzhiyun non-removable; 178*4882a593Smuzhiyun status = "okay"; 179*4882a593Smuzhiyun 180*4882a593Smuzhiyun rtl8723bs: sdio_wifi@1 { 181*4882a593Smuzhiyun reg = <1>; 182*4882a593Smuzhiyun }; 183*4882a593Smuzhiyun}; 184*4882a593Smuzhiyun 185*4882a593Smuzhiyun&ohci0 { 186*4882a593Smuzhiyun status = "okay"; 187*4882a593Smuzhiyun}; 188*4882a593Smuzhiyun 189*4882a593Smuzhiyun&ohci1 { 190*4882a593Smuzhiyun status = "okay"; 191*4882a593Smuzhiyun}; 192*4882a593Smuzhiyun 193*4882a593Smuzhiyun&otg_sram { 194*4882a593Smuzhiyun status = "okay"; 195*4882a593Smuzhiyun}; 196*4882a593Smuzhiyun 197*4882a593Smuzhiyun&pio { 198*4882a593Smuzhiyun uart3_rts_pin: uart3-rts-pin { 199*4882a593Smuzhiyun pins = "PG8"; 200*4882a593Smuzhiyun function = "uart3"; 201*4882a593Smuzhiyun }; 202*4882a593Smuzhiyun}; 203*4882a593Smuzhiyun 204*4882a593Smuzhiyun#include "axp209.dtsi" 205*4882a593Smuzhiyun 206*4882a593Smuzhiyun&ac_power_supply { 207*4882a593Smuzhiyun status = "okay"; 208*4882a593Smuzhiyun}; 209*4882a593Smuzhiyun 210*4882a593Smuzhiyun&battery_power_supply { 211*4882a593Smuzhiyun status = "okay"; 212*4882a593Smuzhiyun}; 213*4882a593Smuzhiyun 214*4882a593Smuzhiyun®_ahci_5v { 215*4882a593Smuzhiyun gpio = <&pio 2 3 GPIO_ACTIVE_HIGH>; 216*4882a593Smuzhiyun status = "okay"; 217*4882a593Smuzhiyun}; 218*4882a593Smuzhiyun 219*4882a593Smuzhiyun®_dcdc2 { 220*4882a593Smuzhiyun regulator-always-on; 221*4882a593Smuzhiyun regulator-min-microvolt = <1000000>; 222*4882a593Smuzhiyun regulator-max-microvolt = <1400000>; 223*4882a593Smuzhiyun regulator-name = "vdd-cpu"; 224*4882a593Smuzhiyun}; 225*4882a593Smuzhiyun 226*4882a593Smuzhiyun®_dcdc3 { 227*4882a593Smuzhiyun regulator-always-on; 228*4882a593Smuzhiyun regulator-min-microvolt = <1000000>; 229*4882a593Smuzhiyun regulator-max-microvolt = <1400000>; 230*4882a593Smuzhiyun regulator-name = "vdd-int-dll"; 231*4882a593Smuzhiyun}; 232*4882a593Smuzhiyun 233*4882a593Smuzhiyun®_ldo1 { 234*4882a593Smuzhiyun regulator-always-on; 235*4882a593Smuzhiyun regulator-min-microvolt = <1300000>; 236*4882a593Smuzhiyun regulator-max-microvolt = <1300000>; 237*4882a593Smuzhiyun regulator-name = "vdd-rtc"; 238*4882a593Smuzhiyun}; 239*4882a593Smuzhiyun 240*4882a593Smuzhiyun®_ldo2 { 241*4882a593Smuzhiyun regulator-always-on; 242*4882a593Smuzhiyun regulator-min-microvolt = <3000000>; 243*4882a593Smuzhiyun regulator-max-microvolt = <3000000>; 244*4882a593Smuzhiyun regulator-name = "avcc"; 245*4882a593Smuzhiyun}; 246*4882a593Smuzhiyun 247*4882a593Smuzhiyun®_ldo4 { 248*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 249*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 250*4882a593Smuzhiyun regulator-name = "vcc-pg"; 251*4882a593Smuzhiyun}; 252*4882a593Smuzhiyun 253*4882a593Smuzhiyun®_usb0_vbus { 254*4882a593Smuzhiyun gpio = <&pio 2 17 GPIO_ACTIVE_HIGH>; 255*4882a593Smuzhiyun status = "okay"; 256*4882a593Smuzhiyun}; 257*4882a593Smuzhiyun 258*4882a593Smuzhiyun®_usb1_vbus { 259*4882a593Smuzhiyun status = "okay"; 260*4882a593Smuzhiyun}; 261*4882a593Smuzhiyun 262*4882a593Smuzhiyun®_usb2_vbus { 263*4882a593Smuzhiyun status = "okay"; 264*4882a593Smuzhiyun}; 265*4882a593Smuzhiyun 266*4882a593Smuzhiyun/* Exposed to UEXT1 */ 267*4882a593Smuzhiyun&spi1 { 268*4882a593Smuzhiyun pinctrl-names = "default"; 269*4882a593Smuzhiyun pinctrl-0 = <&spi1_pi_pins>, 270*4882a593Smuzhiyun <&spi1_cs0_pi_pin>; 271*4882a593Smuzhiyun status = "okay"; 272*4882a593Smuzhiyun}; 273*4882a593Smuzhiyun 274*4882a593Smuzhiyun/* Exposed to UEXT2 */ 275*4882a593Smuzhiyun&spi2 { 276*4882a593Smuzhiyun pinctrl-names = "default"; 277*4882a593Smuzhiyun pinctrl-0 = <&spi2_pc_pins>, 278*4882a593Smuzhiyun <&spi2_cs0_pc_pin>; 279*4882a593Smuzhiyun status = "okay"; 280*4882a593Smuzhiyun}; 281*4882a593Smuzhiyun 282*4882a593Smuzhiyun&uart0 { 283*4882a593Smuzhiyun pinctrl-names = "default"; 284*4882a593Smuzhiyun pinctrl-0 = <&uart0_pb_pins>; 285*4882a593Smuzhiyun status = "okay"; 286*4882a593Smuzhiyun}; 287*4882a593Smuzhiyun 288*4882a593Smuzhiyun/* Used for RTL8723BS bluetooth */ 289*4882a593Smuzhiyun&uart3 { 290*4882a593Smuzhiyun pinctrl-names = "default"; 291*4882a593Smuzhiyun pinctrl-0 = <&uart3_pg_pins>, <&uart3_rts_pin>; 292*4882a593Smuzhiyun status = "okay"; 293*4882a593Smuzhiyun}; 294*4882a593Smuzhiyun 295*4882a593Smuzhiyun/* Exposed to UEXT1 */ 296*4882a593Smuzhiyun&uart4 { 297*4882a593Smuzhiyun pinctrl-names = "default"; 298*4882a593Smuzhiyun pinctrl-0 = <&uart4_pg_pins>; 299*4882a593Smuzhiyun status = "okay"; 300*4882a593Smuzhiyun}; 301*4882a593Smuzhiyun 302*4882a593Smuzhiyun/* Exposed to UEXT2 */ 303*4882a593Smuzhiyun&uart7 { 304*4882a593Smuzhiyun pinctrl-names = "default"; 305*4882a593Smuzhiyun pinctrl-0 = <&uart7_pi_pins>; 306*4882a593Smuzhiyun status = "okay"; 307*4882a593Smuzhiyun}; 308*4882a593Smuzhiyun 309*4882a593Smuzhiyun&usb_otg { 310*4882a593Smuzhiyun dr_mode = "otg"; 311*4882a593Smuzhiyun status = "okay"; 312*4882a593Smuzhiyun}; 313*4882a593Smuzhiyun 314*4882a593Smuzhiyun&usb_power_supply { 315*4882a593Smuzhiyun status = "okay"; 316*4882a593Smuzhiyun}; 317*4882a593Smuzhiyun 318*4882a593Smuzhiyun&usbphy { 319*4882a593Smuzhiyun usb0_id_det-gpios = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ 320*4882a593Smuzhiyun usb0_vbus_det-gpios = <&pio 7 5 GPIO_ACTIVE_HIGH>; /* PH5 */ 321*4882a593Smuzhiyun usb0_vbus_power-supply = <&usb_power_supply>; 322*4882a593Smuzhiyun usb0_vbus-supply = <®_usb0_vbus>; 323*4882a593Smuzhiyun usb1_vbus-supply = <®_usb1_vbus>; 324*4882a593Smuzhiyun usb2_vbus-supply = <®_usb2_vbus>; 325*4882a593Smuzhiyun status = "okay"; 326*4882a593Smuzhiyun}; 327