xref: /OK3568_Linux_fs/kernel/scripts/dtc/include-prefixes/arm/sun5i-gr8.dtsi (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun/*
2*4882a593Smuzhiyun * Copyright 2016 Mylène Josserand
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Mylène Josserand <mylene.josserand@free-electrons.com>
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * This file is dual-licensed: you can use it either under the terms
7*4882a593Smuzhiyun * of the GPL or the X11 license, at your option. Note that this dual
8*4882a593Smuzhiyun * licensing only applies to this file, and not this project as a
9*4882a593Smuzhiyun * whole.
10*4882a593Smuzhiyun *
11*4882a593Smuzhiyun *  a) This library is free software; you can redistribute it and/or
12*4882a593Smuzhiyun *     modify it under the terms of the GNU General Public License as
13*4882a593Smuzhiyun *     published by the Free Software Foundation; either version 2 of the
14*4882a593Smuzhiyun *     License, or (at your option) any later version.
15*4882a593Smuzhiyun *
16*4882a593Smuzhiyun *     This library is distributed in the hope that it will be useful,
17*4882a593Smuzhiyun *     but WITHOUT ANY WARRANTY; without even the implied warranty of
18*4882a593Smuzhiyun *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
19*4882a593Smuzhiyun *     GNU General Public License for more details.
20*4882a593Smuzhiyun *
21*4882a593Smuzhiyun * Or, alternatively,
22*4882a593Smuzhiyun *
23*4882a593Smuzhiyun *  b) Permission is hereby granted, free of charge, to any person
24*4882a593Smuzhiyun *     obtaining a copy of this software and associated documentation
25*4882a593Smuzhiyun *     files (the "Software"), to deal in the Software without
26*4882a593Smuzhiyun *     restriction, including without limitation the rights to use,
27*4882a593Smuzhiyun *     copy, modify, merge, publish, distribute, sublicense, and/or
28*4882a593Smuzhiyun *     sell copies of the Software, and to permit persons to whom the
29*4882a593Smuzhiyun *     Software is furnished to do so, subject to the following
30*4882a593Smuzhiyun *     conditions:
31*4882a593Smuzhiyun *
32*4882a593Smuzhiyun *     The above copyright notice and this permission notice shall be
33*4882a593Smuzhiyun *     included in all copies or substantial portions of the Software.
34*4882a593Smuzhiyun *
35*4882a593Smuzhiyun *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
36*4882a593Smuzhiyun *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
37*4882a593Smuzhiyun *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
38*4882a593Smuzhiyun *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
39*4882a593Smuzhiyun *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
40*4882a593Smuzhiyun *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
41*4882a593Smuzhiyun *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
42*4882a593Smuzhiyun *     OTHER DEALINGS IN THE SOFTWARE.
43*4882a593Smuzhiyun */
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun#include "sun5i.dtsi"
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun#include <dt-bindings/clock/sun5i-ccu.h>
48*4882a593Smuzhiyun#include <dt-bindings/dma/sun4i-a10.h>
49*4882a593Smuzhiyun#include <dt-bindings/reset/sun5i-ccu.h>
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun/ {
52*4882a593Smuzhiyun	display-engine {
53*4882a593Smuzhiyun		compatible = "allwinner,sun5i-a13-display-engine";
54*4882a593Smuzhiyun		allwinner,pipelines = <&fe0>;
55*4882a593Smuzhiyun	};
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun	soc {
58*4882a593Smuzhiyun		pwm: pwm@1c20e00 {
59*4882a593Smuzhiyun			compatible = "allwinner,sun5i-a10s-pwm";
60*4882a593Smuzhiyun			reg = <0x01c20e00 0xc>;
61*4882a593Smuzhiyun			clocks = <&ccu CLK_HOSC>;
62*4882a593Smuzhiyun			#pwm-cells = <3>;
63*4882a593Smuzhiyun			status = "disabled";
64*4882a593Smuzhiyun		};
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun		spdif: spdif@1c21000 {
67*4882a593Smuzhiyun			#sound-dai-cells = <0>;
68*4882a593Smuzhiyun			compatible = "allwinner,sun4i-a10-spdif";
69*4882a593Smuzhiyun			reg = <0x01c21000 0x400>;
70*4882a593Smuzhiyun			interrupts = <13>;
71*4882a593Smuzhiyun			clocks = <&ccu CLK_APB0_SPDIF>, <&ccu CLK_SPDIF>;
72*4882a593Smuzhiyun			clock-names = "apb", "spdif";
73*4882a593Smuzhiyun			dmas = <&dma SUN4I_DMA_NORMAL 2>,
74*4882a593Smuzhiyun			       <&dma SUN4I_DMA_NORMAL 2>;
75*4882a593Smuzhiyun			dma-names = "rx", "tx";
76*4882a593Smuzhiyun			status = "disabled";
77*4882a593Smuzhiyun		};
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun		i2s0: i2s@1c22400 {
80*4882a593Smuzhiyun			#sound-dai-cells = <0>;
81*4882a593Smuzhiyun			compatible = "allwinner,sun4i-a10-i2s";
82*4882a593Smuzhiyun			reg = <0x01c22400 0x400>;
83*4882a593Smuzhiyun			interrupts = <16>;
84*4882a593Smuzhiyun			clocks = <&ccu CLK_APB0_I2S>, <&ccu CLK_I2S>;
85*4882a593Smuzhiyun			clock-names = "apb", "mod";
86*4882a593Smuzhiyun			dmas = <&dma SUN4I_DMA_NORMAL 3>,
87*4882a593Smuzhiyun			       <&dma SUN4I_DMA_NORMAL 3>;
88*4882a593Smuzhiyun			dma-names = "rx", "tx";
89*4882a593Smuzhiyun			status = "disabled";
90*4882a593Smuzhiyun		};
91*4882a593Smuzhiyun	};
92*4882a593Smuzhiyun};
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun&ccu {
95*4882a593Smuzhiyun	compatible = "nextthing,gr8-ccu";
96*4882a593Smuzhiyun};
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun&pio {
99*4882a593Smuzhiyun	compatible = "nextthing,gr8-pinctrl";
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun	i2s0_data_pins: i2s0-data-pins {
102*4882a593Smuzhiyun		pins = "PB6", "PB7", "PB8", "PB9";
103*4882a593Smuzhiyun		function = "i2s0";
104*4882a593Smuzhiyun	};
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun	i2s0_mclk_pin: i2s0-mclk-pin {
107*4882a593Smuzhiyun		pins = "PB5";
108*4882a593Smuzhiyun		function = "i2s0";
109*4882a593Smuzhiyun	};
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun	pwm1_pins: pwm1-pin {
112*4882a593Smuzhiyun		pins = "PG13";
113*4882a593Smuzhiyun		function = "pwm1";
114*4882a593Smuzhiyun	};
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun	spdif_tx_pin: spdif-tx-pin {
117*4882a593Smuzhiyun		pins = "PB10";
118*4882a593Smuzhiyun		function = "spdif";
119*4882a593Smuzhiyun		bias-pull-up;
120*4882a593Smuzhiyun	};
121*4882a593Smuzhiyun
122*4882a593Smuzhiyun	uart1_cts_rts_pins: uart1-cts-rts-pins {
123*4882a593Smuzhiyun		pins = "PG5", "PG6";
124*4882a593Smuzhiyun		function = "uart1";
125*4882a593Smuzhiyun	};
126*4882a593Smuzhiyun};
127