1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Copyright (C) STMicroelectronics 2019 - All Rights Reserved 4*4882a593Smuzhiyun * Author: Alexandre Torgue <alexandre.torgue@st.com> for STMicroelectronics. 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h> 8*4882a593Smuzhiyun#include <dt-bindings/mfd/st,stpmic1.h> 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun/ { 11*4882a593Smuzhiyun memory@c0000000 { 12*4882a593Smuzhiyun device_type = "memory"; 13*4882a593Smuzhiyun reg = <0xc0000000 0x20000000>; 14*4882a593Smuzhiyun }; 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun reserved-memory { 17*4882a593Smuzhiyun #address-cells = <1>; 18*4882a593Smuzhiyun #size-cells = <1>; 19*4882a593Smuzhiyun ranges; 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun mcuram2: mcuram2@10000000 { 22*4882a593Smuzhiyun compatible = "shared-dma-pool"; 23*4882a593Smuzhiyun reg = <0x10000000 0x40000>; 24*4882a593Smuzhiyun no-map; 25*4882a593Smuzhiyun }; 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun vdev0vring0: vdev0vring0@10040000 { 28*4882a593Smuzhiyun compatible = "shared-dma-pool"; 29*4882a593Smuzhiyun reg = <0x10040000 0x1000>; 30*4882a593Smuzhiyun no-map; 31*4882a593Smuzhiyun }; 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun vdev0vring1: vdev0vring1@10041000 { 34*4882a593Smuzhiyun compatible = "shared-dma-pool"; 35*4882a593Smuzhiyun reg = <0x10041000 0x1000>; 36*4882a593Smuzhiyun no-map; 37*4882a593Smuzhiyun }; 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun vdev0buffer: vdev0buffer@10042000 { 40*4882a593Smuzhiyun compatible = "shared-dma-pool"; 41*4882a593Smuzhiyun reg = <0x10042000 0x4000>; 42*4882a593Smuzhiyun no-map; 43*4882a593Smuzhiyun }; 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun mcuram: mcuram@30000000 { 46*4882a593Smuzhiyun compatible = "shared-dma-pool"; 47*4882a593Smuzhiyun reg = <0x30000000 0x40000>; 48*4882a593Smuzhiyun no-map; 49*4882a593Smuzhiyun }; 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun retram: retram@38000000 { 52*4882a593Smuzhiyun compatible = "shared-dma-pool"; 53*4882a593Smuzhiyun reg = <0x38000000 0x10000>; 54*4882a593Smuzhiyun no-map; 55*4882a593Smuzhiyun }; 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun gpu_reserved: gpu@d4000000 { 58*4882a593Smuzhiyun reg = <0xd4000000 0x4000000>; 59*4882a593Smuzhiyun no-map; 60*4882a593Smuzhiyun }; 61*4882a593Smuzhiyun }; 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun led { 64*4882a593Smuzhiyun compatible = "gpio-leds"; 65*4882a593Smuzhiyun led-blue { 66*4882a593Smuzhiyun label = "heartbeat"; 67*4882a593Smuzhiyun gpios = <&gpiod 11 GPIO_ACTIVE_HIGH>; 68*4882a593Smuzhiyun linux,default-trigger = "heartbeat"; 69*4882a593Smuzhiyun default-state = "off"; 70*4882a593Smuzhiyun }; 71*4882a593Smuzhiyun }; 72*4882a593Smuzhiyun 73*4882a593Smuzhiyun sound { 74*4882a593Smuzhiyun compatible = "audio-graph-card"; 75*4882a593Smuzhiyun label = "STM32MP1-DK"; 76*4882a593Smuzhiyun routing = 77*4882a593Smuzhiyun "Playback" , "MCLK", 78*4882a593Smuzhiyun "Capture" , "MCLK", 79*4882a593Smuzhiyun "MICL" , "Mic Bias"; 80*4882a593Smuzhiyun dais = <&sai2a_port &sai2b_port &i2s2_port>; 81*4882a593Smuzhiyun status = "okay"; 82*4882a593Smuzhiyun }; 83*4882a593Smuzhiyun 84*4882a593Smuzhiyun vin: vin { 85*4882a593Smuzhiyun compatible = "regulator-fixed"; 86*4882a593Smuzhiyun regulator-name = "vin"; 87*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 88*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 89*4882a593Smuzhiyun regulator-always-on; 90*4882a593Smuzhiyun }; 91*4882a593Smuzhiyun}; 92*4882a593Smuzhiyun 93*4882a593Smuzhiyun&adc { 94*4882a593Smuzhiyun pinctrl-names = "default"; 95*4882a593Smuzhiyun pinctrl-0 = <&adc12_ain_pins_a>, <&adc12_usb_cc_pins_a>; 96*4882a593Smuzhiyun vdd-supply = <&vdd>; 97*4882a593Smuzhiyun vdda-supply = <&vdd>; 98*4882a593Smuzhiyun vref-supply = <&vrefbuf>; 99*4882a593Smuzhiyun status = "disabled"; 100*4882a593Smuzhiyun adc1: adc@0 { 101*4882a593Smuzhiyun /* 102*4882a593Smuzhiyun * Type-C USB_PWR_CC1 & USB_PWR_CC2 on in18 & in19. 103*4882a593Smuzhiyun * Use at least 5 * RC time, e.g. 5 * (Rp + Rd) * C: 104*4882a593Smuzhiyun * 5 * (56 + 47kOhms) * 5pF => 2.5us. 105*4882a593Smuzhiyun * Use arbitrary margin here (e.g. 5us). 106*4882a593Smuzhiyun */ 107*4882a593Smuzhiyun st,min-sample-time-nsecs = <5000>; 108*4882a593Smuzhiyun /* AIN connector, USB Type-C CC1 & CC2 */ 109*4882a593Smuzhiyun st,adc-channels = <0 1 6 13 18 19>; 110*4882a593Smuzhiyun status = "okay"; 111*4882a593Smuzhiyun }; 112*4882a593Smuzhiyun adc2: adc@100 { 113*4882a593Smuzhiyun /* AIN connector, USB Type-C CC1 & CC2 */ 114*4882a593Smuzhiyun st,adc-channels = <0 1 2 6 18 19>; 115*4882a593Smuzhiyun st,min-sample-time-nsecs = <5000>; 116*4882a593Smuzhiyun status = "okay"; 117*4882a593Smuzhiyun }; 118*4882a593Smuzhiyun}; 119*4882a593Smuzhiyun 120*4882a593Smuzhiyun&cec { 121*4882a593Smuzhiyun pinctrl-names = "default", "sleep"; 122*4882a593Smuzhiyun pinctrl-0 = <&cec_pins_b>; 123*4882a593Smuzhiyun pinctrl-1 = <&cec_sleep_pins_b>; 124*4882a593Smuzhiyun status = "okay"; 125*4882a593Smuzhiyun}; 126*4882a593Smuzhiyun 127*4882a593Smuzhiyun&dts { 128*4882a593Smuzhiyun status = "okay"; 129*4882a593Smuzhiyun}; 130*4882a593Smuzhiyun 131*4882a593Smuzhiyunðernet0 { 132*4882a593Smuzhiyun status = "okay"; 133*4882a593Smuzhiyun pinctrl-0 = <ðernet0_rgmii_pins_a>; 134*4882a593Smuzhiyun pinctrl-1 = <ðernet0_rgmii_sleep_pins_a>; 135*4882a593Smuzhiyun pinctrl-names = "default", "sleep"; 136*4882a593Smuzhiyun phy-mode = "rgmii-id"; 137*4882a593Smuzhiyun max-speed = <1000>; 138*4882a593Smuzhiyun phy-handle = <&phy0>; 139*4882a593Smuzhiyun 140*4882a593Smuzhiyun mdio0 { 141*4882a593Smuzhiyun #address-cells = <1>; 142*4882a593Smuzhiyun #size-cells = <0>; 143*4882a593Smuzhiyun compatible = "snps,dwmac-mdio"; 144*4882a593Smuzhiyun phy0: ethernet-phy@0 { 145*4882a593Smuzhiyun reg = <0>; 146*4882a593Smuzhiyun }; 147*4882a593Smuzhiyun }; 148*4882a593Smuzhiyun}; 149*4882a593Smuzhiyun 150*4882a593Smuzhiyun&gpu { 151*4882a593Smuzhiyun contiguous-area = <&gpu_reserved>; 152*4882a593Smuzhiyun}; 153*4882a593Smuzhiyun 154*4882a593Smuzhiyun&i2c1 { 155*4882a593Smuzhiyun pinctrl-names = "default", "sleep"; 156*4882a593Smuzhiyun pinctrl-0 = <&i2c1_pins_a>; 157*4882a593Smuzhiyun pinctrl-1 = <&i2c1_sleep_pins_a>; 158*4882a593Smuzhiyun i2c-scl-rising-time-ns = <100>; 159*4882a593Smuzhiyun i2c-scl-falling-time-ns = <7>; 160*4882a593Smuzhiyun status = "okay"; 161*4882a593Smuzhiyun /delete-property/dmas; 162*4882a593Smuzhiyun /delete-property/dma-names; 163*4882a593Smuzhiyun 164*4882a593Smuzhiyun hdmi-transmitter@39 { 165*4882a593Smuzhiyun compatible = "sil,sii9022"; 166*4882a593Smuzhiyun reg = <0x39>; 167*4882a593Smuzhiyun iovcc-supply = <&v3v3_hdmi>; 168*4882a593Smuzhiyun cvcc12-supply = <&v1v2_hdmi>; 169*4882a593Smuzhiyun reset-gpios = <&gpioa 10 GPIO_ACTIVE_LOW>; 170*4882a593Smuzhiyun interrupts = <1 IRQ_TYPE_EDGE_FALLING>; 171*4882a593Smuzhiyun interrupt-parent = <&gpiog>; 172*4882a593Smuzhiyun #sound-dai-cells = <0>; 173*4882a593Smuzhiyun status = "okay"; 174*4882a593Smuzhiyun 175*4882a593Smuzhiyun ports { 176*4882a593Smuzhiyun #address-cells = <1>; 177*4882a593Smuzhiyun #size-cells = <0>; 178*4882a593Smuzhiyun 179*4882a593Smuzhiyun port@0 { 180*4882a593Smuzhiyun reg = <0>; 181*4882a593Smuzhiyun sii9022_in: endpoint { 182*4882a593Smuzhiyun remote-endpoint = <<dc_ep0_out>; 183*4882a593Smuzhiyun }; 184*4882a593Smuzhiyun }; 185*4882a593Smuzhiyun 186*4882a593Smuzhiyun port@3 { 187*4882a593Smuzhiyun reg = <3>; 188*4882a593Smuzhiyun sii9022_tx_endpoint: endpoint { 189*4882a593Smuzhiyun remote-endpoint = <&i2s2_endpoint>; 190*4882a593Smuzhiyun }; 191*4882a593Smuzhiyun }; 192*4882a593Smuzhiyun }; 193*4882a593Smuzhiyun }; 194*4882a593Smuzhiyun 195*4882a593Smuzhiyun cs42l51: cs42l51@4a { 196*4882a593Smuzhiyun compatible = "cirrus,cs42l51"; 197*4882a593Smuzhiyun reg = <0x4a>; 198*4882a593Smuzhiyun #sound-dai-cells = <0>; 199*4882a593Smuzhiyun VL-supply = <&v3v3>; 200*4882a593Smuzhiyun VD-supply = <&v1v8_audio>; 201*4882a593Smuzhiyun VA-supply = <&v1v8_audio>; 202*4882a593Smuzhiyun VAHP-supply = <&v1v8_audio>; 203*4882a593Smuzhiyun reset-gpios = <&gpiog 9 GPIO_ACTIVE_LOW>; 204*4882a593Smuzhiyun clocks = <&sai2a>; 205*4882a593Smuzhiyun clock-names = "MCLK"; 206*4882a593Smuzhiyun status = "okay"; 207*4882a593Smuzhiyun 208*4882a593Smuzhiyun cs42l51_port: port { 209*4882a593Smuzhiyun #address-cells = <1>; 210*4882a593Smuzhiyun #size-cells = <0>; 211*4882a593Smuzhiyun 212*4882a593Smuzhiyun cs42l51_tx_endpoint: endpoint@0 { 213*4882a593Smuzhiyun reg = <0>; 214*4882a593Smuzhiyun remote-endpoint = <&sai2a_endpoint>; 215*4882a593Smuzhiyun frame-master = <&cs42l51_tx_endpoint>; 216*4882a593Smuzhiyun bitclock-master = <&cs42l51_tx_endpoint>; 217*4882a593Smuzhiyun }; 218*4882a593Smuzhiyun 219*4882a593Smuzhiyun cs42l51_rx_endpoint: endpoint@1 { 220*4882a593Smuzhiyun reg = <1>; 221*4882a593Smuzhiyun remote-endpoint = <&sai2b_endpoint>; 222*4882a593Smuzhiyun frame-master = <&cs42l51_rx_endpoint>; 223*4882a593Smuzhiyun bitclock-master = <&cs42l51_rx_endpoint>; 224*4882a593Smuzhiyun }; 225*4882a593Smuzhiyun }; 226*4882a593Smuzhiyun }; 227*4882a593Smuzhiyun}; 228*4882a593Smuzhiyun 229*4882a593Smuzhiyun&i2c4 { 230*4882a593Smuzhiyun pinctrl-names = "default", "sleep"; 231*4882a593Smuzhiyun pinctrl-0 = <&i2c4_pins_a>; 232*4882a593Smuzhiyun pinctrl-1 = <&i2c4_sleep_pins_a>; 233*4882a593Smuzhiyun i2c-scl-rising-time-ns = <185>; 234*4882a593Smuzhiyun i2c-scl-falling-time-ns = <20>; 235*4882a593Smuzhiyun clock-frequency = <400000>; 236*4882a593Smuzhiyun status = "okay"; 237*4882a593Smuzhiyun /* spare dmas for other usage */ 238*4882a593Smuzhiyun /delete-property/dmas; 239*4882a593Smuzhiyun /delete-property/dma-names; 240*4882a593Smuzhiyun 241*4882a593Smuzhiyun pmic: stpmic@33 { 242*4882a593Smuzhiyun compatible = "st,stpmic1"; 243*4882a593Smuzhiyun reg = <0x33>; 244*4882a593Smuzhiyun interrupts-extended = <&gpioa 0 IRQ_TYPE_EDGE_FALLING>; 245*4882a593Smuzhiyun interrupt-controller; 246*4882a593Smuzhiyun #interrupt-cells = <2>; 247*4882a593Smuzhiyun status = "okay"; 248*4882a593Smuzhiyun 249*4882a593Smuzhiyun regulators { 250*4882a593Smuzhiyun compatible = "st,stpmic1-regulators"; 251*4882a593Smuzhiyun buck1-supply = <&vin>; 252*4882a593Smuzhiyun buck2-supply = <&vin>; 253*4882a593Smuzhiyun buck3-supply = <&vin>; 254*4882a593Smuzhiyun buck4-supply = <&vin>; 255*4882a593Smuzhiyun ldo1-supply = <&v3v3>; 256*4882a593Smuzhiyun ldo2-supply = <&vin>; 257*4882a593Smuzhiyun ldo3-supply = <&vdd_ddr>; 258*4882a593Smuzhiyun ldo4-supply = <&vin>; 259*4882a593Smuzhiyun ldo5-supply = <&vin>; 260*4882a593Smuzhiyun ldo6-supply = <&v3v3>; 261*4882a593Smuzhiyun vref_ddr-supply = <&vin>; 262*4882a593Smuzhiyun boost-supply = <&vin>; 263*4882a593Smuzhiyun pwr_sw1-supply = <&bst_out>; 264*4882a593Smuzhiyun pwr_sw2-supply = <&bst_out>; 265*4882a593Smuzhiyun 266*4882a593Smuzhiyun vddcore: buck1 { 267*4882a593Smuzhiyun regulator-name = "vddcore"; 268*4882a593Smuzhiyun regulator-min-microvolt = <1200000>; 269*4882a593Smuzhiyun regulator-max-microvolt = <1350000>; 270*4882a593Smuzhiyun regulator-always-on; 271*4882a593Smuzhiyun regulator-initial-mode = <0>; 272*4882a593Smuzhiyun regulator-over-current-protection; 273*4882a593Smuzhiyun }; 274*4882a593Smuzhiyun 275*4882a593Smuzhiyun vdd_ddr: buck2 { 276*4882a593Smuzhiyun regulator-name = "vdd_ddr"; 277*4882a593Smuzhiyun regulator-min-microvolt = <1350000>; 278*4882a593Smuzhiyun regulator-max-microvolt = <1350000>; 279*4882a593Smuzhiyun regulator-always-on; 280*4882a593Smuzhiyun regulator-initial-mode = <0>; 281*4882a593Smuzhiyun regulator-over-current-protection; 282*4882a593Smuzhiyun }; 283*4882a593Smuzhiyun 284*4882a593Smuzhiyun vdd: buck3 { 285*4882a593Smuzhiyun regulator-name = "vdd"; 286*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 287*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 288*4882a593Smuzhiyun regulator-always-on; 289*4882a593Smuzhiyun st,mask-reset; 290*4882a593Smuzhiyun regulator-initial-mode = <0>; 291*4882a593Smuzhiyun regulator-over-current-protection; 292*4882a593Smuzhiyun }; 293*4882a593Smuzhiyun 294*4882a593Smuzhiyun v3v3: buck4 { 295*4882a593Smuzhiyun regulator-name = "v3v3"; 296*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 297*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 298*4882a593Smuzhiyun regulator-always-on; 299*4882a593Smuzhiyun regulator-over-current-protection; 300*4882a593Smuzhiyun regulator-initial-mode = <0>; 301*4882a593Smuzhiyun }; 302*4882a593Smuzhiyun 303*4882a593Smuzhiyun v1v8_audio: ldo1 { 304*4882a593Smuzhiyun regulator-name = "v1v8_audio"; 305*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 306*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 307*4882a593Smuzhiyun regulator-always-on; 308*4882a593Smuzhiyun interrupts = <IT_CURLIM_LDO1 0>; 309*4882a593Smuzhiyun }; 310*4882a593Smuzhiyun 311*4882a593Smuzhiyun v3v3_hdmi: ldo2 { 312*4882a593Smuzhiyun regulator-name = "v3v3_hdmi"; 313*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 314*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 315*4882a593Smuzhiyun regulator-always-on; 316*4882a593Smuzhiyun interrupts = <IT_CURLIM_LDO2 0>; 317*4882a593Smuzhiyun }; 318*4882a593Smuzhiyun 319*4882a593Smuzhiyun vtt_ddr: ldo3 { 320*4882a593Smuzhiyun regulator-name = "vtt_ddr"; 321*4882a593Smuzhiyun regulator-min-microvolt = <500000>; 322*4882a593Smuzhiyun regulator-max-microvolt = <750000>; 323*4882a593Smuzhiyun regulator-always-on; 324*4882a593Smuzhiyun regulator-over-current-protection; 325*4882a593Smuzhiyun }; 326*4882a593Smuzhiyun 327*4882a593Smuzhiyun vdd_usb: ldo4 { 328*4882a593Smuzhiyun regulator-name = "vdd_usb"; 329*4882a593Smuzhiyun interrupts = <IT_CURLIM_LDO4 0>; 330*4882a593Smuzhiyun }; 331*4882a593Smuzhiyun 332*4882a593Smuzhiyun vdda: ldo5 { 333*4882a593Smuzhiyun regulator-name = "vdda"; 334*4882a593Smuzhiyun regulator-min-microvolt = <2900000>; 335*4882a593Smuzhiyun regulator-max-microvolt = <2900000>; 336*4882a593Smuzhiyun interrupts = <IT_CURLIM_LDO5 0>; 337*4882a593Smuzhiyun regulator-boot-on; 338*4882a593Smuzhiyun }; 339*4882a593Smuzhiyun 340*4882a593Smuzhiyun v1v2_hdmi: ldo6 { 341*4882a593Smuzhiyun regulator-name = "v1v2_hdmi"; 342*4882a593Smuzhiyun regulator-min-microvolt = <1200000>; 343*4882a593Smuzhiyun regulator-max-microvolt = <1200000>; 344*4882a593Smuzhiyun regulator-always-on; 345*4882a593Smuzhiyun interrupts = <IT_CURLIM_LDO6 0>; 346*4882a593Smuzhiyun }; 347*4882a593Smuzhiyun 348*4882a593Smuzhiyun vref_ddr: vref_ddr { 349*4882a593Smuzhiyun regulator-name = "vref_ddr"; 350*4882a593Smuzhiyun regulator-always-on; 351*4882a593Smuzhiyun }; 352*4882a593Smuzhiyun 353*4882a593Smuzhiyun bst_out: boost { 354*4882a593Smuzhiyun regulator-name = "bst_out"; 355*4882a593Smuzhiyun interrupts = <IT_OCP_BOOST 0>; 356*4882a593Smuzhiyun }; 357*4882a593Smuzhiyun 358*4882a593Smuzhiyun vbus_otg: pwr_sw1 { 359*4882a593Smuzhiyun regulator-name = "vbus_otg"; 360*4882a593Smuzhiyun interrupts = <IT_OCP_OTG 0>; 361*4882a593Smuzhiyun }; 362*4882a593Smuzhiyun 363*4882a593Smuzhiyun vbus_sw: pwr_sw2 { 364*4882a593Smuzhiyun regulator-name = "vbus_sw"; 365*4882a593Smuzhiyun interrupts = <IT_OCP_SWOUT 0>; 366*4882a593Smuzhiyun regulator-active-discharge = <1>; 367*4882a593Smuzhiyun }; 368*4882a593Smuzhiyun }; 369*4882a593Smuzhiyun 370*4882a593Smuzhiyun onkey { 371*4882a593Smuzhiyun compatible = "st,stpmic1-onkey"; 372*4882a593Smuzhiyun interrupts = <IT_PONKEY_F 0>, <IT_PONKEY_R 0>; 373*4882a593Smuzhiyun interrupt-names = "onkey-falling", "onkey-rising"; 374*4882a593Smuzhiyun power-off-time-sec = <10>; 375*4882a593Smuzhiyun status = "okay"; 376*4882a593Smuzhiyun }; 377*4882a593Smuzhiyun 378*4882a593Smuzhiyun watchdog { 379*4882a593Smuzhiyun compatible = "st,stpmic1-wdt"; 380*4882a593Smuzhiyun status = "disabled"; 381*4882a593Smuzhiyun }; 382*4882a593Smuzhiyun }; 383*4882a593Smuzhiyun}; 384*4882a593Smuzhiyun 385*4882a593Smuzhiyun&i2c5 { 386*4882a593Smuzhiyun pinctrl-names = "default", "sleep"; 387*4882a593Smuzhiyun pinctrl-0 = <&i2c5_pins_a>; 388*4882a593Smuzhiyun pinctrl-1 = <&i2c5_sleep_pins_a>; 389*4882a593Smuzhiyun i2c-scl-rising-time-ns = <185>; 390*4882a593Smuzhiyun i2c-scl-falling-time-ns = <20>; 391*4882a593Smuzhiyun clock-frequency = <400000>; 392*4882a593Smuzhiyun /* spare dmas for other usage */ 393*4882a593Smuzhiyun /delete-property/dmas; 394*4882a593Smuzhiyun /delete-property/dma-names; 395*4882a593Smuzhiyun status = "disabled"; 396*4882a593Smuzhiyun}; 397*4882a593Smuzhiyun 398*4882a593Smuzhiyun&i2s2 { 399*4882a593Smuzhiyun clocks = <&rcc SPI2>, <&rcc SPI2_K>, <&rcc PLL3_Q>, <&rcc PLL3_R>; 400*4882a593Smuzhiyun clock-names = "pclk", "i2sclk", "x8k", "x11k"; 401*4882a593Smuzhiyun pinctrl-names = "default", "sleep"; 402*4882a593Smuzhiyun pinctrl-0 = <&i2s2_pins_a>; 403*4882a593Smuzhiyun pinctrl-1 = <&i2s2_sleep_pins_a>; 404*4882a593Smuzhiyun status = "okay"; 405*4882a593Smuzhiyun 406*4882a593Smuzhiyun i2s2_port: port { 407*4882a593Smuzhiyun i2s2_endpoint: endpoint { 408*4882a593Smuzhiyun remote-endpoint = <&sii9022_tx_endpoint>; 409*4882a593Smuzhiyun format = "i2s"; 410*4882a593Smuzhiyun mclk-fs = <256>; 411*4882a593Smuzhiyun }; 412*4882a593Smuzhiyun }; 413*4882a593Smuzhiyun}; 414*4882a593Smuzhiyun 415*4882a593Smuzhiyun&ipcc { 416*4882a593Smuzhiyun status = "okay"; 417*4882a593Smuzhiyun}; 418*4882a593Smuzhiyun 419*4882a593Smuzhiyun&iwdg2 { 420*4882a593Smuzhiyun timeout-sec = <32>; 421*4882a593Smuzhiyun status = "okay"; 422*4882a593Smuzhiyun}; 423*4882a593Smuzhiyun 424*4882a593Smuzhiyun<dc { 425*4882a593Smuzhiyun pinctrl-names = "default", "sleep"; 426*4882a593Smuzhiyun pinctrl-0 = <<dc_pins_a>; 427*4882a593Smuzhiyun pinctrl-1 = <<dc_sleep_pins_a>; 428*4882a593Smuzhiyun status = "okay"; 429*4882a593Smuzhiyun 430*4882a593Smuzhiyun port { 431*4882a593Smuzhiyun ltdc_ep0_out: endpoint@0 { 432*4882a593Smuzhiyun reg = <0>; 433*4882a593Smuzhiyun remote-endpoint = <&sii9022_in>; 434*4882a593Smuzhiyun }; 435*4882a593Smuzhiyun }; 436*4882a593Smuzhiyun}; 437*4882a593Smuzhiyun 438*4882a593Smuzhiyun&m4_rproc { 439*4882a593Smuzhiyun memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>, 440*4882a593Smuzhiyun <&vdev0vring1>, <&vdev0buffer>; 441*4882a593Smuzhiyun mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>; 442*4882a593Smuzhiyun mbox-names = "vq0", "vq1", "shutdown"; 443*4882a593Smuzhiyun interrupt-parent = <&exti>; 444*4882a593Smuzhiyun interrupts = <68 1>; 445*4882a593Smuzhiyun status = "okay"; 446*4882a593Smuzhiyun}; 447*4882a593Smuzhiyun 448*4882a593Smuzhiyun&pwr_regulators { 449*4882a593Smuzhiyun vdd-supply = <&vdd>; 450*4882a593Smuzhiyun vdd_3v3_usbfs-supply = <&vdd_usb>; 451*4882a593Smuzhiyun}; 452*4882a593Smuzhiyun 453*4882a593Smuzhiyun&rng1 { 454*4882a593Smuzhiyun status = "okay"; 455*4882a593Smuzhiyun}; 456*4882a593Smuzhiyun 457*4882a593Smuzhiyun&rtc { 458*4882a593Smuzhiyun status = "okay"; 459*4882a593Smuzhiyun}; 460*4882a593Smuzhiyun 461*4882a593Smuzhiyun&sai2 { 462*4882a593Smuzhiyun clocks = <&rcc SAI2>, <&rcc PLL3_Q>, <&rcc PLL3_R>; 463*4882a593Smuzhiyun clock-names = "pclk", "x8k", "x11k"; 464*4882a593Smuzhiyun pinctrl-names = "default", "sleep"; 465*4882a593Smuzhiyun pinctrl-0 = <&sai2a_pins_a>, <&sai2b_pins_b>; 466*4882a593Smuzhiyun pinctrl-1 = <&sai2a_sleep_pins_a>, <&sai2b_sleep_pins_b>; 467*4882a593Smuzhiyun status = "okay"; 468*4882a593Smuzhiyun 469*4882a593Smuzhiyun sai2a: audio-controller@4400b004 { 470*4882a593Smuzhiyun #clock-cells = <0>; 471*4882a593Smuzhiyun dma-names = "tx"; 472*4882a593Smuzhiyun clocks = <&rcc SAI2_K>; 473*4882a593Smuzhiyun clock-names = "sai_ck"; 474*4882a593Smuzhiyun status = "okay"; 475*4882a593Smuzhiyun 476*4882a593Smuzhiyun sai2a_port: port { 477*4882a593Smuzhiyun sai2a_endpoint: endpoint { 478*4882a593Smuzhiyun remote-endpoint = <&cs42l51_tx_endpoint>; 479*4882a593Smuzhiyun format = "i2s"; 480*4882a593Smuzhiyun mclk-fs = <256>; 481*4882a593Smuzhiyun dai-tdm-slot-num = <2>; 482*4882a593Smuzhiyun dai-tdm-slot-width = <32>; 483*4882a593Smuzhiyun }; 484*4882a593Smuzhiyun }; 485*4882a593Smuzhiyun }; 486*4882a593Smuzhiyun 487*4882a593Smuzhiyun sai2b: audio-controller@4400b024 { 488*4882a593Smuzhiyun dma-names = "rx"; 489*4882a593Smuzhiyun st,sync = <&sai2a 2>; 490*4882a593Smuzhiyun clocks = <&rcc SAI2_K>, <&sai2a>; 491*4882a593Smuzhiyun clock-names = "sai_ck", "MCLK"; 492*4882a593Smuzhiyun status = "okay"; 493*4882a593Smuzhiyun 494*4882a593Smuzhiyun sai2b_port: port { 495*4882a593Smuzhiyun sai2b_endpoint: endpoint { 496*4882a593Smuzhiyun remote-endpoint = <&cs42l51_rx_endpoint>; 497*4882a593Smuzhiyun format = "i2s"; 498*4882a593Smuzhiyun mclk-fs = <256>; 499*4882a593Smuzhiyun dai-tdm-slot-num = <2>; 500*4882a593Smuzhiyun dai-tdm-slot-width = <32>; 501*4882a593Smuzhiyun }; 502*4882a593Smuzhiyun }; 503*4882a593Smuzhiyun }; 504*4882a593Smuzhiyun}; 505*4882a593Smuzhiyun 506*4882a593Smuzhiyun&sdmmc1 { 507*4882a593Smuzhiyun pinctrl-names = "default", "opendrain", "sleep"; 508*4882a593Smuzhiyun pinctrl-0 = <&sdmmc1_b4_pins_a>; 509*4882a593Smuzhiyun pinctrl-1 = <&sdmmc1_b4_od_pins_a>; 510*4882a593Smuzhiyun pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>; 511*4882a593Smuzhiyun cd-gpios = <&gpiob 7 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; 512*4882a593Smuzhiyun disable-wp; 513*4882a593Smuzhiyun st,neg-edge; 514*4882a593Smuzhiyun bus-width = <4>; 515*4882a593Smuzhiyun vmmc-supply = <&v3v3>; 516*4882a593Smuzhiyun status = "okay"; 517*4882a593Smuzhiyun}; 518*4882a593Smuzhiyun 519*4882a593Smuzhiyun&sdmmc3 { 520*4882a593Smuzhiyun pinctrl-names = "default", "opendrain", "sleep"; 521*4882a593Smuzhiyun pinctrl-0 = <&sdmmc3_b4_pins_a>; 522*4882a593Smuzhiyun pinctrl-1 = <&sdmmc3_b4_od_pins_a>; 523*4882a593Smuzhiyun pinctrl-2 = <&sdmmc3_b4_sleep_pins_a>; 524*4882a593Smuzhiyun broken-cd; 525*4882a593Smuzhiyun st,neg-edge; 526*4882a593Smuzhiyun bus-width = <4>; 527*4882a593Smuzhiyun vmmc-supply = <&v3v3>; 528*4882a593Smuzhiyun status = "disabled"; 529*4882a593Smuzhiyun}; 530*4882a593Smuzhiyun 531*4882a593Smuzhiyun&timers1 { 532*4882a593Smuzhiyun /* spare dmas for other usage */ 533*4882a593Smuzhiyun /delete-property/dmas; 534*4882a593Smuzhiyun /delete-property/dma-names; 535*4882a593Smuzhiyun status = "disabled"; 536*4882a593Smuzhiyun pwm { 537*4882a593Smuzhiyun pinctrl-0 = <&pwm1_pins_a>; 538*4882a593Smuzhiyun pinctrl-1 = <&pwm1_sleep_pins_a>; 539*4882a593Smuzhiyun pinctrl-names = "default", "sleep"; 540*4882a593Smuzhiyun status = "okay"; 541*4882a593Smuzhiyun }; 542*4882a593Smuzhiyun timer@0 { 543*4882a593Smuzhiyun status = "okay"; 544*4882a593Smuzhiyun }; 545*4882a593Smuzhiyun}; 546*4882a593Smuzhiyun 547*4882a593Smuzhiyun&timers3 { 548*4882a593Smuzhiyun /delete-property/dmas; 549*4882a593Smuzhiyun /delete-property/dma-names; 550*4882a593Smuzhiyun status = "disabled"; 551*4882a593Smuzhiyun pwm { 552*4882a593Smuzhiyun pinctrl-0 = <&pwm3_pins_a>; 553*4882a593Smuzhiyun pinctrl-1 = <&pwm3_sleep_pins_a>; 554*4882a593Smuzhiyun pinctrl-names = "default", "sleep"; 555*4882a593Smuzhiyun status = "okay"; 556*4882a593Smuzhiyun }; 557*4882a593Smuzhiyun timer@2 { 558*4882a593Smuzhiyun status = "okay"; 559*4882a593Smuzhiyun }; 560*4882a593Smuzhiyun}; 561*4882a593Smuzhiyun 562*4882a593Smuzhiyun&timers4 { 563*4882a593Smuzhiyun /delete-property/dmas; 564*4882a593Smuzhiyun /delete-property/dma-names; 565*4882a593Smuzhiyun status = "disabled"; 566*4882a593Smuzhiyun pwm { 567*4882a593Smuzhiyun pinctrl-0 = <&pwm4_pins_a &pwm4_pins_b>; 568*4882a593Smuzhiyun pinctrl-1 = <&pwm4_sleep_pins_a &pwm4_sleep_pins_b>; 569*4882a593Smuzhiyun pinctrl-names = "default", "sleep"; 570*4882a593Smuzhiyun status = "okay"; 571*4882a593Smuzhiyun }; 572*4882a593Smuzhiyun timer@3 { 573*4882a593Smuzhiyun status = "okay"; 574*4882a593Smuzhiyun }; 575*4882a593Smuzhiyun}; 576*4882a593Smuzhiyun 577*4882a593Smuzhiyun&timers5 { 578*4882a593Smuzhiyun /delete-property/dmas; 579*4882a593Smuzhiyun /delete-property/dma-names; 580*4882a593Smuzhiyun status = "disabled"; 581*4882a593Smuzhiyun pwm { 582*4882a593Smuzhiyun pinctrl-0 = <&pwm5_pins_a>; 583*4882a593Smuzhiyun pinctrl-1 = <&pwm5_sleep_pins_a>; 584*4882a593Smuzhiyun pinctrl-names = "default", "sleep"; 585*4882a593Smuzhiyun status = "okay"; 586*4882a593Smuzhiyun }; 587*4882a593Smuzhiyun timer@4 { 588*4882a593Smuzhiyun status = "okay"; 589*4882a593Smuzhiyun }; 590*4882a593Smuzhiyun}; 591*4882a593Smuzhiyun 592*4882a593Smuzhiyun&timers6 { 593*4882a593Smuzhiyun /delete-property/dmas; 594*4882a593Smuzhiyun /delete-property/dma-names; 595*4882a593Smuzhiyun status = "disabled"; 596*4882a593Smuzhiyun timer@5 { 597*4882a593Smuzhiyun status = "okay"; 598*4882a593Smuzhiyun }; 599*4882a593Smuzhiyun}; 600*4882a593Smuzhiyun 601*4882a593Smuzhiyun&timers12 { 602*4882a593Smuzhiyun /delete-property/dmas; 603*4882a593Smuzhiyun /delete-property/dma-names; 604*4882a593Smuzhiyun status = "disabled"; 605*4882a593Smuzhiyun pwm { 606*4882a593Smuzhiyun pinctrl-0 = <&pwm12_pins_a>; 607*4882a593Smuzhiyun pinctrl-1 = <&pwm12_sleep_pins_a>; 608*4882a593Smuzhiyun pinctrl-names = "default", "sleep"; 609*4882a593Smuzhiyun status = "okay"; 610*4882a593Smuzhiyun }; 611*4882a593Smuzhiyun timer@11 { 612*4882a593Smuzhiyun status = "okay"; 613*4882a593Smuzhiyun }; 614*4882a593Smuzhiyun}; 615*4882a593Smuzhiyun 616*4882a593Smuzhiyun&uart4 { 617*4882a593Smuzhiyun pinctrl-names = "default", "sleep", "idle"; 618*4882a593Smuzhiyun pinctrl-0 = <&uart4_pins_a>; 619*4882a593Smuzhiyun pinctrl-1 = <&uart4_sleep_pins_a>; 620*4882a593Smuzhiyun pinctrl-2 = <&uart4_idle_pins_a>; 621*4882a593Smuzhiyun status = "okay"; 622*4882a593Smuzhiyun}; 623*4882a593Smuzhiyun 624*4882a593Smuzhiyun&uart7 { 625*4882a593Smuzhiyun pinctrl-names = "default", "sleep", "idle"; 626*4882a593Smuzhiyun pinctrl-0 = <&uart7_pins_c>; 627*4882a593Smuzhiyun pinctrl-1 = <&uart7_sleep_pins_c>; 628*4882a593Smuzhiyun pinctrl-2 = <&uart7_idle_pins_c>; 629*4882a593Smuzhiyun status = "disabled"; 630*4882a593Smuzhiyun}; 631*4882a593Smuzhiyun 632*4882a593Smuzhiyun&usart3 { 633*4882a593Smuzhiyun pinctrl-names = "default", "sleep", "idle"; 634*4882a593Smuzhiyun pinctrl-0 = <&usart3_pins_c>; 635*4882a593Smuzhiyun pinctrl-1 = <&usart3_sleep_pins_c>; 636*4882a593Smuzhiyun pinctrl-2 = <&usart3_idle_pins_c>; 637*4882a593Smuzhiyun uart-has-rtscts; 638*4882a593Smuzhiyun status = "disabled"; 639*4882a593Smuzhiyun}; 640*4882a593Smuzhiyun 641*4882a593Smuzhiyun&usbh_ehci { 642*4882a593Smuzhiyun phys = <&usbphyc_port0>; 643*4882a593Smuzhiyun status = "okay"; 644*4882a593Smuzhiyun}; 645*4882a593Smuzhiyun 646*4882a593Smuzhiyun&usbotg_hs { 647*4882a593Smuzhiyun phys = <&usbphyc_port1 0>; 648*4882a593Smuzhiyun phy-names = "usb2-phy"; 649*4882a593Smuzhiyun usb-role-switch; 650*4882a593Smuzhiyun status = "okay"; 651*4882a593Smuzhiyun}; 652*4882a593Smuzhiyun 653*4882a593Smuzhiyun&usbphyc { 654*4882a593Smuzhiyun status = "okay"; 655*4882a593Smuzhiyun}; 656*4882a593Smuzhiyun 657*4882a593Smuzhiyun&usbphyc_port0 { 658*4882a593Smuzhiyun phy-supply = <&vdd_usb>; 659*4882a593Smuzhiyun vdda1v1-supply = <®11>; 660*4882a593Smuzhiyun vdda1v8-supply = <®18>; 661*4882a593Smuzhiyun}; 662*4882a593Smuzhiyun 663*4882a593Smuzhiyun&usbphyc_port1 { 664*4882a593Smuzhiyun phy-supply = <&vdd_usb>; 665*4882a593Smuzhiyun vdda1v1-supply = <®11>; 666*4882a593Smuzhiyun vdda1v8-supply = <®18>; 667*4882a593Smuzhiyun}; 668*4882a593Smuzhiyun 669*4882a593Smuzhiyun&vrefbuf { 670*4882a593Smuzhiyun regulator-min-microvolt = <2500000>; 671*4882a593Smuzhiyun regulator-max-microvolt = <2500000>; 672*4882a593Smuzhiyun vdda-supply = <&vdd>; 673*4882a593Smuzhiyun status = "okay"; 674*4882a593Smuzhiyun}; 675