1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Copyright (C) 2020 Marek Vasut <marex@denx.de> 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun#include <dt-bindings/input/input.h> 7*4882a593Smuzhiyun#include <dt-bindings/pwm/pwm.h> 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun/ { 10*4882a593Smuzhiyun aliases { 11*4882a593Smuzhiyun serial0 = &uart4; 12*4882a593Smuzhiyun serial1 = &usart3; 13*4882a593Smuzhiyun serial2 = &uart8; 14*4882a593Smuzhiyun }; 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun chosen { 17*4882a593Smuzhiyun stdout-path = "serial0:115200n8"; 18*4882a593Smuzhiyun }; 19*4882a593Smuzhiyun}; 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun&adc { 22*4882a593Smuzhiyun status = "disabled"; 23*4882a593Smuzhiyun}; 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun&dac { 26*4882a593Smuzhiyun status = "disabled"; 27*4882a593Smuzhiyun}; 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun&gpiob { 30*4882a593Smuzhiyun /* 31*4882a593Smuzhiyun * NOTE: On DRC02, the RS485_RX_En is controlled by a separate 32*4882a593Smuzhiyun * GPIO line, however the STM32 UART driver assumes RX happens 33*4882a593Smuzhiyun * during TX anyway and that it only controls drive enable DE 34*4882a593Smuzhiyun * line. Hence, the RX is always enabled here. 35*4882a593Smuzhiyun */ 36*4882a593Smuzhiyun rs485-rx-en { 37*4882a593Smuzhiyun gpio-hog; 38*4882a593Smuzhiyun gpios = <8 0>; 39*4882a593Smuzhiyun output-low; 40*4882a593Smuzhiyun line-name = "rs485-rx-en"; 41*4882a593Smuzhiyun }; 42*4882a593Smuzhiyun}; 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun&gpiod { 45*4882a593Smuzhiyun gpio-line-names = "", "", "", "", 46*4882a593Smuzhiyun "", "", "", "", 47*4882a593Smuzhiyun "", "", "", "Out1", 48*4882a593Smuzhiyun "Out2", "", "", ""; 49*4882a593Smuzhiyun}; 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun&gpioi { 52*4882a593Smuzhiyun gpio-line-names = "In1", "", "", "", 53*4882a593Smuzhiyun "", "", "", "", 54*4882a593Smuzhiyun "In2", "", "", "", 55*4882a593Smuzhiyun "", "", "", ""; 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun /* 58*4882a593Smuzhiyun * NOTE: The USB Hub on the DRC02 needs a reset signal to be 59*4882a593Smuzhiyun * pulled high in order to be detected by the USB Controller. 60*4882a593Smuzhiyun * This signal should be handled by USB power sequencing in 61*4882a593Smuzhiyun * order to reset the Hub when USB bus is powered down, but 62*4882a593Smuzhiyun * so far there is no such functionality. 63*4882a593Smuzhiyun */ 64*4882a593Smuzhiyun usb-hub { 65*4882a593Smuzhiyun gpio-hog; 66*4882a593Smuzhiyun gpios = <2 0>; 67*4882a593Smuzhiyun output-high; 68*4882a593Smuzhiyun line-name = "usb-hub-reset"; 69*4882a593Smuzhiyun }; 70*4882a593Smuzhiyun}; 71*4882a593Smuzhiyun 72*4882a593Smuzhiyun&i2c2 { 73*4882a593Smuzhiyun pinctrl-names = "default"; 74*4882a593Smuzhiyun pinctrl-0 = <&i2c2_pins_a>; 75*4882a593Smuzhiyun i2c-scl-rising-time-ns = <185>; 76*4882a593Smuzhiyun i2c-scl-falling-time-ns = <20>; 77*4882a593Smuzhiyun status = "okay"; 78*4882a593Smuzhiyun /* spare dmas for other usage */ 79*4882a593Smuzhiyun /delete-property/dmas; 80*4882a593Smuzhiyun /delete-property/dma-names; 81*4882a593Smuzhiyun status = "okay"; 82*4882a593Smuzhiyun 83*4882a593Smuzhiyun eeprom@50 { 84*4882a593Smuzhiyun compatible = "atmel,24c04"; 85*4882a593Smuzhiyun reg = <0x50>; 86*4882a593Smuzhiyun pagesize = <16>; 87*4882a593Smuzhiyun }; 88*4882a593Smuzhiyun}; 89*4882a593Smuzhiyun 90*4882a593Smuzhiyun&i2c4 { 91*4882a593Smuzhiyun touchscreen@49 { 92*4882a593Smuzhiyun status = "disabled"; 93*4882a593Smuzhiyun }; 94*4882a593Smuzhiyun}; 95*4882a593Smuzhiyun 96*4882a593Smuzhiyun&i2c5 { /* TP7/TP8 */ 97*4882a593Smuzhiyun pinctrl-names = "default"; 98*4882a593Smuzhiyun pinctrl-0 = <&i2c5_pins_a>; 99*4882a593Smuzhiyun i2c-scl-rising-time-ns = <185>; 100*4882a593Smuzhiyun i2c-scl-falling-time-ns = <20>; 101*4882a593Smuzhiyun status = "okay"; 102*4882a593Smuzhiyun /* spare dmas for other usage */ 103*4882a593Smuzhiyun /delete-property/dmas; 104*4882a593Smuzhiyun /delete-property/dma-names; 105*4882a593Smuzhiyun}; 106*4882a593Smuzhiyun 107*4882a593Smuzhiyun&sdmmc3 { 108*4882a593Smuzhiyun /* 109*4882a593Smuzhiyun * On DRC02, the SoM does not have SDIO WiFi. The pins 110*4882a593Smuzhiyun * are used for on-board microSD slot instead. 111*4882a593Smuzhiyun */ 112*4882a593Smuzhiyun /delete-property/broken-cd; 113*4882a593Smuzhiyun cd-gpios = <&gpioi 10 GPIO_ACTIVE_HIGH>; 114*4882a593Smuzhiyun disable-wp; 115*4882a593Smuzhiyun}; 116*4882a593Smuzhiyun 117*4882a593Smuzhiyun&spi1 { 118*4882a593Smuzhiyun pinctrl-names = "default"; 119*4882a593Smuzhiyun pinctrl-0 = <&spi1_pins_a>; 120*4882a593Smuzhiyun cs-gpios = <&gpioz 3 0>; 121*4882a593Smuzhiyun /* Use PIO for the display */ 122*4882a593Smuzhiyun /delete-property/dmas; 123*4882a593Smuzhiyun /delete-property/dma-names; 124*4882a593Smuzhiyun status = "disabled"; /* Enable once there is display driver */ 125*4882a593Smuzhiyun /* 126*4882a593Smuzhiyun * Note: PF3/GPIO_A , PD6/GPIO_B , PG0/GPIO_C , PC6/GPIO_E are 127*4882a593Smuzhiyun * also connected to the display board connector. 128*4882a593Smuzhiyun */ 129*4882a593Smuzhiyun}; 130*4882a593Smuzhiyun 131*4882a593Smuzhiyun&usart3 { 132*4882a593Smuzhiyun pinctrl-names = "default"; 133*4882a593Smuzhiyun pinctrl-0 = <&usart3_pins_a>; 134*4882a593Smuzhiyun status = "okay"; 135*4882a593Smuzhiyun}; 136*4882a593Smuzhiyun 137*4882a593Smuzhiyun/* 138*4882a593Smuzhiyun * Note: PI3 is UART1_RTS and PI5 is UART1_CTS on DRC02 (uart4 of STM32MP1), 139*4882a593Smuzhiyun * however the STM32MP1 pinmux cannot map them to UART4 . 140*4882a593Smuzhiyun */ 141*4882a593Smuzhiyun 142*4882a593Smuzhiyun&uart8 { /* RS485 */ 143*4882a593Smuzhiyun linux,rs485-enabled-at-boot-time; 144*4882a593Smuzhiyun pinctrl-names = "default"; 145*4882a593Smuzhiyun pinctrl-0 = <&uart8_pins_a>; 146*4882a593Smuzhiyun rts-gpios = <&gpioe 6 GPIO_ACTIVE_HIGH>; 147*4882a593Smuzhiyun status = "okay"; 148*4882a593Smuzhiyun}; 149*4882a593Smuzhiyun 150*4882a593Smuzhiyun&usbh_ehci { 151*4882a593Smuzhiyun phys = <&usbphyc_port0>; 152*4882a593Smuzhiyun status = "okay"; 153*4882a593Smuzhiyun}; 154*4882a593Smuzhiyun 155*4882a593Smuzhiyun&usbphyc { 156*4882a593Smuzhiyun status = "okay"; 157*4882a593Smuzhiyun}; 158*4882a593Smuzhiyun 159*4882a593Smuzhiyun&usbphyc_port0 { 160*4882a593Smuzhiyun phy-supply = <&vdd_usb>; 161*4882a593Smuzhiyun vdda1v1-supply = <®11>; 162*4882a593Smuzhiyun vdda1v8-supply = <®18>; 163*4882a593Smuzhiyun}; 164