1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0-only 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Copyright (C) 2015 STMicroelectronics (R&D) Limited. 4*4882a593Smuzhiyun * Author: Maxime Coquelin <maxime.coquelin@st.com> 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun/dts-v1/; 7*4882a593Smuzhiyun#include "stih418.dtsi" 8*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h> 9*4882a593Smuzhiyun/ { 10*4882a593Smuzhiyun model = "STiH418 B2199"; 11*4882a593Smuzhiyun compatible = "st,stih418-b2199", "st,stih418"; 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun chosen { 14*4882a593Smuzhiyun bootargs = "clk_ignore_unused"; 15*4882a593Smuzhiyun stdout-path = &sbc_serial0; 16*4882a593Smuzhiyun }; 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun memory@40000000 { 19*4882a593Smuzhiyun device_type = "memory"; 20*4882a593Smuzhiyun reg = <0x40000000 0xc0000000>; 21*4882a593Smuzhiyun }; 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun aliases { 24*4882a593Smuzhiyun serial0 = &sbc_serial0; 25*4882a593Smuzhiyun ethernet0 = ðernet0; 26*4882a593Smuzhiyun }; 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun leds { 29*4882a593Smuzhiyun compatible = "gpio-leds"; 30*4882a593Smuzhiyun red { 31*4882a593Smuzhiyun label = "Front Panel LED"; 32*4882a593Smuzhiyun gpios = <&pio4 1 GPIO_ACTIVE_HIGH>; 33*4882a593Smuzhiyun linux,default-trigger = "heartbeat"; 34*4882a593Smuzhiyun }; 35*4882a593Smuzhiyun green { 36*4882a593Smuzhiyun gpios = <&pio1 3 GPIO_ACTIVE_HIGH>; 37*4882a593Smuzhiyun default-state = "off"; 38*4882a593Smuzhiyun }; 39*4882a593Smuzhiyun }; 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun soc { 42*4882a593Smuzhiyun sbc_serial0: serial@9530000 { 43*4882a593Smuzhiyun status = "okay"; 44*4882a593Smuzhiyun }; 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun i2c@9842000 { 47*4882a593Smuzhiyun status = "okay"; 48*4882a593Smuzhiyun }; 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun i2c@9843000 { 51*4882a593Smuzhiyun status = "okay"; 52*4882a593Smuzhiyun }; 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun i2c@9844000 { 55*4882a593Smuzhiyun status = "okay"; 56*4882a593Smuzhiyun }; 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun i2c@9845000 { 59*4882a593Smuzhiyun status = "okay"; 60*4882a593Smuzhiyun }; 61*4882a593Smuzhiyun 62*4882a593Smuzhiyun i2c@9540000 { 63*4882a593Smuzhiyun status = "okay"; 64*4882a593Smuzhiyun }; 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun /* SSC11 to HDMI */ 67*4882a593Smuzhiyun i2c@9541000 { 68*4882a593Smuzhiyun status = "okay"; 69*4882a593Smuzhiyun /* HDMI V1.3a supports Standard mode only */ 70*4882a593Smuzhiyun clock-frequency = <100000>; 71*4882a593Smuzhiyun st,i2c-min-scl-pulse-width-us = <0>; 72*4882a593Smuzhiyun st,i2c-min-sda-pulse-width-us = <5>; 73*4882a593Smuzhiyun }; 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun mmc1: sdhci@9080000 { 76*4882a593Smuzhiyun status = "okay"; 77*4882a593Smuzhiyun }; 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun mmc0: sdhci@9060000 { 80*4882a593Smuzhiyun status = "okay"; 81*4882a593Smuzhiyun max-frequency = <200000000>; 82*4882a593Smuzhiyun sd-uhs-sdr50; 83*4882a593Smuzhiyun sd-uhs-sdr104; 84*4882a593Smuzhiyun sd-uhs-ddr50; 85*4882a593Smuzhiyun non-removable; 86*4882a593Smuzhiyun }; 87*4882a593Smuzhiyun 88*4882a593Smuzhiyun miphy28lp_phy: miphy28lp@0 { 89*4882a593Smuzhiyun 90*4882a593Smuzhiyun phy_port0: port@9b22000 { 91*4882a593Smuzhiyun st,osc-rdy; 92*4882a593Smuzhiyun }; 93*4882a593Smuzhiyun 94*4882a593Smuzhiyun phy_port1: port@9b2a000 { 95*4882a593Smuzhiyun st,osc-force-ext; 96*4882a593Smuzhiyun }; 97*4882a593Smuzhiyun }; 98*4882a593Smuzhiyun 99*4882a593Smuzhiyun st_dwc3: dwc3@8f94000 { 100*4882a593Smuzhiyun status = "okay"; 101*4882a593Smuzhiyun }; 102*4882a593Smuzhiyun 103*4882a593Smuzhiyun ethernet0: dwmac@9630000 { 104*4882a593Smuzhiyun st,tx-retime-src = "clkgen"; 105*4882a593Smuzhiyun status = "okay"; 106*4882a593Smuzhiyun phy-mode = "rgmii"; 107*4882a593Smuzhiyun fixed-link = <0 1 1000 0 0>; 108*4882a593Smuzhiyun }; 109*4882a593Smuzhiyun }; 110*4882a593Smuzhiyun}; 111