xref: /OK3568_Linux_fs/kernel/scripts/dtc/include-prefixes/arm/ste-nomadik-nhk15.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Device Tree for the ST Microelectronics Nomadik NHK8815 board
4*4882a593Smuzhiyun */
5*4882a593Smuzhiyun
6*4882a593Smuzhiyun/dts-v1/;
7*4882a593Smuzhiyun#include <dt-bindings/interrupt-controller/irq.h>
8*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h>
9*4882a593Smuzhiyun#include "ste-nomadik-stn8815.dtsi"
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun/ {
12*4882a593Smuzhiyun	model = "Nomadik STN8815NHK";
13*4882a593Smuzhiyun	compatible = "st,nomadik-nhk-15";
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun	chosen {
16*4882a593Smuzhiyun		bootargs = "root=/dev/ram0 console=ttyAMA1,115200n8 earlyprintk";
17*4882a593Smuzhiyun	};
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun	aliases {
20*4882a593Smuzhiyun		serial0 = &uart0;
21*4882a593Smuzhiyun		serial1 = &uart1;
22*4882a593Smuzhiyun		stmpe-i2c0 = &stmpe0;
23*4882a593Smuzhiyun		stmpe-i2c1 = &stmpe1;
24*4882a593Smuzhiyun	};
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun	pinctrl {
27*4882a593Smuzhiyun		uart0 {
28*4882a593Smuzhiyun			uart0_nhk_mode: uart0_mux {
29*4882a593Smuzhiyun				u0_default_mux {
30*4882a593Smuzhiyun					function = "u0";
31*4882a593Smuzhiyun					groups = "u0txrx_a_1", "u0ctsrts_a_1";
32*4882a593Smuzhiyun				};
33*4882a593Smuzhiyun			};
34*4882a593Smuzhiyun		};
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun		stmpe2401_1 {
37*4882a593Smuzhiyun			stmpe2401_1_nhk_mode: stmpe2401_1_nhk {
38*4882a593Smuzhiyun				nhk_cfg1 {
39*4882a593Smuzhiyun					pins = "GPIO76_B20"; // IRQ line
40*4882a593Smuzhiyun					ste,input = <0>;
41*4882a593Smuzhiyun				};
42*4882a593Smuzhiyun				nhk_cfg2 {
43*4882a593Smuzhiyun					pins = "GPIO77_B8"; // reset line
44*4882a593Smuzhiyun					ste,output = <1>;
45*4882a593Smuzhiyun				};
46*4882a593Smuzhiyun			};
47*4882a593Smuzhiyun		};
48*4882a593Smuzhiyun		stmpe2401_2 {
49*4882a593Smuzhiyun			stmpe2401_2_nhk_mode: stmpe2401_2_nhk {
50*4882a593Smuzhiyun				nhk_cfg1 {
51*4882a593Smuzhiyun					pins = "GPIO78_A8"; // IRQ line
52*4882a593Smuzhiyun					ste,input = <0>;
53*4882a593Smuzhiyun				};
54*4882a593Smuzhiyun				nhk_cfg2 {
55*4882a593Smuzhiyun					pins = "GPIO79_C9"; // reset line
56*4882a593Smuzhiyun					ste,output = <1>;
57*4882a593Smuzhiyun				};
58*4882a593Smuzhiyun			};
59*4882a593Smuzhiyun		};
60*4882a593Smuzhiyun		lis3lv02dl {
61*4882a593Smuzhiyun			lis3lv02dl_nhk_mode: lis3lv02dl_nhk {
62*4882a593Smuzhiyun				nhk_cfg1 {
63*4882a593Smuzhiyun					pins = "GPIO82_C10"; // IRQ line
64*4882a593Smuzhiyun					ste,input = <0>;
65*4882a593Smuzhiyun				};
66*4882a593Smuzhiyun			};
67*4882a593Smuzhiyun		};
68*4882a593Smuzhiyun	};
69*4882a593Smuzhiyun	src@101e0000 {
70*4882a593Smuzhiyun		/* These chrystal outputs are not used on this board */
71*4882a593Smuzhiyun		disable-sxtalo;
72*4882a593Smuzhiyun		disable-mxtalo;
73*4882a593Smuzhiyun	};
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun	/* This is where the interrupt is routed on the NHK-15 debug board */
76*4882a593Smuzhiyun	external-bus@34000000 {
77*4882a593Smuzhiyun		compatible = "simple-bus";
78*4882a593Smuzhiyun		reg = <0x34000000 0x1000000>;
79*4882a593Smuzhiyun		#address-cells = <1>;
80*4882a593Smuzhiyun		#size-cells = <1>;
81*4882a593Smuzhiyun		ranges = <0 0x34000000 0x1000000>;
82*4882a593Smuzhiyun		ethernet@300 {
83*4882a593Smuzhiyun			compatible = "smsc,lan91c111";
84*4882a593Smuzhiyun			reg = <0x300 0x0fd00>;
85*4882a593Smuzhiyun			reg-io-width = <2>;
86*4882a593Smuzhiyun			reset-gpios = <&stmpe_gpio44 10 GPIO_ACTIVE_HIGH>;
87*4882a593Smuzhiyun			interrupt-parent = <&stmpe_gpio44>;
88*4882a593Smuzhiyun			interrupts = <11 IRQ_TYPE_EDGE_RISING>;
89*4882a593Smuzhiyun		};
90*4882a593Smuzhiyun	};
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun	i2c0 {
93*4882a593Smuzhiyun		lis3lv02dl@1d {
94*4882a593Smuzhiyun			/* Accelerometer */
95*4882a593Smuzhiyun			compatible = "st,lis3lv02dl-accel";
96*4882a593Smuzhiyun			interrupt-parent = <&gpio2>;
97*4882a593Smuzhiyun			interrupts = <18 IRQ_TYPE_EDGE_RISING>; // GPIO 82
98*4882a593Smuzhiyun			pinctrl-0 = <&lis3lv02dl_nhk_mode>;
99*4882a593Smuzhiyun			pinctrl-names = "default";
100*4882a593Smuzhiyun			reg = <0x1d>;
101*4882a593Smuzhiyun		};
102*4882a593Smuzhiyun		stmpe0: stmpe2401@43 {
103*4882a593Smuzhiyun			compatible = "st,stmpe2401";
104*4882a593Smuzhiyun			reg = <0x43>;
105*4882a593Smuzhiyun			reset-gpios = <&gpio2 13 GPIO_ACTIVE_LOW>; // GPIO77
106*4882a593Smuzhiyun			interrupts = <12 IRQ_TYPE_EDGE_FALLING>; // GPIO76
107*4882a593Smuzhiyun			interrupt-parent = <&gpio2>;
108*4882a593Smuzhiyun			interrupt-controller;
109*4882a593Smuzhiyun			wakeup-source;
110*4882a593Smuzhiyun			pinctrl-names = "default";
111*4882a593Smuzhiyun			pinctrl-0 = <&stmpe2401_1_nhk_mode>;
112*4882a593Smuzhiyun			stmpe_gpio43: stmpe_gpio {
113*4882a593Smuzhiyun				compatible = "st,stmpe-gpio";
114*4882a593Smuzhiyun				gpio-controller;
115*4882a593Smuzhiyun				#gpio-cells = <2>;
116*4882a593Smuzhiyun				interrupt-controller;
117*4882a593Smuzhiyun				#interrupt-cells = <2>;
118*4882a593Smuzhiyun				/* Some pins in alternate functions */
119*4882a593Smuzhiyun				st,norequest-mask = <0xf0f002>;
120*4882a593Smuzhiyun			};
121*4882a593Smuzhiyun			stmpe_keypad {
122*4882a593Smuzhiyun				compatible = "st,stmpe-keypad";
123*4882a593Smuzhiyun				debounce-interval = <64>;
124*4882a593Smuzhiyun				st,scan-count = <8>;
125*4882a593Smuzhiyun				st,no-autorepeat;
126*4882a593Smuzhiyun				keypad,num-rows = <8>;
127*4882a593Smuzhiyun				keypad,num-columns = <8>;
128*4882a593Smuzhiyun				linux,keymap = <0x00020072 // Vol down
129*4882a593Smuzhiyun						0x00030073 // Vol up
130*4882a593Smuzhiyun						0x0100009e // Back
131*4882a593Smuzhiyun						0x010100e3 // TV out
132*4882a593Smuzhiyun						0x01020098 // Lock
133*4882a593Smuzhiyun						0x0103013b // Start
134*4882a593Smuzhiyun						0x020000a3 // Next
135*4882a593Smuzhiyun						0x020100a4 // Play
136*4882a593Smuzhiyun						0x020200a5 // Prev
137*4882a593Smuzhiyun						0x02030160 // OK
138*4882a593Smuzhiyun						0x03000069 // Left
139*4882a593Smuzhiyun						0x0301006a // Right
140*4882a593Smuzhiyun						0x03020067 // Up
141*4882a593Smuzhiyun						0x0303006c>; // Down
142*4882a593Smuzhiyun			};
143*4882a593Smuzhiyun			stmpe0_pwm: stmpe_pwm {
144*4882a593Smuzhiyun				compatible = "st,stmpe-pwm";
145*4882a593Smuzhiyun				#pwm-cells = <2>;
146*4882a593Smuzhiyun			};
147*4882a593Smuzhiyun		};
148*4882a593Smuzhiyun		stmpe1: stmpe2401@44 {
149*4882a593Smuzhiyun			compatible = "st,stmpe2401";
150*4882a593Smuzhiyun			reg = <0x44>;
151*4882a593Smuzhiyun			reset-gpios = <&gpio2 15 GPIO_ACTIVE_LOW>; // GPIO79
152*4882a593Smuzhiyun			interrupts = <14 IRQ_TYPE_EDGE_FALLING>; // GPIO78
153*4882a593Smuzhiyun			interrupt-parent = <&gpio2>;
154*4882a593Smuzhiyun			interrupt-controller;
155*4882a593Smuzhiyun			wakeup-source;
156*4882a593Smuzhiyun			pinctrl-names = "default";
157*4882a593Smuzhiyun			pinctrl-0 = <&stmpe2401_2_nhk_mode>;
158*4882a593Smuzhiyun			stmpe_gpio44: stmpe_gpio {
159*4882a593Smuzhiyun				compatible = "st,stmpe-gpio";
160*4882a593Smuzhiyun				gpio-controller;
161*4882a593Smuzhiyun				#gpio-cells = <2>;
162*4882a593Smuzhiyun				interrupt-controller;
163*4882a593Smuzhiyun				#interrupt-cells = <2>;
164*4882a593Smuzhiyun				/*
165*4882a593Smuzhiyun				 * This will turn off SATA so that MMC/SD
166*4882a593Smuzhiyun				 * can thrive
167*4882a593Smuzhiyun				 */
168*4882a593Smuzhiyun				mmcsd-gpio {
169*4882a593Smuzhiyun					gpio-hog;
170*4882a593Smuzhiyun					gpios = <2 0x0>;
171*4882a593Smuzhiyun					output-low;
172*4882a593Smuzhiyun					line-name = "SATA EN";
173*4882a593Smuzhiyun				};
174*4882a593Smuzhiyun			};
175*4882a593Smuzhiyun		};
176*4882a593Smuzhiyun	};
177*4882a593Smuzhiyun
178*4882a593Smuzhiyun	amba {
179*4882a593Smuzhiyun		clcd@10120000 {
180*4882a593Smuzhiyun			status = "okay";
181*4882a593Smuzhiyun			pinctrl-names = "default";
182*4882a593Smuzhiyun			pinctrl-0 = <&clcd_24bit_mux>;
183*4882a593Smuzhiyun			port {
184*4882a593Smuzhiyun				nomadik_clcd: endpoint {
185*4882a593Smuzhiyun					remote-endpoint = <&nomadik_clcd_panel>;
186*4882a593Smuzhiyun					arm,pl11x,tft-r0g0b0-pads = <16 8 0>;
187*4882a593Smuzhiyun				};
188*4882a593Smuzhiyun			};
189*4882a593Smuzhiyun
190*4882a593Smuzhiyun		};
191*4882a593Smuzhiyun
192*4882a593Smuzhiyun		/* Activate RX/TX and CTS/RTS on UART 0 */
193*4882a593Smuzhiyun		uart0: uart@101fd000 {
194*4882a593Smuzhiyun			pinctrl-names = "default";
195*4882a593Smuzhiyun			pinctrl-0 = <&uart0_nhk_mode>;
196*4882a593Smuzhiyun			status = "okay";
197*4882a593Smuzhiyun		};
198*4882a593Smuzhiyun		mmcsd: sdi@101f6000 {
199*4882a593Smuzhiyun			cd-gpios = <&stmpe_gpio44 7 GPIO_ACTIVE_LOW>;
200*4882a593Smuzhiyun			wp-gpios = <&stmpe_gpio44 18 GPIO_ACTIVE_HIGH>;
201*4882a593Smuzhiyun		};
202*4882a593Smuzhiyun	};
203*4882a593Smuzhiyun
204*4882a593Smuzhiyun	spi {
205*4882a593Smuzhiyun		compatible = "spi-gpio";
206*4882a593Smuzhiyun		#address-cells = <1>;
207*4882a593Smuzhiyun		#size-cells = <0>;
208*4882a593Smuzhiyun
209*4882a593Smuzhiyun		/*
210*4882a593Smuzhiyun		 * As we're dealing with 3wire SPI, we only define SCK
211*4882a593Smuzhiyun		 * and MOSI (in the spec MOSI is called "SDA").
212*4882a593Smuzhiyun		 */
213*4882a593Smuzhiyun		gpio-sck = <&gpio0 5 GPIO_ACTIVE_HIGH>;
214*4882a593Smuzhiyun		gpio-mosi = <&gpio0 4 GPIO_ACTIVE_HIGH>;
215*4882a593Smuzhiyun		cs-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
216*4882a593Smuzhiyun		num-chipselects = <1>;
217*4882a593Smuzhiyun
218*4882a593Smuzhiyun		/*
219*4882a593Smuzhiyun		 * WVGA connector 21
220*4882a593Smuzhiyun		 * WVGA (800x480): 4.3" TPG110 TDO43MTEA2 24-bit RGB
221*4882a593Smuzhiyun		 * with TPO touch screen.
222*4882a593Smuzhiyun		  */
223*4882a593Smuzhiyun		panel: display@0 {
224*4882a593Smuzhiyun			/*
225*4882a593Smuzhiyun			 * The TPO display driver is connected to a
226*4882a593Smuzhiyun			 * 5.7" OSD OSD057VA01CT TFT display.
227*4882a593Smuzhiyun			 */
228*4882a593Smuzhiyun			compatible = "tpo,tpg110";
229*4882a593Smuzhiyun			reg = <0>;
230*4882a593Smuzhiyun			spi-3wire;
231*4882a593Smuzhiyun			/* 320 ns min period ~= 3 MHz */
232*4882a593Smuzhiyun			spi-max-frequency = <3000000>;
233*4882a593Smuzhiyun			/* Width and height from the OSD data sheet */
234*4882a593Smuzhiyun			width-mm = <116>;
235*4882a593Smuzhiyun			height-mm = <87>;
236*4882a593Smuzhiyun			grestb-gpios = <&stmpe_gpio44 5 GPIO_ACTIVE_LOW>;
237*4882a593Smuzhiyun			backlight = <&bl>;
238*4882a593Smuzhiyun
239*4882a593Smuzhiyun			port {
240*4882a593Smuzhiyun				nomadik_clcd_panel: endpoint {
241*4882a593Smuzhiyun					remote-endpoint = <&nomadik_clcd>;
242*4882a593Smuzhiyun				};
243*4882a593Smuzhiyun			};
244*4882a593Smuzhiyun		};
245*4882a593Smuzhiyun	};
246*4882a593Smuzhiyun
247*4882a593Smuzhiyun	bl: backlight {
248*4882a593Smuzhiyun		compatible = "pwm-backlight";
249*4882a593Smuzhiyun		pwms = <&stmpe0_pwm 0 500000>;
250*4882a593Smuzhiyun		pwm-names = "backlight";
251*4882a593Smuzhiyun		brightness-levels = <
252*4882a593Smuzhiyun			0  1  2  3  4  5  6  7  8  9
253*4882a593Smuzhiyun			10 11 12 13 14 15 16 17 18 19
254*4882a593Smuzhiyun			20 21 22 23 24 25 26 27 28 29
255*4882a593Smuzhiyun			30 31 32 33 34 35 36 37 38 39
256*4882a593Smuzhiyun			40 41 42 43 44 45 46 47 48 49
257*4882a593Smuzhiyun			50 51 52 53 54 55 56 57 58 59
258*4882a593Smuzhiyun			60 61 62 63 64 65 66 67 68 69
259*4882a593Smuzhiyun			70 71 72 73 74 75 76 77 78 79
260*4882a593Smuzhiyun			80 81 82 83 84 85 86 87 88 89
261*4882a593Smuzhiyun			90 91 92 93 94 95 96 97 98 99
262*4882a593Smuzhiyun			100
263*4882a593Smuzhiyun		>;
264*4882a593Smuzhiyun		default-brightness-level = <100>;
265*4882a593Smuzhiyun	};
266*4882a593Smuzhiyun};
267