1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun #define PINMUX_PIN(no, func, ioset) \ 3*4882a593Smuzhiyun (((no) & 0xffff) | (((func) & 0xf) << 16) | (((ioset) & 0xff) << 20)) 4*4882a593Smuzhiyun 5*4882a593Smuzhiyun #define PIN_PA0 0 6*4882a593Smuzhiyun #define PIN_PA0__GPIO PINMUX_PIN(PIN_PA0, 0, 0) 7*4882a593Smuzhiyun #define PIN_PA0__SDMMC0_CK PINMUX_PIN(PIN_PA0, 1, 1) 8*4882a593Smuzhiyun #define PIN_PA0__QSPI0_SCK PINMUX_PIN(PIN_PA0, 2, 1) 9*4882a593Smuzhiyun #define PIN_PA0__D0 PINMUX_PIN(PIN_PA0, 6, 2) 10*4882a593Smuzhiyun #define PIN_PA1 1 11*4882a593Smuzhiyun #define PIN_PA1__GPIO PINMUX_PIN(PIN_PA1, 0, 0) 12*4882a593Smuzhiyun #define PIN_PA1__SDMMC0_CMD PINMUX_PIN(PIN_PA1, 1, 1) 13*4882a593Smuzhiyun #define PIN_PA1__QSPI0_CS PINMUX_PIN(PIN_PA1, 2, 1) 14*4882a593Smuzhiyun #define PIN_PA1__D1 PINMUX_PIN(PIN_PA1, 6, 2) 15*4882a593Smuzhiyun #define PIN_PA2 2 16*4882a593Smuzhiyun #define PIN_PA2__GPIO PINMUX_PIN(PIN_PA2, 0, 0) 17*4882a593Smuzhiyun #define PIN_PA2__SDMMC0_DAT0 PINMUX_PIN(PIN_PA2, 1, 1) 18*4882a593Smuzhiyun #define PIN_PA2__QSPI0_IO0 PINMUX_PIN(PIN_PA2, 2, 1) 19*4882a593Smuzhiyun #define PIN_PA2__D2 PINMUX_PIN(PIN_PA2, 6, 2) 20*4882a593Smuzhiyun #define PIN_PA3 3 21*4882a593Smuzhiyun #define PIN_PA3__GPIO PINMUX_PIN(PIN_PA3, 0, 0) 22*4882a593Smuzhiyun #define PIN_PA3__SDMMC0_DAT1 PINMUX_PIN(PIN_PA3, 1, 1) 23*4882a593Smuzhiyun #define PIN_PA3__QSPI0_IO1 PINMUX_PIN(PIN_PA3, 2, 1) 24*4882a593Smuzhiyun #define PIN_PA3__D3 PINMUX_PIN(PIN_PA3, 6, 2) 25*4882a593Smuzhiyun #define PIN_PA4 4 26*4882a593Smuzhiyun #define PIN_PA4__GPIO PINMUX_PIN(PIN_PA4, 0, 0) 27*4882a593Smuzhiyun #define PIN_PA4__SDMMC0_DAT2 PINMUX_PIN(PIN_PA4, 1, 1) 28*4882a593Smuzhiyun #define PIN_PA4__QSPI0_IO2 PINMUX_PIN(PIN_PA4, 2, 1) 29*4882a593Smuzhiyun #define PIN_PA4__D4 PINMUX_PIN(PIN_PA4, 6, 2) 30*4882a593Smuzhiyun #define PIN_PA5 5 31*4882a593Smuzhiyun #define PIN_PA5__GPIO PINMUX_PIN(PIN_PA5, 0, 0) 32*4882a593Smuzhiyun #define PIN_PA5__SDMMC0_DAT3 PINMUX_PIN(PIN_PA5, 1, 1) 33*4882a593Smuzhiyun #define PIN_PA5__QSPI0_IO3 PINMUX_PIN(PIN_PA5, 2, 1) 34*4882a593Smuzhiyun #define PIN_PA5__D5 PINMUX_PIN(PIN_PA5, 6, 2) 35*4882a593Smuzhiyun #define PIN_PA6 6 36*4882a593Smuzhiyun #define PIN_PA6__GPIO PINMUX_PIN(PIN_PA6, 0, 0) 37*4882a593Smuzhiyun #define PIN_PA6__SDMMC0_DAT4 PINMUX_PIN(PIN_PA6, 1, 1) 38*4882a593Smuzhiyun #define PIN_PA6__QSPI1_SCK PINMUX_PIN(PIN_PA6, 2, 1) 39*4882a593Smuzhiyun #define PIN_PA6__TIOA5 PINMUX_PIN(PIN_PA6, 4, 1) 40*4882a593Smuzhiyun #define PIN_PA6__FLEXCOM2_IO0 PINMUX_PIN(PIN_PA6, 5, 1) 41*4882a593Smuzhiyun #define PIN_PA6__D6 PINMUX_PIN(PIN_PA6, 6, 2) 42*4882a593Smuzhiyun #define PIN_PA7 7 43*4882a593Smuzhiyun #define PIN_PA7__GPIO PINMUX_PIN(PIN_PA7, 0, 0) 44*4882a593Smuzhiyun #define PIN_PA7__SDMMC0_DAT5 PINMUX_PIN(PIN_PA7, 1, 1) 45*4882a593Smuzhiyun #define PIN_PA7__QSPI1_IO0 PINMUX_PIN(PIN_PA7, 2, 1) 46*4882a593Smuzhiyun #define PIN_PA7__TIOB5 PINMUX_PIN(PIN_PA7, 4, 1) 47*4882a593Smuzhiyun #define PIN_PA7__FLEXCOM2_IO1 PINMUX_PIN(PIN_PA7, 5, 1) 48*4882a593Smuzhiyun #define PIN_PA7__D7 PINMUX_PIN(PIN_PA7, 6, 2) 49*4882a593Smuzhiyun #define PIN_PA8 8 50*4882a593Smuzhiyun #define PIN_PA8__GPIO PINMUX_PIN(PIN_PA8, 0, 0) 51*4882a593Smuzhiyun #define PIN_PA8__SDMMC0_DAT6 PINMUX_PIN(PIN_PA8, 1, 1) 52*4882a593Smuzhiyun #define PIN_PA8__QSPI1_IO1 PINMUX_PIN(PIN_PA8, 2, 1) 53*4882a593Smuzhiyun #define PIN_PA8__TCLK5 PINMUX_PIN(PIN_PA8, 4, 1) 54*4882a593Smuzhiyun #define PIN_PA8__FLEXCOM2_IO2 PINMUX_PIN(PIN_PA8, 5, 1) 55*4882a593Smuzhiyun #define PIN_PA8__NWE_NANDWE PINMUX_PIN(PIN_PA8, 6, 2) 56*4882a593Smuzhiyun #define PIN_PA9 9 57*4882a593Smuzhiyun #define PIN_PA9__GPIO PINMUX_PIN(PIN_PA9, 0, 0) 58*4882a593Smuzhiyun #define PIN_PA9__SDMMC0_DAT7 PINMUX_PIN(PIN_PA9, 1, 1) 59*4882a593Smuzhiyun #define PIN_PA9__QSPI1_IO2 PINMUX_PIN(PIN_PA9, 2, 1) 60*4882a593Smuzhiyun #define PIN_PA9__TIOA4 PINMUX_PIN(PIN_PA9, 4, 1) 61*4882a593Smuzhiyun #define PIN_PA9__FLEXCOM2_IO3 PINMUX_PIN(PIN_PA9, 5, 1) 62*4882a593Smuzhiyun #define PIN_PA9__NCS3 PINMUX_PIN(PIN_PA9, 6, 2) 63*4882a593Smuzhiyun #define PIN_PA10 10 64*4882a593Smuzhiyun #define PIN_PA10__GPIO PINMUX_PIN(PIN_PA10, 0, 0) 65*4882a593Smuzhiyun #define PIN_PA10__SDMMC0_RSTN PINMUX_PIN(PIN_PA10, 1, 1) 66*4882a593Smuzhiyun #define PIN_PA10__QSPI1_IO3 PINMUX_PIN(PIN_PA10, 2, 1) 67*4882a593Smuzhiyun #define PIN_PA10__TIOB4 PINMUX_PIN(PIN_PA10, 4, 1) 68*4882a593Smuzhiyun #define PIN_PA10__FLEXCOM2_IO4 PINMUX_PIN(PIN_PA10, 5, 1) 69*4882a593Smuzhiyun #define PIN_PA10__A21_NANDALE PINMUX_PIN(PIN_PA10, 6, 2) 70*4882a593Smuzhiyun #define PIN_PA11 11 71*4882a593Smuzhiyun #define PIN_PA11__GPIO PINMUX_PIN(PIN_PA11, 0, 0) 72*4882a593Smuzhiyun #define PIN_PA11__SDMMC0_VDDSEL PINMUX_PIN(PIN_PA11, 1, 1) 73*4882a593Smuzhiyun #define PIN_PA11__QSPI1_CS PINMUX_PIN(PIN_PA11, 2, 1) 74*4882a593Smuzhiyun #define PIN_PA11__TCLK4 PINMUX_PIN(PIN_PA11, 4, 1) 75*4882a593Smuzhiyun #define PIN_PA11__A22_NANDCLE PINMUX_PIN(PIN_PA11, 6, 2) 76*4882a593Smuzhiyun #define PIN_PA12 12 77*4882a593Smuzhiyun #define PIN_PA12__GPIO PINMUX_PIN(PIN_PA12, 0, 0) 78*4882a593Smuzhiyun #define PIN_PA12__SDMMC0_WP PINMUX_PIN(PIN_PA12, 1, 1) 79*4882a593Smuzhiyun #define PIN_PA12__IRQ PINMUX_PIN(PIN_PA12, 2, 1) 80*4882a593Smuzhiyun #define PIN_PA12__NRD_NANDOE PINMUX_PIN(PIN_PA12, 6, 2) 81*4882a593Smuzhiyun #define PIN_PA13 13 82*4882a593Smuzhiyun #define PIN_PA13__GPIO PINMUX_PIN(PIN_PA13, 0, 0) 83*4882a593Smuzhiyun #define PIN_PA13__SDMMC0_CD PINMUX_PIN(PIN_PA13, 1, 1) 84*4882a593Smuzhiyun #define PIN_PA13__FLEXCOM3_IO1 PINMUX_PIN(PIN_PA13, 5, 1) 85*4882a593Smuzhiyun #define PIN_PA13__D8 PINMUX_PIN(PIN_PA13, 6, 2) 86*4882a593Smuzhiyun #define PIN_PA14 14 87*4882a593Smuzhiyun #define PIN_PA14__GPIO PINMUX_PIN(PIN_PA14, 0, 0) 88*4882a593Smuzhiyun #define PIN_PA14__SPI0_SPCK PINMUX_PIN(PIN_PA14, 1, 1) 89*4882a593Smuzhiyun #define PIN_PA14__TK1 PINMUX_PIN(PIN_PA14, 2, 1) 90*4882a593Smuzhiyun #define PIN_PA14__QSPI0_SCK PINMUX_PIN(PIN_PA14, 3, 2) 91*4882a593Smuzhiyun #define PIN_PA14__I2SC1_MCK PINMUX_PIN(PIN_PA14, 4, 2) 92*4882a593Smuzhiyun #define PIN_PA14__FLEXCOM3_IO2 PINMUX_PIN(PIN_PA14, 5, 1) 93*4882a593Smuzhiyun #define PIN_PA14__D9 PINMUX_PIN(PIN_PA14, 6, 2) 94*4882a593Smuzhiyun #define PIN_PA15 15 95*4882a593Smuzhiyun #define PIN_PA15__GPIO PINMUX_PIN(PIN_PA15, 0, 0) 96*4882a593Smuzhiyun #define PIN_PA15__SPI0_MOSI PINMUX_PIN(PIN_PA15, 1, 1) 97*4882a593Smuzhiyun #define PIN_PA15__TF1 PINMUX_PIN(PIN_PA15, 2, 1) 98*4882a593Smuzhiyun #define PIN_PA15__QSPI0_CS PINMUX_PIN(PIN_PA15, 3, 2) 99*4882a593Smuzhiyun #define PIN_PA15__I2SC1_CK PINMUX_PIN(PIN_PA15, 4, 2) 100*4882a593Smuzhiyun #define PIN_PA15__FLEXCOM3_IO0 PINMUX_PIN(PIN_PA15, 5, 1) 101*4882a593Smuzhiyun #define PIN_PA15__D10 PINMUX_PIN(PIN_PA15, 6, 2) 102*4882a593Smuzhiyun #define PIN_PA16 16 103*4882a593Smuzhiyun #define PIN_PA16__GPIO PINMUX_PIN(PIN_PA16, 0, 0) 104*4882a593Smuzhiyun #define PIN_PA16__SPI0_MISO PINMUX_PIN(PIN_PA16, 1, 1) 105*4882a593Smuzhiyun #define PIN_PA16__TD1 PINMUX_PIN(PIN_PA16, 2, 1) 106*4882a593Smuzhiyun #define PIN_PA16__QSPI0_IO0 PINMUX_PIN(PIN_PA16, 3, 2) 107*4882a593Smuzhiyun #define PIN_PA16__I2SC1_WS PINMUX_PIN(PIN_PA16, 4, 2) 108*4882a593Smuzhiyun #define PIN_PA16__FLEXCOM3_IO3 PINMUX_PIN(PIN_PA16, 5, 1) 109*4882a593Smuzhiyun #define PIN_PA16__D11 PINMUX_PIN(PIN_PA16, 6, 2) 110*4882a593Smuzhiyun #define PIN_PA17 17 111*4882a593Smuzhiyun #define PIN_PA17__GPIO PINMUX_PIN(PIN_PA17, 0, 0) 112*4882a593Smuzhiyun #define PIN_PA17__SPI0_NPCS0 PINMUX_PIN(PIN_PA17, 1, 1) 113*4882a593Smuzhiyun #define PIN_PA17__RD1 PINMUX_PIN(PIN_PA17, 2, 1) 114*4882a593Smuzhiyun #define PIN_PA17__QSPI0_IO1 PINMUX_PIN(PIN_PA17, 3, 2) 115*4882a593Smuzhiyun #define PIN_PA17__I2SC1_DI0 PINMUX_PIN(PIN_PA17, 4, 2) 116*4882a593Smuzhiyun #define PIN_PA17__FLEXCOM3_IO4 PINMUX_PIN(PIN_PA17, 5, 1) 117*4882a593Smuzhiyun #define PIN_PA17__D12 PINMUX_PIN(PIN_PA17, 6, 2) 118*4882a593Smuzhiyun #define PIN_PA18 18 119*4882a593Smuzhiyun #define PIN_PA18__GPIO PINMUX_PIN(PIN_PA18, 0, 0) 120*4882a593Smuzhiyun #define PIN_PA18__SPI0_NPCS1 PINMUX_PIN(PIN_PA18, 1, 1) 121*4882a593Smuzhiyun #define PIN_PA18__RK1 PINMUX_PIN(PIN_PA18, 2, 1) 122*4882a593Smuzhiyun #define PIN_PA18__QSPI0_IO2 PINMUX_PIN(PIN_PA18, 3, 2) 123*4882a593Smuzhiyun #define PIN_PA18__I2SC1_DO0 PINMUX_PIN(PIN_PA18, 4, 2) 124*4882a593Smuzhiyun #define PIN_PA18__SDMMC1_DAT0 PINMUX_PIN(PIN_PA18, 5, 1) 125*4882a593Smuzhiyun #define PIN_PA18__D13 PINMUX_PIN(PIN_PA18, 6, 2) 126*4882a593Smuzhiyun #define PIN_PA19 19 127*4882a593Smuzhiyun #define PIN_PA19__GPIO PINMUX_PIN(PIN_PA19, 0, 0) 128*4882a593Smuzhiyun #define PIN_PA19__SPI0_NPCS2 PINMUX_PIN(PIN_PA19, 1, 1) 129*4882a593Smuzhiyun #define PIN_PA19__RF1 PINMUX_PIN(PIN_PA19, 2, 1) 130*4882a593Smuzhiyun #define PIN_PA19__QSPI0_IO3 PINMUX_PIN(PIN_PA19, 3, 2) 131*4882a593Smuzhiyun #define PIN_PA19__TIOA0 PINMUX_PIN(PIN_PA19, 4, 1) 132*4882a593Smuzhiyun #define PIN_PA19__SDMMC1_DAT1 PINMUX_PIN(PIN_PA19, 5, 1) 133*4882a593Smuzhiyun #define PIN_PA19__D14 PINMUX_PIN(PIN_PA19, 6, 2) 134*4882a593Smuzhiyun #define PIN_PA20 20 135*4882a593Smuzhiyun #define PIN_PA20__GPIO PINMUX_PIN(PIN_PA20, 0, 0) 136*4882a593Smuzhiyun #define PIN_PA20__SPI0_NPCS3 PINMUX_PIN(PIN_PA20, 1, 1) 137*4882a593Smuzhiyun #define PIN_PA20__TIOB0 PINMUX_PIN(PIN_PA20, 4, 1) 138*4882a593Smuzhiyun #define PIN_PA20__SDMMC1_DAT2 PINMUX_PIN(PIN_PA20, 5, 1) 139*4882a593Smuzhiyun #define PIN_PA20__D15 PINMUX_PIN(PIN_PA20, 6, 2) 140*4882a593Smuzhiyun #define PIN_PA21 21 141*4882a593Smuzhiyun #define PIN_PA21__GPIO PINMUX_PIN(PIN_PA21, 0, 0) 142*4882a593Smuzhiyun #define PIN_PA21__IRQ PINMUX_PIN(PIN_PA21, 1, 2) 143*4882a593Smuzhiyun #define PIN_PA21__PCK2 PINMUX_PIN(PIN_PA21, 2, 3) 144*4882a593Smuzhiyun #define PIN_PA21__TCLK0 PINMUX_PIN(PIN_PA21, 4, 1) 145*4882a593Smuzhiyun #define PIN_PA21__SDMMC1_DAT3 PINMUX_PIN(PIN_PA21, 5, 1) 146*4882a593Smuzhiyun #define PIN_PA21__NANDRDY PINMUX_PIN(PIN_PA21, 6, 2) 147*4882a593Smuzhiyun #define PIN_PA22 22 148*4882a593Smuzhiyun #define PIN_PA22__GPIO PINMUX_PIN(PIN_PA22, 0, 0) 149*4882a593Smuzhiyun #define PIN_PA22__FLEXCOM1_IO2 PINMUX_PIN(PIN_PA22, 1, 1) 150*4882a593Smuzhiyun #define PIN_PA22__D0 PINMUX_PIN(PIN_PA22, 2, 1) 151*4882a593Smuzhiyun #define PIN_PA22__TCK PINMUX_PIN(PIN_PA22, 3, 4) 152*4882a593Smuzhiyun #define PIN_PA22__SPI1_SPCK PINMUX_PIN(PIN_PA22, 4, 2) 153*4882a593Smuzhiyun #define PIN_PA22__SDMMC1_CK PINMUX_PIN(PIN_PA22, 5, 1) 154*4882a593Smuzhiyun #define PIN_PA22__QSPI0_SCK PINMUX_PIN(PIN_PA22, 6, 3) 155*4882a593Smuzhiyun #define PIN_PA23 23 156*4882a593Smuzhiyun #define PIN_PA23__GPIO PINMUX_PIN(PIN_PA23, 0, 0) 157*4882a593Smuzhiyun #define PIN_PA23__FLEXCOM1_IO1 PINMUX_PIN(PIN_PA23, 1, 1) 158*4882a593Smuzhiyun #define PIN_PA23__D1 PINMUX_PIN(PIN_PA23, 2, 1) 159*4882a593Smuzhiyun #define PIN_PA23__TDI PINMUX_PIN(PIN_PA23, 3, 4) 160*4882a593Smuzhiyun #define PIN_PA23__SPI1_MOSI PINMUX_PIN(PIN_PA23, 4, 2) 161*4882a593Smuzhiyun #define PIN_PA23__QSPI0_CS PINMUX_PIN(PIN_PA23, 6, 3) 162*4882a593Smuzhiyun #define PIN_PA24 24 163*4882a593Smuzhiyun #define PIN_PA24__GPIO PINMUX_PIN(PIN_PA24, 0, 0) 164*4882a593Smuzhiyun #define PIN_PA24__FLEXCOM1_IO0 PINMUX_PIN(PIN_PA24, 1, 1) 165*4882a593Smuzhiyun #define PIN_PA24__D2 PINMUX_PIN(PIN_PA24, 2, 1) 166*4882a593Smuzhiyun #define PIN_PA24__TDO PINMUX_PIN(PIN_PA24, 3, 4) 167*4882a593Smuzhiyun #define PIN_PA24__SPI1_MISO PINMUX_PIN(PIN_PA24, 4, 2) 168*4882a593Smuzhiyun #define PIN_PA24__QSPI0_IO0 PINMUX_PIN(PIN_PA24, 6, 3) 169*4882a593Smuzhiyun #define PIN_PA25 25 170*4882a593Smuzhiyun #define PIN_PA25__GPIO PINMUX_PIN(PIN_PA25, 0, 0) 171*4882a593Smuzhiyun #define PIN_PA25__FLEXCOM1_IO3 PINMUX_PIN(PIN_PA25, 1, 1) 172*4882a593Smuzhiyun #define PIN_PA25__D3 PINMUX_PIN(PIN_PA25, 2, 1) 173*4882a593Smuzhiyun #define PIN_PA25__TMS PINMUX_PIN(PIN_PA25, 3, 4) 174*4882a593Smuzhiyun #define PIN_PA25__SPI1_NPCS0 PINMUX_PIN(PIN_PA25, 4, 2) 175*4882a593Smuzhiyun #define PIN_PA25__QSPI0_IO1 PINMUX_PIN(PIN_PA25, 6, 3) 176*4882a593Smuzhiyun #define PIN_PA26 26 177*4882a593Smuzhiyun #define PIN_PA26__GPIO PINMUX_PIN(PIN_PA26, 0, 0) 178*4882a593Smuzhiyun #define PIN_PA26__FLEXCOM1_IO4 PINMUX_PIN(PIN_PA26, 1, 1) 179*4882a593Smuzhiyun #define PIN_PA26__D4 PINMUX_PIN(PIN_PA26, 2, 1) 180*4882a593Smuzhiyun #define PIN_PA26__NTRST PINMUX_PIN(PIN_PA26, 3, 4) 181*4882a593Smuzhiyun #define PIN_PA26__SPI1_NPCS1 PINMUX_PIN(PIN_PA26, 4, 2) 182*4882a593Smuzhiyun #define PIN_PA26__QSPI0_IO2 PINMUX_PIN(PIN_PA26, 6, 3) 183*4882a593Smuzhiyun #define PIN_PA27 27 184*4882a593Smuzhiyun #define PIN_PA27__GPIO PINMUX_PIN(PIN_PA27, 0, 0) 185*4882a593Smuzhiyun #define PIN_PA27__TIOA1 PINMUX_PIN(PIN_PA27, 1, 2) 186*4882a593Smuzhiyun #define PIN_PA27__D5 PINMUX_PIN(PIN_PA27, 2, 1) 187*4882a593Smuzhiyun #define PIN_PA27__SPI0_NPCS2 PINMUX_PIN(PIN_PA27, 3, 2) 188*4882a593Smuzhiyun #define PIN_PA27__SPI1_NPCS2 PINMUX_PIN(PIN_PA27, 4, 2) 189*4882a593Smuzhiyun #define PIN_PA27__SDMMC1_RSTN PINMUX_PIN(PIN_PA27, 5, 1) 190*4882a593Smuzhiyun #define PIN_PA27__QSPI0_IO3 PINMUX_PIN(PIN_PA27, 6, 3) 191*4882a593Smuzhiyun #define PIN_PA28 28 192*4882a593Smuzhiyun #define PIN_PA28__GPIO PINMUX_PIN(PIN_PA28, 0, 0) 193*4882a593Smuzhiyun #define PIN_PA28__TIOB1 PINMUX_PIN(PIN_PA28, 1, 2) 194*4882a593Smuzhiyun #define PIN_PA28__D6 PINMUX_PIN(PIN_PA28, 2, 1) 195*4882a593Smuzhiyun #define PIN_PA28__SPI0_NPCS3 PINMUX_PIN(PIN_PA28, 3, 2) 196*4882a593Smuzhiyun #define PIN_PA28__SPI1_NPCS3 PINMUX_PIN(PIN_PA28, 4, 2) 197*4882a593Smuzhiyun #define PIN_PA28__SDMMC1_CMD PINMUX_PIN(PIN_PA28, 5, 1) 198*4882a593Smuzhiyun #define PIN_PA28__CLASSD_L0 PINMUX_PIN(PIN_PA28, 6, 1) 199*4882a593Smuzhiyun #define PIN_PA29 29 200*4882a593Smuzhiyun #define PIN_PA29__GPIO PINMUX_PIN(PIN_PA29, 0, 0) 201*4882a593Smuzhiyun #define PIN_PA29__TCLK1 PINMUX_PIN(PIN_PA29, 1, 2) 202*4882a593Smuzhiyun #define PIN_PA29__D7 PINMUX_PIN(PIN_PA29, 2, 1) 203*4882a593Smuzhiyun #define PIN_PA29__SPI0_NPCS1 PINMUX_PIN(PIN_PA29, 3, 2) 204*4882a593Smuzhiyun #define PIN_PA29__SDMMC1_WP PINMUX_PIN(PIN_PA29, 5, 1) 205*4882a593Smuzhiyun #define PIN_PA29__CLASSD_L1 PINMUX_PIN(PIN_PA29, 6, 1) 206*4882a593Smuzhiyun #define PIN_PA30 30 207*4882a593Smuzhiyun #define PIN_PA30__GPIO PINMUX_PIN(PIN_PA30, 0, 0) 208*4882a593Smuzhiyun #define PIN_PA30__NWE_NANDWE PINMUX_PIN(PIN_PA30, 2, 1) 209*4882a593Smuzhiyun #define PIN_PA30__SPI0_NPCS0 PINMUX_PIN(PIN_PA30, 3, 2) 210*4882a593Smuzhiyun #define PIN_PA30__PWMH0 PINMUX_PIN(PIN_PA30, 4, 1) 211*4882a593Smuzhiyun #define PIN_PA30__SDMMC1_CD PINMUX_PIN(PIN_PA30, 5, 1) 212*4882a593Smuzhiyun #define PIN_PA30__CLASSD_L2 PINMUX_PIN(PIN_PA30, 6, 1) 213*4882a593Smuzhiyun #define PIN_PA31 31 214*4882a593Smuzhiyun #define PIN_PA31__GPIO PINMUX_PIN(PIN_PA31, 0, 0) 215*4882a593Smuzhiyun #define PIN_PA31__NCS3 PINMUX_PIN(PIN_PA31, 2, 1) 216*4882a593Smuzhiyun #define PIN_PA31__SPI0_MISO PINMUX_PIN(PIN_PA31, 3, 2) 217*4882a593Smuzhiyun #define PIN_PA31__PWML0 PINMUX_PIN(PIN_PA31, 4, 1) 218*4882a593Smuzhiyun #define PIN_PA31__CLASSD_L3 PINMUX_PIN(PIN_PA31, 6, 1) 219*4882a593Smuzhiyun #define PIN_PB0 32 220*4882a593Smuzhiyun #define PIN_PB0__GPIO PINMUX_PIN(PIN_PB0, 0, 0) 221*4882a593Smuzhiyun #define PIN_PB0__A21_NANDALE PINMUX_PIN(PIN_PB0, 2, 1) 222*4882a593Smuzhiyun #define PIN_PB0__SPI0_MOSI PINMUX_PIN(PIN_PB0, 3, 2) 223*4882a593Smuzhiyun #define PIN_PB0__PWMH1 PINMUX_PIN(PIN_PB0, 4, 1) 224*4882a593Smuzhiyun #define PIN_PB1 33 225*4882a593Smuzhiyun #define PIN_PB1__GPIO PINMUX_PIN(PIN_PB1, 0, 0) 226*4882a593Smuzhiyun #define PIN_PB1__A22_NANDCLE PINMUX_PIN(PIN_PB1, 2, 1) 227*4882a593Smuzhiyun #define PIN_PB1__SPI0_SPCK PINMUX_PIN(PIN_PB1, 3, 2) 228*4882a593Smuzhiyun #define PIN_PB1__PWML1 PINMUX_PIN(PIN_PB1, 4, 1) 229*4882a593Smuzhiyun #define PIN_PB1__CLASSD_R0 PINMUX_PIN(PIN_PB1, 6, 1) 230*4882a593Smuzhiyun #define PIN_PB2 34 231*4882a593Smuzhiyun #define PIN_PB2__GPIO PINMUX_PIN(PIN_PB2, 0, 0) 232*4882a593Smuzhiyun #define PIN_PB2__NRD_NANDOE PINMUX_PIN(PIN_PB2, 2, 1) 233*4882a593Smuzhiyun #define PIN_PB2__PWMFI0 PINMUX_PIN(PIN_PB2, 4, 1) 234*4882a593Smuzhiyun #define PIN_PB2__CLASSD_R1 PINMUX_PIN(PIN_PB2, 6, 1) 235*4882a593Smuzhiyun #define PIN_PB3 35 236*4882a593Smuzhiyun #define PIN_PB3__GPIO PINMUX_PIN(PIN_PB3, 0, 0) 237*4882a593Smuzhiyun #define PIN_PB3__URXD4 PINMUX_PIN(PIN_PB3, 1, 1) 238*4882a593Smuzhiyun #define PIN_PB3__D8 PINMUX_PIN(PIN_PB3, 2, 1) 239*4882a593Smuzhiyun #define PIN_PB3__IRQ PINMUX_PIN(PIN_PB3, 3, 3) 240*4882a593Smuzhiyun #define PIN_PB3__PWMEXTRG0 PINMUX_PIN(PIN_PB3, 4, 1) 241*4882a593Smuzhiyun #define PIN_PB3__CLASSD_R2 PINMUX_PIN(PIN_PB3, 6, 1) 242*4882a593Smuzhiyun #define PIN_PB4 36 243*4882a593Smuzhiyun #define PIN_PB4__GPIO PINMUX_PIN(PIN_PB4, 0, 0) 244*4882a593Smuzhiyun #define PIN_PB4__UTXD4 PINMUX_PIN(PIN_PB4, 1, 1) 245*4882a593Smuzhiyun #define PIN_PB4__D9 PINMUX_PIN(PIN_PB4, 2, 1) 246*4882a593Smuzhiyun #define PIN_PB4__FIQ PINMUX_PIN(PIN_PB4, 3, 4) 247*4882a593Smuzhiyun #define PIN_PB4__CLASSD_R3 PINMUX_PIN(PIN_PB4, 6, 1) 248*4882a593Smuzhiyun #define PIN_PB5 37 249*4882a593Smuzhiyun #define PIN_PB5__GPIO PINMUX_PIN(PIN_PB5, 0, 0) 250*4882a593Smuzhiyun #define PIN_PB5__TCLK2 PINMUX_PIN(PIN_PB5, 1, 1) 251*4882a593Smuzhiyun #define PIN_PB5__D10 PINMUX_PIN(PIN_PB5, 2, 1) 252*4882a593Smuzhiyun #define PIN_PB5__PWMH2 PINMUX_PIN(PIN_PB5, 3, 1) 253*4882a593Smuzhiyun #define PIN_PB5__QSPI1_SCK PINMUX_PIN(PIN_PB5, 4, 2) 254*4882a593Smuzhiyun #define PIN_PB5__GTSUCOMP PINMUX_PIN(PIN_PB5, 6, 3) 255*4882a593Smuzhiyun #define PIN_PB6 38 256*4882a593Smuzhiyun #define PIN_PB6__GPIO PINMUX_PIN(PIN_PB6, 0, 0) 257*4882a593Smuzhiyun #define PIN_PB6__TIOA2 PINMUX_PIN(PIN_PB6, 1, 1) 258*4882a593Smuzhiyun #define PIN_PB6__D11 PINMUX_PIN(PIN_PB6, 2, 1) 259*4882a593Smuzhiyun #define PIN_PB6__PWML2 PINMUX_PIN(PIN_PB6, 3, 1) 260*4882a593Smuzhiyun #define PIN_PB6__QSPI1_CS PINMUX_PIN(PIN_PB6, 4, 2) 261*4882a593Smuzhiyun #define PIN_PB6__GTXER PINMUX_PIN(PIN_PB6, 6, 3) 262*4882a593Smuzhiyun #define PIN_PB7 39 263*4882a593Smuzhiyun #define PIN_PB7__GPIO PINMUX_PIN(PIN_PB7, 0, 0) 264*4882a593Smuzhiyun #define PIN_PB7__TIOB2 PINMUX_PIN(PIN_PB7, 1, 1) 265*4882a593Smuzhiyun #define PIN_PB7__D12 PINMUX_PIN(PIN_PB7, 2, 1) 266*4882a593Smuzhiyun #define PIN_PB7__PWMH3 PINMUX_PIN(PIN_PB7, 3, 1) 267*4882a593Smuzhiyun #define PIN_PB7__QSPI1_IO0 PINMUX_PIN(PIN_PB7, 4, 2) 268*4882a593Smuzhiyun #define PIN_PB7__GRXCK PINMUX_PIN(PIN_PB7, 6, 3) 269*4882a593Smuzhiyun #define PIN_PB8 40 270*4882a593Smuzhiyun #define PIN_PB8__GPIO PINMUX_PIN(PIN_PB8, 0, 0) 271*4882a593Smuzhiyun #define PIN_PB8__TCLK3 PINMUX_PIN(PIN_PB8, 1, 1) 272*4882a593Smuzhiyun #define PIN_PB8__D13 PINMUX_PIN(PIN_PB8, 2, 1) 273*4882a593Smuzhiyun #define PIN_PB8__PWML3 PINMUX_PIN(PIN_PB8, 3, 1) 274*4882a593Smuzhiyun #define PIN_PB8__QSPI1_IO1 PINMUX_PIN(PIN_PB8, 4, 2) 275*4882a593Smuzhiyun #define PIN_PB8__GCRS PINMUX_PIN(PIN_PB8, 6, 3) 276*4882a593Smuzhiyun #define PIN_PB9 41 277*4882a593Smuzhiyun #define PIN_PB9__GPIO PINMUX_PIN(PIN_PB9, 0, 0) 278*4882a593Smuzhiyun #define PIN_PB9__TIOA3 PINMUX_PIN(PIN_PB9, 1, 1) 279*4882a593Smuzhiyun #define PIN_PB9__D14 PINMUX_PIN(PIN_PB9, 2, 1) 280*4882a593Smuzhiyun #define PIN_PB9__PWMFI1 PINMUX_PIN(PIN_PB9, 3, 1) 281*4882a593Smuzhiyun #define PIN_PB9__QSPI1_IO2 PINMUX_PIN(PIN_PB9, 4, 2) 282*4882a593Smuzhiyun #define PIN_PB9__GCOL PINMUX_PIN(PIN_PB9, 6, 3) 283*4882a593Smuzhiyun #define PIN_PB10 42 284*4882a593Smuzhiyun #define PIN_PB10__GPIO PINMUX_PIN(PIN_PB10, 0, 0) 285*4882a593Smuzhiyun #define PIN_PB10__TIOB3 PINMUX_PIN(PIN_PB10, 1, 1) 286*4882a593Smuzhiyun #define PIN_PB10__D15 PINMUX_PIN(PIN_PB10, 2, 1) 287*4882a593Smuzhiyun #define PIN_PB10__PWMEXTRG1 PINMUX_PIN(PIN_PB10, 3, 1) 288*4882a593Smuzhiyun #define PIN_PB10__QSPI1_IO3 PINMUX_PIN(PIN_PB10, 4, 2) 289*4882a593Smuzhiyun #define PIN_PB10__GRX2 PINMUX_PIN(PIN_PB10, 6, 3) 290*4882a593Smuzhiyun #define PIN_PB11 43 291*4882a593Smuzhiyun #define PIN_PB11__GPIO PINMUX_PIN(PIN_PB11, 0, 0) 292*4882a593Smuzhiyun #define PIN_PB11__LCDDAT0 PINMUX_PIN(PIN_PB11, 1, 1) 293*4882a593Smuzhiyun #define PIN_PB11__A0_NBS0 PINMUX_PIN(PIN_PB11, 2, 1) 294*4882a593Smuzhiyun #define PIN_PB11__URXD3 PINMUX_PIN(PIN_PB11, 3, 3) 295*4882a593Smuzhiyun #define PIN_PB11__PDMIC_DAT PINMUX_PIN(PIN_PB11, 4, 2) 296*4882a593Smuzhiyun #define PIN_PB11__GRX3 PINMUX_PIN(PIN_PB11, 6, 3) 297*4882a593Smuzhiyun #define PIN_PB12 44 298*4882a593Smuzhiyun #define PIN_PB12__GPIO PINMUX_PIN(PIN_PB12, 0, 0) 299*4882a593Smuzhiyun #define PIN_PB12__LCDDAT1 PINMUX_PIN(PIN_PB12, 1, 1) 300*4882a593Smuzhiyun #define PIN_PB12__A1 PINMUX_PIN(PIN_PB12, 2, 1) 301*4882a593Smuzhiyun #define PIN_PB12__UTXD3 PINMUX_PIN(PIN_PB12, 3, 3) 302*4882a593Smuzhiyun #define PIN_PB12__PDMIC_CLK PINMUX_PIN(PIN_PB12, 4, 2) 303*4882a593Smuzhiyun #define PIN_PB12__GTX2 PINMUX_PIN(PIN_PB12, 6, 3) 304*4882a593Smuzhiyun #define PIN_PB13 45 305*4882a593Smuzhiyun #define PIN_PB13__GPIO PINMUX_PIN(PIN_PB13, 0, 0) 306*4882a593Smuzhiyun #define PIN_PB13__LCDDAT2 PINMUX_PIN(PIN_PB13, 1, 1) 307*4882a593Smuzhiyun #define PIN_PB13__A2 PINMUX_PIN(PIN_PB13, 2, 1) 308*4882a593Smuzhiyun #define PIN_PB13__PCK1 PINMUX_PIN(PIN_PB13, 3, 3) 309*4882a593Smuzhiyun #define PIN_PB13__GTX3 PINMUX_PIN(PIN_PB13, 6, 3) 310*4882a593Smuzhiyun #define PIN_PB14 46 311*4882a593Smuzhiyun #define PIN_PB14__GPIO PINMUX_PIN(PIN_PB14, 0, 0) 312*4882a593Smuzhiyun #define PIN_PB14__LCDDAT3 PINMUX_PIN(PIN_PB14, 1, 1) 313*4882a593Smuzhiyun #define PIN_PB14__A3 PINMUX_PIN(PIN_PB14, 2, 1) 314*4882a593Smuzhiyun #define PIN_PB14__TK1 PINMUX_PIN(PIN_PB14, 3, 2) 315*4882a593Smuzhiyun #define PIN_PB14__I2SC1_MCK PINMUX_PIN(PIN_PB14, 4, 1) 316*4882a593Smuzhiyun #define PIN_PB14__QSPI1_SCK PINMUX_PIN(PIN_PB14, 5, 3) 317*4882a593Smuzhiyun #define PIN_PB14__GTXCK PINMUX_PIN(PIN_PB14, 6, 3) 318*4882a593Smuzhiyun #define PIN_PB15 47 319*4882a593Smuzhiyun #define PIN_PB15__GPIO PINMUX_PIN(PIN_PB15, 0, 0) 320*4882a593Smuzhiyun #define PIN_PB15__LCDDAT4 PINMUX_PIN(PIN_PB15, 1, 1) 321*4882a593Smuzhiyun #define PIN_PB15__A4 PINMUX_PIN(PIN_PB15, 2, 1) 322*4882a593Smuzhiyun #define PIN_PB15__TF1 PINMUX_PIN(PIN_PB15, 3, 2) 323*4882a593Smuzhiyun #define PIN_PB15__I2SC1_CK PINMUX_PIN(PIN_PB15, 4, 1) 324*4882a593Smuzhiyun #define PIN_PB15__QSPI1_CS PINMUX_PIN(PIN_PB15, 5, 3) 325*4882a593Smuzhiyun #define PIN_PB15__GTXEN PINMUX_PIN(PIN_PB15, 6, 3) 326*4882a593Smuzhiyun #define PIN_PB16 48 327*4882a593Smuzhiyun #define PIN_PB16__GPIO PINMUX_PIN(PIN_PB16, 0, 0) 328*4882a593Smuzhiyun #define PIN_PB16__LCDDAT5 PINMUX_PIN(PIN_PB16, 1, 1) 329*4882a593Smuzhiyun #define PIN_PB16__A5 PINMUX_PIN(PIN_PB16, 2, 1) 330*4882a593Smuzhiyun #define PIN_PB16__TD1 PINMUX_PIN(PIN_PB16, 3, 2) 331*4882a593Smuzhiyun #define PIN_PB16__I2SC1_WS PINMUX_PIN(PIN_PB16, 4, 1) 332*4882a593Smuzhiyun #define PIN_PB16__QSPI1_IO0 PINMUX_PIN(PIN_PB16, 5, 3) 333*4882a593Smuzhiyun #define PIN_PB16__GRXDV PINMUX_PIN(PIN_PB16, 6, 3) 334*4882a593Smuzhiyun #define PIN_PB17 49 335*4882a593Smuzhiyun #define PIN_PB17__GPIO PINMUX_PIN(PIN_PB17, 0, 0) 336*4882a593Smuzhiyun #define PIN_PB17__LCDDAT6 PINMUX_PIN(PIN_PB17, 1, 1) 337*4882a593Smuzhiyun #define PIN_PB17__A6 PINMUX_PIN(PIN_PB17, 2, 1) 338*4882a593Smuzhiyun #define PIN_PB17__RD1 PINMUX_PIN(PIN_PB17, 3, 2) 339*4882a593Smuzhiyun #define PIN_PB17__I2SC1_DI0 PINMUX_PIN(PIN_PB17, 4, 1) 340*4882a593Smuzhiyun #define PIN_PB17__QSPI1_IO1 PINMUX_PIN(PIN_PB17, 5, 3) 341*4882a593Smuzhiyun #define PIN_PB17__GRXER PINMUX_PIN(PIN_PB17, 6, 3) 342*4882a593Smuzhiyun #define PIN_PB18 50 343*4882a593Smuzhiyun #define PIN_PB18__GPIO PINMUX_PIN(PIN_PB18, 0, 0) 344*4882a593Smuzhiyun #define PIN_PB18__LCDDAT7 PINMUX_PIN(PIN_PB18, 1, 1) 345*4882a593Smuzhiyun #define PIN_PB18__A7 PINMUX_PIN(PIN_PB18, 2, 1) 346*4882a593Smuzhiyun #define PIN_PB18__RK1 PINMUX_PIN(PIN_PB18, 3, 2) 347*4882a593Smuzhiyun #define PIN_PB18__I2SC1_DO0 PINMUX_PIN(PIN_PB18, 4, 1) 348*4882a593Smuzhiyun #define PIN_PB18__QSPI1_IO2 PINMUX_PIN(PIN_PB18, 5, 3) 349*4882a593Smuzhiyun #define PIN_PB18__GRX0 PINMUX_PIN(PIN_PB18, 6, 3) 350*4882a593Smuzhiyun #define PIN_PB19 51 351*4882a593Smuzhiyun #define PIN_PB19__GPIO PINMUX_PIN(PIN_PB19, 0, 0) 352*4882a593Smuzhiyun #define PIN_PB19__LCDDAT8 PINMUX_PIN(PIN_PB19, 1, 1) 353*4882a593Smuzhiyun #define PIN_PB19__A8 PINMUX_PIN(PIN_PB19, 2, 1) 354*4882a593Smuzhiyun #define PIN_PB19__RF1 PINMUX_PIN(PIN_PB19, 3, 2) 355*4882a593Smuzhiyun #define PIN_PB19__TIOA3 PINMUX_PIN(PIN_PB19, 4, 2) 356*4882a593Smuzhiyun #define PIN_PB19__QSPI1_IO3 PINMUX_PIN(PIN_PB19, 5, 3) 357*4882a593Smuzhiyun #define PIN_PB19__GRX1 PINMUX_PIN(PIN_PB19, 6, 3) 358*4882a593Smuzhiyun #define PIN_PB20 52 359*4882a593Smuzhiyun #define PIN_PB20__GPIO PINMUX_PIN(PIN_PB20, 0, 0) 360*4882a593Smuzhiyun #define PIN_PB20__LCDDAT9 PINMUX_PIN(PIN_PB20, 1, 1) 361*4882a593Smuzhiyun #define PIN_PB20__A9 PINMUX_PIN(PIN_PB20, 2, 1) 362*4882a593Smuzhiyun #define PIN_PB20__TK0 PINMUX_PIN(PIN_PB20, 3, 1) 363*4882a593Smuzhiyun #define PIN_PB20__TIOB3 PINMUX_PIN(PIN_PB20, 4, 2) 364*4882a593Smuzhiyun #define PIN_PB20__PCK1 PINMUX_PIN(PIN_PB20, 5, 4) 365*4882a593Smuzhiyun #define PIN_PB20__GTX0 PINMUX_PIN(PIN_PB20, 6, 3) 366*4882a593Smuzhiyun #define PIN_PB21 53 367*4882a593Smuzhiyun #define PIN_PB21__GPIO PINMUX_PIN(PIN_PB21, 0, 0) 368*4882a593Smuzhiyun #define PIN_PB21__LCDDAT10 PINMUX_PIN(PIN_PB21, 1, 1) 369*4882a593Smuzhiyun #define PIN_PB21__A10 PINMUX_PIN(PIN_PB21, 2, 1) 370*4882a593Smuzhiyun #define PIN_PB21__TF0 PINMUX_PIN(PIN_PB21, 3, 1) 371*4882a593Smuzhiyun #define PIN_PB21__TCLK3 PINMUX_PIN(PIN_PB21, 4, 2) 372*4882a593Smuzhiyun #define PIN_PB21__FLEXCOM3_IO2 PINMUX_PIN(PIN_PB21, 5, 3) 373*4882a593Smuzhiyun #define PIN_PB21__GTX1 PINMUX_PIN(PIN_PB21, 6, 3) 374*4882a593Smuzhiyun #define PIN_PB22 54 375*4882a593Smuzhiyun #define PIN_PB22__GPIO PINMUX_PIN(PIN_PB22, 0, 0) 376*4882a593Smuzhiyun #define PIN_PB22__LCDDAT11 PINMUX_PIN(PIN_PB22, 1, 1) 377*4882a593Smuzhiyun #define PIN_PB22__A11 PINMUX_PIN(PIN_PB22, 2, 1) 378*4882a593Smuzhiyun #define PIN_PB22__TD0 PINMUX_PIN(PIN_PB22, 3, 1) 379*4882a593Smuzhiyun #define PIN_PB22__TIOA2 PINMUX_PIN(PIN_PB22, 4, 2) 380*4882a593Smuzhiyun #define PIN_PB22__FLEXCOM3_IO1 PINMUX_PIN(PIN_PB22, 5, 3) 381*4882a593Smuzhiyun #define PIN_PB22__GMDC PINMUX_PIN(PIN_PB22, 6, 3) 382*4882a593Smuzhiyun #define PIN_PB23 55 383*4882a593Smuzhiyun #define PIN_PB23__GPIO PINMUX_PIN(PIN_PB23, 0, 0) 384*4882a593Smuzhiyun #define PIN_PB23__LCDDAT12 PINMUX_PIN(PIN_PB23, 1, 1) 385*4882a593Smuzhiyun #define PIN_PB23__A12 PINMUX_PIN(PIN_PB23, 2, 1) 386*4882a593Smuzhiyun #define PIN_PB23__RD0 PINMUX_PIN(PIN_PB23, 3, 1) 387*4882a593Smuzhiyun #define PIN_PB23__TIOB2 PINMUX_PIN(PIN_PB23, 4, 2) 388*4882a593Smuzhiyun #define PIN_PB23__FLEXCOM3_IO0 PINMUX_PIN(PIN_PB23, 5, 3) 389*4882a593Smuzhiyun #define PIN_PB23__GMDIO PINMUX_PIN(PIN_PB23, 6, 3) 390*4882a593Smuzhiyun #define PIN_PB24 56 391*4882a593Smuzhiyun #define PIN_PB24__GPIO PINMUX_PIN(PIN_PB24, 0, 0) 392*4882a593Smuzhiyun #define PIN_PB24__LCDDAT13 PINMUX_PIN(PIN_PB24, 1, 1) 393*4882a593Smuzhiyun #define PIN_PB24__A13 PINMUX_PIN(PIN_PB24, 2, 1) 394*4882a593Smuzhiyun #define PIN_PB24__RK0 PINMUX_PIN(PIN_PB24, 3, 1) 395*4882a593Smuzhiyun #define PIN_PB24__TCLK2 PINMUX_PIN(PIN_PB24, 4, 2) 396*4882a593Smuzhiyun #define PIN_PB24__FLEXCOM3_IO3 PINMUX_PIN(PIN_PB24, 5, 3) 397*4882a593Smuzhiyun #define PIN_PB24__ISC_D10 PINMUX_PIN(PIN_PB24, 6, 3) 398*4882a593Smuzhiyun #define PIN_PB25 57 399*4882a593Smuzhiyun #define PIN_PB25__GPIO PINMUX_PIN(PIN_PB25, 0, 0) 400*4882a593Smuzhiyun #define PIN_PB25__LCDDAT14 PINMUX_PIN(PIN_PB25, 1, 1) 401*4882a593Smuzhiyun #define PIN_PB25__A14 PINMUX_PIN(PIN_PB25, 2, 1) 402*4882a593Smuzhiyun #define PIN_PB25__RF0 PINMUX_PIN(PIN_PB25, 3, 1) 403*4882a593Smuzhiyun #define PIN_PB25__FLEXCOM3_IO4 PINMUX_PIN(PIN_PB25, 5, 3) 404*4882a593Smuzhiyun #define PIN_PB25__ISC_D11 PINMUX_PIN(PIN_PB25, 6, 3) 405*4882a593Smuzhiyun #define PIN_PB26 58 406*4882a593Smuzhiyun #define PIN_PB26__GPIO PINMUX_PIN(PIN_PB26, 0, 0) 407*4882a593Smuzhiyun #define PIN_PB26__LCDDAT15 PINMUX_PIN(PIN_PB26, 1, 1) 408*4882a593Smuzhiyun #define PIN_PB26__A15 PINMUX_PIN(PIN_PB26, 2, 1) 409*4882a593Smuzhiyun #define PIN_PB26__URXD0 PINMUX_PIN(PIN_PB26, 3, 1) 410*4882a593Smuzhiyun #define PIN_PB26__PDMIC_DAT PINMUX_PIN(PIN_PB26, 4, 1) 411*4882a593Smuzhiyun #define PIN_PB26__ISC_D0 PINMUX_PIN(PIN_PB26, 6, 3) 412*4882a593Smuzhiyun #define PIN_PB27 59 413*4882a593Smuzhiyun #define PIN_PB27__GPIO PINMUX_PIN(PIN_PB27, 0, 0) 414*4882a593Smuzhiyun #define PIN_PB27__LCDDAT16 PINMUX_PIN(PIN_PB27, 1, 1) 415*4882a593Smuzhiyun #define PIN_PB27__A16 PINMUX_PIN(PIN_PB27, 2, 1) 416*4882a593Smuzhiyun #define PIN_PB27__UTXD0 PINMUX_PIN(PIN_PB27, 3, 1) 417*4882a593Smuzhiyun #define PIN_PB27__PDMIC_CLK PINMUX_PIN(PIN_PB27, 4, 1) 418*4882a593Smuzhiyun #define PIN_PB27__ISC_D1 PINMUX_PIN(PIN_PB27, 6, 3) 419*4882a593Smuzhiyun #define PIN_PB28 60 420*4882a593Smuzhiyun #define PIN_PB28__GPIO PINMUX_PIN(PIN_PB28, 0, 0) 421*4882a593Smuzhiyun #define PIN_PB28__LCDDAT17 PINMUX_PIN(PIN_PB28, 1, 1) 422*4882a593Smuzhiyun #define PIN_PB28__A17 PINMUX_PIN(PIN_PB28, 2, 1) 423*4882a593Smuzhiyun #define PIN_PB28__FLEXCOM0_IO0 PINMUX_PIN(PIN_PB28, 3, 1) 424*4882a593Smuzhiyun #define PIN_PB28__TIOA5 PINMUX_PIN(PIN_PB28, 4, 2) 425*4882a593Smuzhiyun #define PIN_PB28__ISC_D2 PINMUX_PIN(PIN_PB28, 6, 3) 426*4882a593Smuzhiyun #define PIN_PB29 61 427*4882a593Smuzhiyun #define PIN_PB29__GPIO PINMUX_PIN(PIN_PB29, 0, 0) 428*4882a593Smuzhiyun #define PIN_PB29__LCDDAT18 PINMUX_PIN(PIN_PB29, 1, 1) 429*4882a593Smuzhiyun #define PIN_PB29__A18 PINMUX_PIN(PIN_PB29, 2, 1) 430*4882a593Smuzhiyun #define PIN_PB29__FLEXCOM0_IO1 PINMUX_PIN(PIN_PB29, 3, 1) 431*4882a593Smuzhiyun #define PIN_PB29__TIOB5 PINMUX_PIN(PIN_PB29, 4, 2) 432*4882a593Smuzhiyun #define PIN_PB29__ISC_D3 PINMUX_PIN(PIN_PB29, 7, 3) 433*4882a593Smuzhiyun #define PIN_PB30 62 434*4882a593Smuzhiyun #define PIN_PB30__GPIO PINMUX_PIN(PIN_PB30, 0, 0) 435*4882a593Smuzhiyun #define PIN_PB30__LCDDAT19 PINMUX_PIN(PIN_PB30, 1, 1) 436*4882a593Smuzhiyun #define PIN_PB30__A19 PINMUX_PIN(PIN_PB30, 2, 1) 437*4882a593Smuzhiyun #define PIN_PB30__FLEXCOM0_IO2 PINMUX_PIN(PIN_PB30, 3, 1) 438*4882a593Smuzhiyun #define PIN_PB30__TCLK5 PINMUX_PIN(PIN_PB30, 4, 2) 439*4882a593Smuzhiyun #define PIN_PB30__ISC_D4 PINMUX_PIN(PIN_PB30, 6, 3) 440*4882a593Smuzhiyun #define PIN_PB31 63 441*4882a593Smuzhiyun #define PIN_PB31__GPIO PINMUX_PIN(PIN_PB31, 0, 0) 442*4882a593Smuzhiyun #define PIN_PB31__LCDDAT20 PINMUX_PIN(PIN_PB31, 1, 1) 443*4882a593Smuzhiyun #define PIN_PB31__A20 PINMUX_PIN(PIN_PB31, 2, 1) 444*4882a593Smuzhiyun #define PIN_PB31__FLEXCOM0_IO3 PINMUX_PIN(PIN_PB31, 3, 1) 445*4882a593Smuzhiyun #define PIN_PB31__TWD0 PINMUX_PIN(PIN_PB31, 4, 1) 446*4882a593Smuzhiyun #define PIN_PB31__ISC_D5 PINMUX_PIN(PIN_PB31, 6, 3) 447*4882a593Smuzhiyun #define PIN_PC0 64 448*4882a593Smuzhiyun #define PIN_PC0__GPIO PINMUX_PIN(PIN_PC0, 0, 0) 449*4882a593Smuzhiyun #define PIN_PC0__LCDDAT21 PINMUX_PIN(PIN_PC0, 1, 1) 450*4882a593Smuzhiyun #define PIN_PC0__A23 PINMUX_PIN(PIN_PC0, 2, 1) 451*4882a593Smuzhiyun #define PIN_PC0__FLEXCOM0_IO4 PINMUX_PIN(PIN_PC0, 3, 1) 452*4882a593Smuzhiyun #define PIN_PC0__TWCK0 PINMUX_PIN(PIN_PC0, 4, 1) 453*4882a593Smuzhiyun #define PIN_PC0__ISC_D6 PINMUX_PIN(PIN_PC0, 6, 3) 454*4882a593Smuzhiyun #define PIN_PC1 65 455*4882a593Smuzhiyun #define PIN_PC1__GPIO PINMUX_PIN(PIN_PC1, 0, 0) 456*4882a593Smuzhiyun #define PIN_PC1__LCDDAT22 PINMUX_PIN(PIN_PC1, 1, 1) 457*4882a593Smuzhiyun #define PIN_PC1__A24 PINMUX_PIN(PIN_PC1, 2, 1) 458*4882a593Smuzhiyun #define PIN_PC1__CANTX0 PINMUX_PIN(PIN_PC1, 3, 1) 459*4882a593Smuzhiyun #define PIN_PC1__SPI1_SPCK PINMUX_PIN(PIN_PC1, 4, 1) 460*4882a593Smuzhiyun #define PIN_PC1__I2SC0_CK PINMUX_PIN(PIN_PC1, 5, 1) 461*4882a593Smuzhiyun #define PIN_PC1__ISC_D7 PINMUX_PIN(PIN_PC1, 6, 3) 462*4882a593Smuzhiyun #define PIN_PC2 66 463*4882a593Smuzhiyun #define PIN_PC2__GPIO PINMUX_PIN(PIN_PC2, 0, 0) 464*4882a593Smuzhiyun #define PIN_PC2__LCDDAT23 PINMUX_PIN(PIN_PC2, 1, 1) 465*4882a593Smuzhiyun #define PIN_PC2__A25 PINMUX_PIN(PIN_PC2, 2, 1) 466*4882a593Smuzhiyun #define PIN_PC2__CANRX0 PINMUX_PIN(PIN_PC2, 3, 1) 467*4882a593Smuzhiyun #define PIN_PC2__SPI1_MOSI PINMUX_PIN(PIN_PC2, 4, 1) 468*4882a593Smuzhiyun #define PIN_PC2__I2SC0_MCK PINMUX_PIN(PIN_PC2, 5, 1) 469*4882a593Smuzhiyun #define PIN_PC2__ISC_D8 PINMUX_PIN(PIN_PC2, 6, 3) 470*4882a593Smuzhiyun #define PIN_PC3 67 471*4882a593Smuzhiyun #define PIN_PC3__GPIO PINMUX_PIN(PIN_PC3, 0, 0) 472*4882a593Smuzhiyun #define PIN_PC3__LCDPWM PINMUX_PIN(PIN_PC3, 1, 1) 473*4882a593Smuzhiyun #define PIN_PC3__NWAIT PINMUX_PIN(PIN_PC3, 2, 1) 474*4882a593Smuzhiyun #define PIN_PC3__TIOA1 PINMUX_PIN(PIN_PC3, 3, 1) 475*4882a593Smuzhiyun #define PIN_PC3__SPI1_MISO PINMUX_PIN(PIN_PC3, 4, 1) 476*4882a593Smuzhiyun #define PIN_PC3__I2SC0_WS PINMUX_PIN(PIN_PC3, 5, 1) 477*4882a593Smuzhiyun #define PIN_PC3__ISC_D9 PINMUX_PIN(PIN_PC3, 6, 3) 478*4882a593Smuzhiyun #define PIN_PC4 68 479*4882a593Smuzhiyun #define PIN_PC4__GPIO PINMUX_PIN(PIN_PC4, 0, 0) 480*4882a593Smuzhiyun #define PIN_PC4__LCDDISP PINMUX_PIN(PIN_PC4, 1, 1) 481*4882a593Smuzhiyun #define PIN_PC4__NWR1_NBS1 PINMUX_PIN(PIN_PC4, 2, 1) 482*4882a593Smuzhiyun #define PIN_PC4__TIOB1 PINMUX_PIN(PIN_PC4, 3, 1) 483*4882a593Smuzhiyun #define PIN_PC4__SPI1_NPCS0 PINMUX_PIN(PIN_PC4, 4, 1) 484*4882a593Smuzhiyun #define PIN_PC4__I2SC0_DI0 PINMUX_PIN(PIN_PC4, 5, 1) 485*4882a593Smuzhiyun #define PIN_PC4__ISC_PCK PINMUX_PIN(PIN_PC4, 6, 3) 486*4882a593Smuzhiyun #define PIN_PC5 69 487*4882a593Smuzhiyun #define PIN_PC5__GPIO PINMUX_PIN(PIN_PC5, 0, 0) 488*4882a593Smuzhiyun #define PIN_PC5__LCDVSYNC PINMUX_PIN(PIN_PC5, 1, 1) 489*4882a593Smuzhiyun #define PIN_PC5__NCS0 PINMUX_PIN(PIN_PC5, 2, 1) 490*4882a593Smuzhiyun #define PIN_PC5__TCLK1 PINMUX_PIN(PIN_PC5, 3, 1) 491*4882a593Smuzhiyun #define PIN_PC5__SPI1_NPCS1 PINMUX_PIN(PIN_PC5, 4, 1) 492*4882a593Smuzhiyun #define PIN_PC5__I2SC0_DO0 PINMUX_PIN(PIN_PC5, 5, 1) 493*4882a593Smuzhiyun #define PIN_PC5__ISC_VSYNC PINMUX_PIN(PIN_PC5, 6, 3) 494*4882a593Smuzhiyun #define PIN_PC6 70 495*4882a593Smuzhiyun #define PIN_PC6__GPIO PINMUX_PIN(PIN_PC6, 0, 0) 496*4882a593Smuzhiyun #define PIN_PC6__LCDHSYNC PINMUX_PIN(PIN_PC6, 1, 1) 497*4882a593Smuzhiyun #define PIN_PC6__NCS1 PINMUX_PIN(PIN_PC6, 2, 1) 498*4882a593Smuzhiyun #define PIN_PC6__TWD1 PINMUX_PIN(PIN_PC6, 3, 1) 499*4882a593Smuzhiyun #define PIN_PC6__SPI1_NPCS2 PINMUX_PIN(PIN_PC6, 4, 1) 500*4882a593Smuzhiyun #define PIN_PC6__ISC_HSYNC PINMUX_PIN(PIN_PC6, 6, 3) 501*4882a593Smuzhiyun #define PIN_PC7 71 502*4882a593Smuzhiyun #define PIN_PC7__GPIO PINMUX_PIN(PIN_PC7, 0, 0) 503*4882a593Smuzhiyun #define PIN_PC7__LCDPCK PINMUX_PIN(PIN_PC7, 1, 1) 504*4882a593Smuzhiyun #define PIN_PC7__NCS2 PINMUX_PIN(PIN_PC7, 2, 1) 505*4882a593Smuzhiyun #define PIN_PC7__TWCK1 PINMUX_PIN(PIN_PC7, 3, 1) 506*4882a593Smuzhiyun #define PIN_PC7__SPI1_NPCS3 PINMUX_PIN(PIN_PC7, 4, 1) 507*4882a593Smuzhiyun #define PIN_PC7__URXD1 PINMUX_PIN(PIN_PC7, 5, 2) 508*4882a593Smuzhiyun #define PIN_PC7__ISC_MCK PINMUX_PIN(PIN_PC7, 6, 3) 509*4882a593Smuzhiyun #define PIN_PC8 72 510*4882a593Smuzhiyun #define PIN_PC8__GPIO PINMUX_PIN(PIN_PC8, 0, 0) 511*4882a593Smuzhiyun #define PIN_PC8__LCDDEN PINMUX_PIN(PIN_PC8, 1, 1) 512*4882a593Smuzhiyun #define PIN_PC8__NANDRDY PINMUX_PIN(PIN_PC8, 2, 1) 513*4882a593Smuzhiyun #define PIN_PC8__FIQ PINMUX_PIN(PIN_PC8, 3, 1) 514*4882a593Smuzhiyun #define PIN_PC8__PCK0 PINMUX_PIN(PIN_PC8, 4, 3) 515*4882a593Smuzhiyun #define PIN_PC8__UTXD1 PINMUX_PIN(PIN_PC8, 5, 2) 516*4882a593Smuzhiyun #define PIN_PC8__ISC_FIELD PINMUX_PIN(PIN_PC8, 6, 3) 517*4882a593Smuzhiyun #define PIN_PC9 73 518*4882a593Smuzhiyun #define PIN_PC9__GPIO PINMUX_PIN(PIN_PC9, 0, 0) 519*4882a593Smuzhiyun #define PIN_PC9__FIQ PINMUX_PIN(PIN_PC9, 1, 3) 520*4882a593Smuzhiyun #define PIN_PC9__GTSUCOMP PINMUX_PIN(PIN_PC9, 2, 1) 521*4882a593Smuzhiyun #define PIN_PC9__ISC_D0 PINMUX_PIN(PIN_PC9, 3, 1) 522*4882a593Smuzhiyun #define PIN_PC9__TIOA4 PINMUX_PIN(PIN_PC9, 4, 2) 523*4882a593Smuzhiyun #define PIN_PC10 74 524*4882a593Smuzhiyun #define PIN_PC10__GPIO PINMUX_PIN(PIN_PC10, 0, 0) 525*4882a593Smuzhiyun #define PIN_PC10__LCDDAT2 PINMUX_PIN(PIN_PC10, 1, 2) 526*4882a593Smuzhiyun #define PIN_PC10__GTXCK PINMUX_PIN(PIN_PC10, 2, 1) 527*4882a593Smuzhiyun #define PIN_PC10__ISC_D1 PINMUX_PIN(PIN_PC10, 3, 1) 528*4882a593Smuzhiyun #define PIN_PC10__TIOB4 PINMUX_PIN(PIN_PC10, 4, 2) 529*4882a593Smuzhiyun #define PIN_PC10__CANTX0 PINMUX_PIN(PIN_PC10, 5, 2) 530*4882a593Smuzhiyun #define PIN_PC11 75 531*4882a593Smuzhiyun #define PIN_PC11__GPIO PINMUX_PIN(PIN_PC11, 0, 0) 532*4882a593Smuzhiyun #define PIN_PC11__LCDDAT3 PINMUX_PIN(PIN_PC11, 1, 2) 533*4882a593Smuzhiyun #define PIN_PC11__GTXEN PINMUX_PIN(PIN_PC11, 2, 1) 534*4882a593Smuzhiyun #define PIN_PC11__ISC_D2 PINMUX_PIN(PIN_PC11, 3, 1) 535*4882a593Smuzhiyun #define PIN_PC11__TCLK4 PINMUX_PIN(PIN_PC11, 4, 2) 536*4882a593Smuzhiyun #define PIN_PC11__CANRX0 PINMUX_PIN(PIN_PC11, 5, 2) 537*4882a593Smuzhiyun #define PIN_PC11__A0_NBS0 PINMUX_PIN(PIN_PC11, 6, 2) 538*4882a593Smuzhiyun #define PIN_PC12 76 539*4882a593Smuzhiyun #define PIN_PC12__GPIO PINMUX_PIN(PIN_PC12, 0, 0) 540*4882a593Smuzhiyun #define PIN_PC12__LCDDAT4 PINMUX_PIN(PIN_PC12, 1, 2) 541*4882a593Smuzhiyun #define PIN_PC12__GRXDV PINMUX_PIN(PIN_PC12, 2, 1) 542*4882a593Smuzhiyun #define PIN_PC12__ISC_D3 PINMUX_PIN(PIN_PC12, 3, 1) 543*4882a593Smuzhiyun #define PIN_PC12__URXD3 PINMUX_PIN(PIN_PC12, 4, 1) 544*4882a593Smuzhiyun #define PIN_PC12__TK0 PINMUX_PIN(PIN_PC12, 5, 2) 545*4882a593Smuzhiyun #define PIN_PC12__A1 PINMUX_PIN(PIN_PC12, 6, 2) 546*4882a593Smuzhiyun #define PIN_PC13 77 547*4882a593Smuzhiyun #define PIN_PC13__GPIO PINMUX_PIN(PIN_PC13, 0, 0) 548*4882a593Smuzhiyun #define PIN_PC13__LCDDAT5 PINMUX_PIN(PIN_PC13, 1, 2) 549*4882a593Smuzhiyun #define PIN_PC13__GRXER PINMUX_PIN(PIN_PC13, 2, 1) 550*4882a593Smuzhiyun #define PIN_PC13__ISC_D4 PINMUX_PIN(PIN_PC13, 3, 1) 551*4882a593Smuzhiyun #define PIN_PC13__UTXD3 PINMUX_PIN(PIN_PC13, 4, 1) 552*4882a593Smuzhiyun #define PIN_PC13__TF0 PINMUX_PIN(PIN_PC13, 5, 2) 553*4882a593Smuzhiyun #define PIN_PC13__A2 PINMUX_PIN(PIN_PC13, 6, 2) 554*4882a593Smuzhiyun #define PIN_PC14 78 555*4882a593Smuzhiyun #define PIN_PC14__GPIO PINMUX_PIN(PIN_PC14, 0, 0) 556*4882a593Smuzhiyun #define PIN_PC14__LCDDAT6 PINMUX_PIN(PIN_PC14, 1, 2) 557*4882a593Smuzhiyun #define PIN_PC14__GRX0 PINMUX_PIN(PIN_PC14, 2, 1) 558*4882a593Smuzhiyun #define PIN_PC14__ISC_D5 PINMUX_PIN(PIN_PC14, 3, 1) 559*4882a593Smuzhiyun #define PIN_PC14__TD0 PINMUX_PIN(PIN_PC14, 5, 2) 560*4882a593Smuzhiyun #define PIN_PC14__A3 PINMUX_PIN(PIN_PC14, 6, 2) 561*4882a593Smuzhiyun #define PIN_PC15 79 562*4882a593Smuzhiyun #define PIN_PC15__GPIO PINMUX_PIN(PIN_PC15, 0, 0) 563*4882a593Smuzhiyun #define PIN_PC15__LCDDAT7 PINMUX_PIN(PIN_PC15, 1, 2) 564*4882a593Smuzhiyun #define PIN_PC15__GRX1 PINMUX_PIN(PIN_PC15, 2, 1) 565*4882a593Smuzhiyun #define PIN_PC15__ISC_D6 PINMUX_PIN(PIN_PC15, 3, 1) 566*4882a593Smuzhiyun #define PIN_PC15__RD0 PINMUX_PIN(PIN_PC15, 5, 2) 567*4882a593Smuzhiyun #define PIN_PC15__A4 PINMUX_PIN(PIN_PC15, 6, 2) 568*4882a593Smuzhiyun #define PIN_PC16 80 569*4882a593Smuzhiyun #define PIN_PC16__GPIO PINMUX_PIN(PIN_PC16, 0, 0) 570*4882a593Smuzhiyun #define PIN_PC16__LCDDAT10 PINMUX_PIN(PIN_PC16, 1, 2) 571*4882a593Smuzhiyun #define PIN_PC16__GTX0 PINMUX_PIN(PIN_PC16, 2, 1) 572*4882a593Smuzhiyun #define PIN_PC16__ISC_D7 PINMUX_PIN(PIN_PC16, 3, 1) 573*4882a593Smuzhiyun #define PIN_PC16__RK0 PINMUX_PIN(PIN_PC16, 5, 2) 574*4882a593Smuzhiyun #define PIN_PC16__A5 PINMUX_PIN(PIN_PC16, 6, 2) 575*4882a593Smuzhiyun #define PIN_PC17 81 576*4882a593Smuzhiyun #define PIN_PC17__GPIO PINMUX_PIN(PIN_PC17, 0, 0) 577*4882a593Smuzhiyun #define PIN_PC17__LCDDAT11 PINMUX_PIN(PIN_PC17, 1, 2) 578*4882a593Smuzhiyun #define PIN_PC17__GTX1 PINMUX_PIN(PIN_PC17, 2, 1) 579*4882a593Smuzhiyun #define PIN_PC17__ISC_D8 PINMUX_PIN(PIN_PC17, 3, 1) 580*4882a593Smuzhiyun #define PIN_PC17__RF0 PINMUX_PIN(PIN_PC17, 5, 2) 581*4882a593Smuzhiyun #define PIN_PC17__A6 PINMUX_PIN(PIN_PC17, 6, 2) 582*4882a593Smuzhiyun #define PIN_PC18 82 583*4882a593Smuzhiyun #define PIN_PC18__GPIO PINMUX_PIN(PIN_PC18, 0, 0) 584*4882a593Smuzhiyun #define PIN_PC18__LCDDAT12 PINMUX_PIN(PIN_PC18, 1, 2) 585*4882a593Smuzhiyun #define PIN_PC18__GMDC PINMUX_PIN(PIN_PC18, 2, 1) 586*4882a593Smuzhiyun #define PIN_PC18__ISC_D9 PINMUX_PIN(PIN_PC18, 3, 1) 587*4882a593Smuzhiyun #define PIN_PC18__FLEXCOM3_IO2 PINMUX_PIN(PIN_PC18, 5, 2) 588*4882a593Smuzhiyun #define PIN_PC18__A7 PINMUX_PIN(PIN_PC18, 6, 2) 589*4882a593Smuzhiyun #define PIN_PC19 83 590*4882a593Smuzhiyun #define PIN_PC19__GPIO PINMUX_PIN(PIN_PC19, 0, 0) 591*4882a593Smuzhiyun #define PIN_PC19__LCDDAT13 PINMUX_PIN(PIN_PC19, 1, 2) 592*4882a593Smuzhiyun #define PIN_PC19__GMDIO PINMUX_PIN(PIN_PC19, 2, 1) 593*4882a593Smuzhiyun #define PIN_PC19__ISC_D10 PINMUX_PIN(PIN_PC19, 3, 1) 594*4882a593Smuzhiyun #define PIN_PC19__FLEXCOM3_IO1 PINMUX_PIN(PIN_PC19, 5, 2) 595*4882a593Smuzhiyun #define PIN_PC19__A8 PINMUX_PIN(PIN_PC19, 6, 2) 596*4882a593Smuzhiyun #define PIN_PC20 84 597*4882a593Smuzhiyun #define PIN_PC20__GPIO PINMUX_PIN(PIN_PC20, 0, 0) 598*4882a593Smuzhiyun #define PIN_PC20__LCDDAT14 PINMUX_PIN(PIN_PC20, 1, 2) 599*4882a593Smuzhiyun #define PIN_PC20__GRXCK PINMUX_PIN(PIN_PC20, 2, 1) 600*4882a593Smuzhiyun #define PIN_PC20__ISC_D11 PINMUX_PIN(PIN_PC20, 3, 1) 601*4882a593Smuzhiyun #define PIN_PC20__FLEXCOM3_IO0 PINMUX_PIN(PIN_PC20, 5, 2) 602*4882a593Smuzhiyun #define PIN_PC20__A9 PINMUX_PIN(PIN_PC20, 6, 2) 603*4882a593Smuzhiyun #define PIN_PC21 85 604*4882a593Smuzhiyun #define PIN_PC21__GPIO PINMUX_PIN(PIN_PC21, 0, 0) 605*4882a593Smuzhiyun #define PIN_PC21__LCDDAT15 PINMUX_PIN(PIN_PC21, 1, 2) 606*4882a593Smuzhiyun #define PIN_PC21__GTXER PINMUX_PIN(PIN_PC21, 2, 1) 607*4882a593Smuzhiyun #define PIN_PC21__ISC_PCK PINMUX_PIN(PIN_PC21, 3, 1) 608*4882a593Smuzhiyun #define PIN_PC21__FLEXCOM3_IO3 PINMUX_PIN(PIN_PC21, 5, 2) 609*4882a593Smuzhiyun #define PIN_PC21__A10 PINMUX_PIN(PIN_PC21, 6, 2) 610*4882a593Smuzhiyun #define PIN_PC22 86 611*4882a593Smuzhiyun #define PIN_PC22__GPIO PINMUX_PIN(PIN_PC22, 0, 0) 612*4882a593Smuzhiyun #define PIN_PC22__LCDDAT18 PINMUX_PIN(PIN_PC22, 1, 2) 613*4882a593Smuzhiyun #define PIN_PC22__GCRS PINMUX_PIN(PIN_PC22, 2, 1) 614*4882a593Smuzhiyun #define PIN_PC22__ISC_VSYNC PINMUX_PIN(PIN_PC22, 3, 1) 615*4882a593Smuzhiyun #define PIN_PC22__FLEXCOM3_IO4 PINMUX_PIN(PIN_PC22, 5, 2) 616*4882a593Smuzhiyun #define PIN_PC22__A11 PINMUX_PIN(PIN_PC22, 6, 2) 617*4882a593Smuzhiyun #define PIN_PC23 87 618*4882a593Smuzhiyun #define PIN_PC23__GPIO PINMUX_PIN(PIN_PC23, 0, 0) 619*4882a593Smuzhiyun #define PIN_PC23__LCDDAT19 PINMUX_PIN(PIN_PC23, 1, 2) 620*4882a593Smuzhiyun #define PIN_PC23__GCOL PINMUX_PIN(PIN_PC23, 2, 1) 621*4882a593Smuzhiyun #define PIN_PC23__ISC_HSYNC PINMUX_PIN(PIN_PC23, 3, 1) 622*4882a593Smuzhiyun #define PIN_PC23__A12 PINMUX_PIN(PIN_PC23, 6, 2) 623*4882a593Smuzhiyun #define PIN_PC24 88 624*4882a593Smuzhiyun #define PIN_PC24__GPIO PINMUX_PIN(PIN_PC24, 0, 0) 625*4882a593Smuzhiyun #define PIN_PC24__LCDDAT20 PINMUX_PIN(PIN_PC24, 1, 2) 626*4882a593Smuzhiyun #define PIN_PC24__GRX2 PINMUX_PIN(PIN_PC24, 2, 1) 627*4882a593Smuzhiyun #define PIN_PC24__ISC_MCK PINMUX_PIN(PIN_PC24, 3, 1) 628*4882a593Smuzhiyun #define PIN_PC24__A13 PINMUX_PIN(PIN_PC24, 6, 2) 629*4882a593Smuzhiyun #define PIN_PC25 89 630*4882a593Smuzhiyun #define PIN_PC25__GPIO PINMUX_PIN(PIN_PC25, 0, 0) 631*4882a593Smuzhiyun #define PIN_PC25__LCDDAT21 PINMUX_PIN(PIN_PC25, 1, 2) 632*4882a593Smuzhiyun #define PIN_PC25__GRX3 PINMUX_PIN(PIN_PC25, 2, 1) 633*4882a593Smuzhiyun #define PIN_PC25__ISC_FIELD PINMUX_PIN(PIN_PC25, 3, 1) 634*4882a593Smuzhiyun #define PIN_PC25__A14 PINMUX_PIN(PIN_PC25, 6, 2) 635*4882a593Smuzhiyun #define PIN_PC26 90 636*4882a593Smuzhiyun #define PIN_PC26__GPIO PINMUX_PIN(PIN_PC26, 0, 0) 637*4882a593Smuzhiyun #define PIN_PC26__LCDDAT22 PINMUX_PIN(PIN_PC26, 1, 2) 638*4882a593Smuzhiyun #define PIN_PC26__GTX2 PINMUX_PIN(PIN_PC26, 2, 1) 639*4882a593Smuzhiyun #define PIN_PC26__CANTX1 PINMUX_PIN(PIN_PC26, 4, 1) 640*4882a593Smuzhiyun #define PIN_PC26__A15 PINMUX_PIN(PIN_PC26, 6, 2) 641*4882a593Smuzhiyun #define PIN_PC27 91 642*4882a593Smuzhiyun #define PIN_PC27__GPIO PINMUX_PIN(PIN_PC27, 0, 0) 643*4882a593Smuzhiyun #define PIN_PC27__LCDDAT23 PINMUX_PIN(PIN_PC27, 1, 2) 644*4882a593Smuzhiyun #define PIN_PC27__GTX3 PINMUX_PIN(PIN_PC27, 2, 1) 645*4882a593Smuzhiyun #define PIN_PC27__PCK1 PINMUX_PIN(PIN_PC27, 3, 2) 646*4882a593Smuzhiyun #define PIN_PC27__CANRX1 PINMUX_PIN(PIN_PC27, 4, 1) 647*4882a593Smuzhiyun #define PIN_PC27__TWD0 PINMUX_PIN(PIN_PC27, 5, 2) 648*4882a593Smuzhiyun #define PIN_PC27__A16 PINMUX_PIN(PIN_PC27, 6, 2) 649*4882a593Smuzhiyun #define PIN_PC28 92 650*4882a593Smuzhiyun #define PIN_PC28__GPIO PINMUX_PIN(PIN_PC28, 0, 0) 651*4882a593Smuzhiyun #define PIN_PC28__LCDPWM PINMUX_PIN(PIN_PC28, 1, 2) 652*4882a593Smuzhiyun #define PIN_PC28__FLEXCOM4_IO0 PINMUX_PIN(PIN_PC28, 2, 1) 653*4882a593Smuzhiyun #define PIN_PC28__PCK2 PINMUX_PIN(PIN_PC28, 3, 2) 654*4882a593Smuzhiyun #define PIN_PC28__TWCK0 PINMUX_PIN(PIN_PC28, 5, 2) 655*4882a593Smuzhiyun #define PIN_PC28__A17 PINMUX_PIN(PIN_PC28, 6, 2) 656*4882a593Smuzhiyun #define PIN_PC29 93 657*4882a593Smuzhiyun #define PIN_PC29__GPIO PINMUX_PIN(PIN_PC29, 0, 0) 658*4882a593Smuzhiyun #define PIN_PC29__LCDDISP PINMUX_PIN(PIN_PC29, 1, 2) 659*4882a593Smuzhiyun #define PIN_PC29__FLEXCOM4_IO1 PINMUX_PIN(PIN_PC29, 2, 1) 660*4882a593Smuzhiyun #define PIN_PC29__A18 PINMUX_PIN(PIN_PC29, 6, 2) 661*4882a593Smuzhiyun #define PIN_PC30 94 662*4882a593Smuzhiyun #define PIN_PC30__GPIO PINMUX_PIN(PIN_PC30, 0, 0) 663*4882a593Smuzhiyun #define PIN_PC30__LCDVSYNC PINMUX_PIN(PIN_PC30, 1, 2) 664*4882a593Smuzhiyun #define PIN_PC30__FLEXCOM4_IO2 PINMUX_PIN(PIN_PC30, 2, 1) 665*4882a593Smuzhiyun #define PIN_PC30__A19 PINMUX_PIN(PIN_PC30, 6, 2) 666*4882a593Smuzhiyun #define PIN_PC31 95 667*4882a593Smuzhiyun #define PIN_PC31__GPIO PINMUX_PIN(PIN_PC31, 0, 0) 668*4882a593Smuzhiyun #define PIN_PC31__LCDHSYNC PINMUX_PIN(PIN_PC31, 1, 2) 669*4882a593Smuzhiyun #define PIN_PC31__FLEXCOM4_IO3 PINMUX_PIN(PIN_PC31, 2, 1) 670*4882a593Smuzhiyun #define PIN_PC31__URXD3 PINMUX_PIN(PIN_PC31, 3, 2) 671*4882a593Smuzhiyun #define PIN_PC31__A20 PINMUX_PIN(PIN_PC31, 6, 2) 672*4882a593Smuzhiyun #define PIN_PD0 96 673*4882a593Smuzhiyun #define PIN_PD0__GPIO PINMUX_PIN(PIN_PD0, 0, 0) 674*4882a593Smuzhiyun #define PIN_PD0__LCDPCK PINMUX_PIN(PIN_PD0, 1, 2) 675*4882a593Smuzhiyun #define PIN_PD0__FLEXCOM4_IO4 PINMUX_PIN(PIN_PD0, 2, 1) 676*4882a593Smuzhiyun #define PIN_PD0__UTXD3 PINMUX_PIN(PIN_PD0, 3, 2) 677*4882a593Smuzhiyun #define PIN_PD0__GTSUCOMP PINMUX_PIN(PIN_PD0, 4, 2) 678*4882a593Smuzhiyun #define PIN_PD0__A23 PINMUX_PIN(PIN_PD0, 6, 2) 679*4882a593Smuzhiyun #define PIN_PD1 97 680*4882a593Smuzhiyun #define PIN_PD1__GPIO PINMUX_PIN(PIN_PD1, 0, 0) 681*4882a593Smuzhiyun #define PIN_PD1__LCDDEN PINMUX_PIN(PIN_PD1, 1, 2) 682*4882a593Smuzhiyun #define PIN_PD1__GRXCK PINMUX_PIN(PIN_PD1, 4, 2) 683*4882a593Smuzhiyun #define PIN_PD1__A24 PINMUX_PIN(PIN_PD1, 6, 2) 684*4882a593Smuzhiyun #define PIN_PD2 98 685*4882a593Smuzhiyun #define PIN_PD2__GPIO PINMUX_PIN(PIN_PD2, 0, 0) 686*4882a593Smuzhiyun #define PIN_PD2__URXD1 PINMUX_PIN(PIN_PD2, 1, 1) 687*4882a593Smuzhiyun #define PIN_PD2__GTXER PINMUX_PIN(PIN_PD2, 4, 2) 688*4882a593Smuzhiyun #define PIN_PD2__ISC_MCK PINMUX_PIN(PIN_PD2, 5, 2) 689*4882a593Smuzhiyun #define PIN_PD2__A25 PINMUX_PIN(PIN_PD2, 6, 2) 690*4882a593Smuzhiyun #define PIN_PD3 99 691*4882a593Smuzhiyun #define PIN_PD3__GPIO PINMUX_PIN(PIN_PD3, 0, 0) 692*4882a593Smuzhiyun #define PIN_PD3__UTXD1 PINMUX_PIN(PIN_PD3, 1, 1) 693*4882a593Smuzhiyun #define PIN_PD3__FIQ PINMUX_PIN(PIN_PD3, 2, 2) 694*4882a593Smuzhiyun #define PIN_PD3__GCRS PINMUX_PIN(PIN_PD3, 4, 2) 695*4882a593Smuzhiyun #define PIN_PD3__ISC_D11 PINMUX_PIN(PIN_PD3, 5, 2) 696*4882a593Smuzhiyun #define PIN_PD3__NWAIT PINMUX_PIN(PIN_PD3, 6, 2) 697*4882a593Smuzhiyun #define PIN_PD4 100 698*4882a593Smuzhiyun #define PIN_PD4__GPIO PINMUX_PIN(PIN_PD4, 0, 0) 699*4882a593Smuzhiyun #define PIN_PD4__TWD1 PINMUX_PIN(PIN_PD4, 1, 2) 700*4882a593Smuzhiyun #define PIN_PD4__URXD2 PINMUX_PIN(PIN_PD4, 2, 1) 701*4882a593Smuzhiyun #define PIN_PD4__GCOL PINMUX_PIN(PIN_PD4, 4, 2) 702*4882a593Smuzhiyun #define PIN_PD4__ISC_D10 PINMUX_PIN(PIN_PD4, 5, 2) 703*4882a593Smuzhiyun #define PIN_PD4__NCS0 PINMUX_PIN(PIN_PD4, 6, 2) 704*4882a593Smuzhiyun #define PIN_PD5 101 705*4882a593Smuzhiyun #define PIN_PD5__GPIO PINMUX_PIN(PIN_PD5, 0, 0) 706*4882a593Smuzhiyun #define PIN_PD5__TWCK1 PINMUX_PIN(PIN_PD5, 1, 2) 707*4882a593Smuzhiyun #define PIN_PD5__UTXD2 PINMUX_PIN(PIN_PD5, 2, 1) 708*4882a593Smuzhiyun #define PIN_PD5__GRX2 PINMUX_PIN(PIN_PD5, 4, 2) 709*4882a593Smuzhiyun #define PIN_PD5__ISC_D9 PINMUX_PIN(PIN_PD5, 5, 2) 710*4882a593Smuzhiyun #define PIN_PD5__NCS1 PINMUX_PIN(PIN_PD5, 6, 2) 711*4882a593Smuzhiyun #define PIN_PD6 102 712*4882a593Smuzhiyun #define PIN_PD6__GPIO PINMUX_PIN(PIN_PD6, 0, 0) 713*4882a593Smuzhiyun #define PIN_PD6__TCK PINMUX_PIN(PIN_PD6, 1, 2) 714*4882a593Smuzhiyun #define PIN_PD6__PCK1 PINMUX_PIN(PIN_PD6, 2, 1) 715*4882a593Smuzhiyun #define PIN_PD6__GRX3 PINMUX_PIN(PIN_PD6, 4, 2) 716*4882a593Smuzhiyun #define PIN_PD6__ISC_D8 PINMUX_PIN(PIN_PD6, 5, 2) 717*4882a593Smuzhiyun #define PIN_PD6__NCS2 PINMUX_PIN(PIN_PD6, 6, 2) 718*4882a593Smuzhiyun #define PIN_PD7 103 719*4882a593Smuzhiyun #define PIN_PD7__GPIO PINMUX_PIN(PIN_PD7, 0, 0) 720*4882a593Smuzhiyun #define PIN_PD7__TDI PINMUX_PIN(PIN_PD7, 1, 2) 721*4882a593Smuzhiyun #define PIN_PD7__UTMI_RXVAL PINMUX_PIN(PIN_PD7, 3, 1) 722*4882a593Smuzhiyun #define PIN_PD7__GTX2 PINMUX_PIN(PIN_PD7, 4, 2) 723*4882a593Smuzhiyun #define PIN_PD7__ISC_D0 PINMUX_PIN(PIN_PD7, 5, 2) 724*4882a593Smuzhiyun #define PIN_PD7__NWR1_NBS1 PINMUX_PIN(PIN_PD7, 6, 2) 725*4882a593Smuzhiyun #define PIN_PD8 104 726*4882a593Smuzhiyun #define PIN_PD8__GPIO PINMUX_PIN(PIN_PD8, 0, 0) 727*4882a593Smuzhiyun #define PIN_PD8__TDO PINMUX_PIN(PIN_PD8, 1, 2) 728*4882a593Smuzhiyun #define PIN_PD8__UTMI_RXERR PINMUX_PIN(PIN_PD8, 3, 1) 729*4882a593Smuzhiyun #define PIN_PD8__GTX3 PINMUX_PIN(PIN_PD8, 4, 2) 730*4882a593Smuzhiyun #define PIN_PD8__ISC_D1 PINMUX_PIN(PIN_PD8, 5, 2) 731*4882a593Smuzhiyun #define PIN_PD8__NANDRDY PINMUX_PIN(PIN_PD8, 6, 2) 732*4882a593Smuzhiyun #define PIN_PD9 105 733*4882a593Smuzhiyun #define PIN_PD9__GPIO PINMUX_PIN(PIN_PD9, 0, 0) 734*4882a593Smuzhiyun #define PIN_PD9__TMS PINMUX_PIN(PIN_PD9, 1, 2) 735*4882a593Smuzhiyun #define PIN_PD9__UTMI_RXACT PINMUX_PIN(PIN_PD9, 3, 1) 736*4882a593Smuzhiyun #define PIN_PD9__GTXCK PINMUX_PIN(PIN_PD9, 4, 2) 737*4882a593Smuzhiyun #define PIN_PD9__ISC_D2 PINMUX_PIN(PIN_PD9, 5, 2) 738*4882a593Smuzhiyun #define PIN_PD10 106 739*4882a593Smuzhiyun #define PIN_PD10__GPIO PINMUX_PIN(PIN_PD10, 0, 0) 740*4882a593Smuzhiyun #define PIN_PD10__NTRST PINMUX_PIN(PIN_PD10, 1, 2) 741*4882a593Smuzhiyun #define PIN_PD10__UTMI_HDIS PINMUX_PIN(PIN_PD10, 3, 1) 742*4882a593Smuzhiyun #define PIN_PD10__GTXEN PINMUX_PIN(PIN_PD10, 4, 2) 743*4882a593Smuzhiyun #define PIN_PD10__ISC_D3 PINMUX_PIN(PIN_PD10, 5, 2) 744*4882a593Smuzhiyun #define PIN_PD11 107 745*4882a593Smuzhiyun #define PIN_PD11__GPIO PINMUX_PIN(PIN_PD11, 0, 0) 746*4882a593Smuzhiyun #define PIN_PD11__TIOA1 PINMUX_PIN(PIN_PD11, 1, 3) 747*4882a593Smuzhiyun #define PIN_PD11__PCK2 PINMUX_PIN(PIN_PD11, 2, 2) 748*4882a593Smuzhiyun #define PIN_PD11__UTMI_LS0 PINMUX_PIN(PIN_PD11, 3, 1) 749*4882a593Smuzhiyun #define PIN_PD11__GRXDV PINMUX_PIN(PIN_PD11, 4, 2) 750*4882a593Smuzhiyun #define PIN_PD11__ISC_D4 PINMUX_PIN(PIN_PD11, 5, 2) 751*4882a593Smuzhiyun #define PIN_PD11__ISC_MCK PINMUX_PIN(PIN_PD11, 7, 4) 752*4882a593Smuzhiyun #define PIN_PD12 108 753*4882a593Smuzhiyun #define PIN_PD12__GPIO PINMUX_PIN(PIN_PD12, 0, 0) 754*4882a593Smuzhiyun #define PIN_PD12__TIOB1 PINMUX_PIN(PIN_PD12, 1, 3) 755*4882a593Smuzhiyun #define PIN_PD12__FLEXCOM4_IO0 PINMUX_PIN(PIN_PD12, 2, 2) 756*4882a593Smuzhiyun #define PIN_PD12__UTMI_LS1 PINMUX_PIN(PIN_PD12, 3, 1) 757*4882a593Smuzhiyun #define PIN_PD12__GRXER PINMUX_PIN(PIN_PD12, 4, 2) 758*4882a593Smuzhiyun #define PIN_PD12__ISC_D5 PINMUX_PIN(PIN_PD12, 5, 2) 759*4882a593Smuzhiyun #define PIN_PD12__ISC_D4 PINMUX_PIN(PIN_PD12, 6, 4) 760*4882a593Smuzhiyun #define PIN_PD13 109 761*4882a593Smuzhiyun #define PIN_PD13__GPIO PINMUX_PIN(PIN_PD13, 0, 0) 762*4882a593Smuzhiyun #define PIN_PD13__TCLK1 PINMUX_PIN(PIN_PD13, 1, 3) 763*4882a593Smuzhiyun #define PIN_PD13__FLEXCOM4_IO1 PINMUX_PIN(PIN_PD13, 2, 2) 764*4882a593Smuzhiyun #define PIN_PD13__UTMI_CDRPCSEL0 PINMUX_PIN(PIN_PD13, 3, 1) 765*4882a593Smuzhiyun #define PIN_PD13__GRX0 PINMUX_PIN(PIN_PD13, 4, 2) 766*4882a593Smuzhiyun #define PIN_PD13__ISC_D6 PINMUX_PIN(PIN_PD13, 5, 2) 767*4882a593Smuzhiyun #define PIN_PD13__ISC_D5 PINMUX_PIN(PIN_PD13, 6, 4) 768*4882a593Smuzhiyun #define PIN_PD14 110 769*4882a593Smuzhiyun #define PIN_PD14__GPIO PINMUX_PIN(PIN_PD14, 0, 0) 770*4882a593Smuzhiyun #define PIN_PD14__TCK PINMUX_PIN(PIN_PD14, 1, 1) 771*4882a593Smuzhiyun #define PIN_PD14__FLEXCOM4_IO2 PINMUX_PIN(PIN_PD14, 2, 2) 772*4882a593Smuzhiyun #define PIN_PD14__UTMI_CDRPCSEL1 PINMUX_PIN(PIN_PD14, 3, 1) 773*4882a593Smuzhiyun #define PIN_PD14__GRX1 PINMUX_PIN(PIN_PD14, 4, 2) 774*4882a593Smuzhiyun #define PIN_PD14__ISC_D7 PINMUX_PIN(PIN_PD14, 5, 2) 775*4882a593Smuzhiyun #define PIN_PD14__ISC_D6 PINMUX_PIN(PIN_PD14, 6, 4) 776*4882a593Smuzhiyun #define PIN_PD15 111 777*4882a593Smuzhiyun #define PIN_PD15__GPIO PINMUX_PIN(PIN_PD15, 0, 0) 778*4882a593Smuzhiyun #define PIN_PD15__TDI PINMUX_PIN(PIN_PD15, 1, 1) 779*4882a593Smuzhiyun #define PIN_PD15__FLEXCOM4_IO3 PINMUX_PIN(PIN_PD15, 2, 2) 780*4882a593Smuzhiyun #define PIN_PD15__UTMI_CDRCPDIVEN PINMUX_PIN(PIN_PD15, 3, 1) 781*4882a593Smuzhiyun #define PIN_PD15__GTX0 PINMUX_PIN(PIN_PD15, 4, 2) 782*4882a593Smuzhiyun #define PIN_PD15__ISC_PCK PINMUX_PIN(PIN_PD15, 5, 2) 783*4882a593Smuzhiyun #define PIN_PD15__ISC_D7 PINMUX_PIN(PIN_PD15, 6, 4) 784*4882a593Smuzhiyun #define PIN_PD16 112 785*4882a593Smuzhiyun #define PIN_PD16__GPIO PINMUX_PIN(PIN_PD16, 0, 0) 786*4882a593Smuzhiyun #define PIN_PD16__TDO PINMUX_PIN(PIN_PD16, 1, 1) 787*4882a593Smuzhiyun #define PIN_PD16__FLEXCOM4_IO4 PINMUX_PIN(PIN_PD16, 2, 2) 788*4882a593Smuzhiyun #define PIN_PD16__UTMI_CDRBISTEN PINMUX_PIN(PIN_PD16, 3, 1) 789*4882a593Smuzhiyun #define PIN_PD16__GTX1 PINMUX_PIN(PIN_PD16, 4, 2) 790*4882a593Smuzhiyun #define PIN_PD16__ISC_VSYNC PINMUX_PIN(PIN_PD16, 5, 2) 791*4882a593Smuzhiyun #define PIN_PD16__ISC_D8 PINMUX_PIN(PIN_PD16, 6, 4) 792*4882a593Smuzhiyun #define PIN_PD17 113 793*4882a593Smuzhiyun #define PIN_PD17__GPIO PINMUX_PIN(PIN_PD17, 0, 0) 794*4882a593Smuzhiyun #define PIN_PD17__TMS PINMUX_PIN(PIN_PD17, 1, 1) 795*4882a593Smuzhiyun #define PIN_PD17__UTMI_CDRCPSELDIV PINMUX_PIN(PIN_PD17, 3, 1) 796*4882a593Smuzhiyun #define PIN_PD17__GMDC PINMUX_PIN(PIN_PD17, 4, 2) 797*4882a593Smuzhiyun #define PIN_PD17__ISC_HSYNC PINMUX_PIN(PIN_PD17, 5, 2) 798*4882a593Smuzhiyun #define PIN_PD17__ISC_D9 PINMUX_PIN(PIN_PD17, 6, 4) 799*4882a593Smuzhiyun #define PIN_PD18 114 800*4882a593Smuzhiyun #define PIN_PD18__GPIO PINMUX_PIN(PIN_PD18, 0, 0) 801*4882a593Smuzhiyun #define PIN_PD18__NTRST PINMUX_PIN(PIN_PD18, 1, 1) 802*4882a593Smuzhiyun #define PIN_PD18__GMDIO PINMUX_PIN(PIN_PD18, 4, 2) 803*4882a593Smuzhiyun #define PIN_PD18__ISC_FIELD PINMUX_PIN(PIN_PD18, 5, 2) 804*4882a593Smuzhiyun #define PIN_PD18__ISC_D10 PINMUX_PIN(PIN_PD18, 6, 4) 805*4882a593Smuzhiyun #define PIN_PD19 115 806*4882a593Smuzhiyun #define PIN_PD19__GPIO PINMUX_PIN(PIN_PD19, 0, 0) 807*4882a593Smuzhiyun #define PIN_PD19__PCK0 PINMUX_PIN(PIN_PD19, 1, 1) 808*4882a593Smuzhiyun #define PIN_PD19__TWD1 PINMUX_PIN(PIN_PD19, 2, 3) 809*4882a593Smuzhiyun #define PIN_PD19__URXD2 PINMUX_PIN(PIN_PD19, 3, 3) 810*4882a593Smuzhiyun #define PIN_PD19__I2SC0_CK PINMUX_PIN(PIN_PD19, 5, 2) 811*4882a593Smuzhiyun #define PIN_PD19__ISC_D11 PINMUX_PIN(PIN_PD19, 6, 4) 812*4882a593Smuzhiyun #define PIN_PD20 116 813*4882a593Smuzhiyun #define PIN_PD20__GPIO PINMUX_PIN(PIN_PD20, 0, 0) 814*4882a593Smuzhiyun #define PIN_PD20__TIOA2 PINMUX_PIN(PIN_PD20, 1, 3) 815*4882a593Smuzhiyun #define PIN_PD20__TWCK1 PINMUX_PIN(PIN_PD20, 2, 3) 816*4882a593Smuzhiyun #define PIN_PD20__UTXD2 PINMUX_PIN(PIN_PD20, 3, 3) 817*4882a593Smuzhiyun #define PIN_PD20__I2SC0_MCK PINMUX_PIN(PIN_PD20, 5, 2) 818*4882a593Smuzhiyun #define PIN_PD20__ISC_PCK PINMUX_PIN(PIN_PD20, 6, 4) 819*4882a593Smuzhiyun #define PIN_PD21 117 820*4882a593Smuzhiyun #define PIN_PD21__GPIO PINMUX_PIN(PIN_PD21, 0, 0) 821*4882a593Smuzhiyun #define PIN_PD21__TIOB2 PINMUX_PIN(PIN_PD21, 1, 3) 822*4882a593Smuzhiyun #define PIN_PD21__TWD0 PINMUX_PIN(PIN_PD21, 2, 4) 823*4882a593Smuzhiyun #define PIN_PD21__FLEXCOM4_IO0 PINMUX_PIN(PIN_PD21, 3, 3) 824*4882a593Smuzhiyun #define PIN_PD21__I2SC0_WS PINMUX_PIN(PIN_PD21, 5, 2) 825*4882a593Smuzhiyun #define PIN_PD21__ISC_VSYNC PINMUX_PIN(PIN_PD21, 6, 4) 826*4882a593Smuzhiyun #define PIN_PD22 118 827*4882a593Smuzhiyun #define PIN_PD22__GPIO PINMUX_PIN(PIN_PD22, 0, 0) 828*4882a593Smuzhiyun #define PIN_PD22__TCLK2 PINMUX_PIN(PIN_PD22, 1, 3) 829*4882a593Smuzhiyun #define PIN_PD22__TWCK0 PINMUX_PIN(PIN_PD22, 2, 4) 830*4882a593Smuzhiyun #define PIN_PD22__FLEXCOM4_IO1 PINMUX_PIN(PIN_PD22, 3, 3) 831*4882a593Smuzhiyun #define PIN_PD22__I2SC0_DI0 PINMUX_PIN(PIN_PD22, 5, 2) 832*4882a593Smuzhiyun #define PIN_PD22__ISC_HSYNC PINMUX_PIN(PIN_PD22, 6, 4) 833*4882a593Smuzhiyun #define PIN_PD23 119 834*4882a593Smuzhiyun #define PIN_PD23__GPIO PINMUX_PIN(PIN_PD23, 0, 0) 835*4882a593Smuzhiyun #define PIN_PD23__URXD2 PINMUX_PIN(PIN_PD23, 1, 2) 836*4882a593Smuzhiyun #define PIN_PD23__FLEXCOM4_IO2 PINMUX_PIN(PIN_PD23, 3, 3) 837*4882a593Smuzhiyun #define PIN_PD23__I2SC0_DO0 PINMUX_PIN(PIN_PD23, 5, 2) 838*4882a593Smuzhiyun #define PIN_PD23__ISC_FIELD PINMUX_PIN(PIN_PD23, 6, 4) 839*4882a593Smuzhiyun #define PIN_PD24 120 840*4882a593Smuzhiyun #define PIN_PD24__GPIO PINMUX_PIN(PIN_PD24, 0, 0) 841*4882a593Smuzhiyun #define PIN_PD24__UTXD2 PINMUX_PIN(PIN_PD24, 1, 2) 842*4882a593Smuzhiyun #define PIN_PD24__FLEXCOM4_IO3 PINMUX_PIN(PIN_PD24, 3, 3) 843*4882a593Smuzhiyun #define PIN_PD25 121 844*4882a593Smuzhiyun #define PIN_PD25__GPIO PINMUX_PIN(PIN_PD25, 0, 0) 845*4882a593Smuzhiyun #define PIN_PD25__SPI1_SPCK PINMUX_PIN(PIN_PD25, 1, 3) 846*4882a593Smuzhiyun #define PIN_PD25__FLEXCOM4_IO4 PINMUX_PIN(PIN_PD25, 3, 3) 847*4882a593Smuzhiyun #define PIN_PD26 122 848*4882a593Smuzhiyun #define PIN_PD26__GPIO PINMUX_PIN(PIN_PD26, 0, 0) 849*4882a593Smuzhiyun #define PIN_PD26__SPI1_MOSI PINMUX_PIN(PIN_PD26, 1, 3) 850*4882a593Smuzhiyun #define PIN_PD26__FLEXCOM2_IO0 PINMUX_PIN(PIN_PD26, 3, 2) 851*4882a593Smuzhiyun #define PIN_PD27 123 852*4882a593Smuzhiyun #define PIN_PD27__GPIO PINMUX_PIN(PIN_PD27, 0, 0) 853*4882a593Smuzhiyun #define PIN_PD27__SPI1_MISO PINMUX_PIN(PIN_PD27, 1, 3) 854*4882a593Smuzhiyun #define PIN_PD27__TCK PINMUX_PIN(PIN_PD27, 2, 3) 855*4882a593Smuzhiyun #define PIN_PD27__FLEXCOM2_IO1 PINMUX_PIN(PIN_PD27, 3, 2) 856*4882a593Smuzhiyun #define PIN_PD28 124 857*4882a593Smuzhiyun #define PIN_PD28__GPIO PINMUX_PIN(PIN_PD28, 0, 0) 858*4882a593Smuzhiyun #define PIN_PD28__SPI1_NPCS0 PINMUX_PIN(PIN_PD28, 1, 3) 859*4882a593Smuzhiyun #define PIN_PD28__TCI PINMUX_PIN(PIN_PD28, 2, 3) 860*4882a593Smuzhiyun #define PIN_PD28__FLEXCOM2_IO2 PINMUX_PIN(PIN_PD28, 3, 2) 861*4882a593Smuzhiyun #define PIN_PD29 125 862*4882a593Smuzhiyun #define PIN_PD29__GPIO PINMUX_PIN(PIN_PD29, 0, 0) 863*4882a593Smuzhiyun #define PIN_PD29__SPI1_NPCS1 PINMUX_PIN(PIN_PD29, 1, 3) 864*4882a593Smuzhiyun #define PIN_PD29__TDO PINMUX_PIN(PIN_PD29, 2, 3) 865*4882a593Smuzhiyun #define PIN_PD29__FLEXCOM2_IO3 PINMUX_PIN(PIN_PD29, 3, 2) 866*4882a593Smuzhiyun #define PIN_PD29__TIOA3 PINMUX_PIN(PIN_PD29, 4, 3) 867*4882a593Smuzhiyun #define PIN_PD29__TWD0 PINMUX_PIN(PIN_PD29, 5, 3) 868*4882a593Smuzhiyun #define PIN_PD30 126 869*4882a593Smuzhiyun #define PIN_PD30__GPIO PINMUX_PIN(PIN_PD30, 0, 0) 870*4882a593Smuzhiyun #define PIN_PD30__SPI1_NPCS2 PINMUX_PIN(PIN_PD30, 1, 3) 871*4882a593Smuzhiyun #define PIN_PD30__TMS PINMUX_PIN(PIN_PD30, 2, 3) 872*4882a593Smuzhiyun #define PIN_PD30__FLEXCOM2_IO4 PINMUX_PIN(PIN_PD30, 3, 2) 873*4882a593Smuzhiyun #define PIN_PD30__TIOB3 PINMUX_PIN(PIN_PD30, 4, 3) 874*4882a593Smuzhiyun #define PIN_PD30__TWCK0 PINMUX_PIN(PIN_PD30, 5, 3) 875*4882a593Smuzhiyun #define PIN_PD31 127 876*4882a593Smuzhiyun #define PIN_PD31__GPIO PINMUX_PIN(PIN_PD31, 0, 0) 877*4882a593Smuzhiyun #define PIN_PD31__ADTRG PINMUX_PIN(PIN_PD31, 1, 1) 878*4882a593Smuzhiyun #define PIN_PD31__NTRST PINMUX_PIN(PIN_PD31, 2, 3) 879*4882a593Smuzhiyun #define PIN_PD31__IRQ PINMUX_PIN(PIN_PD31, 3, 4) 880*4882a593Smuzhiyun #define PIN_PD31__TCLK3 PINMUX_PIN(PIN_PD31, 4, 3) 881*4882a593Smuzhiyun #define PIN_PD31__PCK0 PINMUX_PIN(PIN_PD31, 5, 2) 882