xref: /OK3568_Linux_fs/kernel/scripts/dtc/include-prefixes/arm/rv1109-ai-cam-ddr3-v1.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd.
4*4882a593Smuzhiyun */
5*4882a593Smuzhiyun
6*4882a593Smuzhiyun/dts-v1/;
7*4882a593Smuzhiyun#include "rv1109.dtsi"
8*4882a593Smuzhiyun#include "rv1126-ai-cam.dtsi"
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun/ {
11*4882a593Smuzhiyun	model = "Rockchip RV1109 AI CAMERA DDR3L Board";
12*4882a593Smuzhiyun	compatible = "rockchip,rv1109-ai-cam-ddr3L-v1", "rockchip,rv1109";
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun	chosen {
15*4882a593Smuzhiyun		bootargs = "earlycon=uart8250,mmio32,0xff570000 console=ttyFIQ0 root=PARTUUID=614e0000-0000 rootfstype=ext4 rootwait snd_aloop.index=7";
16*4882a593Smuzhiyun	};
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun	gpio-leds {
19*4882a593Smuzhiyun		compatible = "gpio-leds";
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun		work-led {
22*4882a593Smuzhiyun			gpios = <&gpio2 RK_PD1 GPIO_ACTIVE_LOW>;
23*4882a593Smuzhiyun			linux,default-trigger = "timer";
24*4882a593Smuzhiyun		};
25*4882a593Smuzhiyun	};
26*4882a593Smuzhiyun};
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun&csi_dphy0 {
29*4882a593Smuzhiyun	status = "okay";
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun	ports {
32*4882a593Smuzhiyun		port@0 {
33*4882a593Smuzhiyun			reg = <0>;
34*4882a593Smuzhiyun			#address-cells = <1>;
35*4882a593Smuzhiyun			#size-cells = <0>;
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun			mipi_in_ucam0: endpoint@1 {
38*4882a593Smuzhiyun				reg = <1>;
39*4882a593Smuzhiyun				remote-endpoint = <&ucam_out0>;
40*4882a593Smuzhiyun				data-lanes = <1 2>;
41*4882a593Smuzhiyun			};
42*4882a593Smuzhiyun		};
43*4882a593Smuzhiyun	};
44*4882a593Smuzhiyun};
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun&i2c1 {
47*4882a593Smuzhiyun	status = "okay";
48*4882a593Smuzhiyun	clock-frequency = <400000>;
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun	gc4c33: gc4c33@29 {
51*4882a593Smuzhiyun		compatible = "galaxycore,gc4c33";
52*4882a593Smuzhiyun		reg = <0x29>;
53*4882a593Smuzhiyun		clocks = <&cru CLK_MIPICSI_OUT>;
54*4882a593Smuzhiyun		clock-names = "xvclk";
55*4882a593Smuzhiyun		power-domains = <&power RV1126_PD_VI>;
56*4882a593Smuzhiyun		pinctrl-names = "rockchip,camera_default";
57*4882a593Smuzhiyun		pinctrl-0 = <&mipicsi_clk0>;
58*4882a593Smuzhiyun		pwren-gpios= <&gpio2 RK_PD2 GPIO_ACTIVE_HIGH>;
59*4882a593Smuzhiyun		pwdn-gpios = <&gpio1 RK_PD4 GPIO_ACTIVE_HIGH>;
60*4882a593Smuzhiyun		reset-gpios = <&gpio1 RK_PD5 GPIO_ACTIVE_HIGH>;
61*4882a593Smuzhiyun		rockchip,camera-module-index = <1>;
62*4882a593Smuzhiyun		rockchip,camera-module-facing = "front";
63*4882a593Smuzhiyun		rockchip,camera-module-name = "PCORW0009A";
64*4882a593Smuzhiyun		rockchip,camera-module-lens-name = "4mm-4M";
65*4882a593Smuzhiyun		// NO_HDR:0 HDR_X2:5 HDR_X3:6
66*4882a593Smuzhiyun		rockchip,camera-hdr-mode = <0>;
67*4882a593Smuzhiyun		port {
68*4882a593Smuzhiyun			ucam_out0: endpoint {
69*4882a593Smuzhiyun				remote-endpoint = <&mipi_in_ucam0>;
70*4882a593Smuzhiyun				data-lanes = <1 2>;
71*4882a593Smuzhiyun			};
72*4882a593Smuzhiyun		};
73*4882a593Smuzhiyun	};
74*4882a593Smuzhiyun};
75