1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Copyright (c) 2023 Rockchip Electronics Co., Ltd. 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Version Sensor I2C_ADDR Lanes 6*4882a593Smuzhiyun * v1.0.0 sc530ai 0x30 lane0~1(dphy1) 7*4882a593Smuzhiyun * tp2855 0x44 lane2~3(dphy2) 8*4882a593Smuzhiyun */ 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun&csi2_dphy_hw { 11*4882a593Smuzhiyun status = "okay"; 12*4882a593Smuzhiyun}; 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun&csi2_dphy1 { 15*4882a593Smuzhiyun status = "okay"; 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun ports { 18*4882a593Smuzhiyun #address-cells = <1>; 19*4882a593Smuzhiyun #size-cells = <0>; 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun port@0 { 22*4882a593Smuzhiyun reg = <0>; 23*4882a593Smuzhiyun #address-cells = <1>; 24*4882a593Smuzhiyun #size-cells = <0>; 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun csi_dphy_input1: endpoint@1 { 27*4882a593Smuzhiyun reg = <1>; 28*4882a593Smuzhiyun remote-endpoint = <&os04a10_out>; 29*4882a593Smuzhiyun data-lanes = <1 2>; 30*4882a593Smuzhiyun }; 31*4882a593Smuzhiyun csi_dphy_input2: endpoint@2 { 32*4882a593Smuzhiyun reg = <2>; 33*4882a593Smuzhiyun remote-endpoint = <&sc530ai_out>; 34*4882a593Smuzhiyun data-lanes = <1 2>; 35*4882a593Smuzhiyun }; 36*4882a593Smuzhiyun }; 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun port@1 { 39*4882a593Smuzhiyun reg = <1>; 40*4882a593Smuzhiyun #address-cells = <1>; 41*4882a593Smuzhiyun #size-cells = <0>; 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun csi_dphy_output: endpoint@0 { 44*4882a593Smuzhiyun reg = <0>; 45*4882a593Smuzhiyun remote-endpoint = <&mipi_csi2_input>; 46*4882a593Smuzhiyun }; 47*4882a593Smuzhiyun }; 48*4882a593Smuzhiyun }; 49*4882a593Smuzhiyun}; 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun&csi2_dphy2 { 52*4882a593Smuzhiyun status = "okay"; 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun ports { 55*4882a593Smuzhiyun #address-cells = <1>; 56*4882a593Smuzhiyun #size-cells = <0>; 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun port@0 { 59*4882a593Smuzhiyun reg = <0>; 60*4882a593Smuzhiyun #address-cells = <1>; 61*4882a593Smuzhiyun #size-cells = <0>; 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun csi_dphy_input3: endpoint@3 { 64*4882a593Smuzhiyun reg = <3>; 65*4882a593Smuzhiyun remote-endpoint = <&sc4336_out>; 66*4882a593Smuzhiyun data-lanes = <1 2>; 67*4882a593Smuzhiyun }; 68*4882a593Smuzhiyun csi_dphy_input4: endpoint@4 { 69*4882a593Smuzhiyun reg = <4>; 70*4882a593Smuzhiyun remote-endpoint = <&tp2855_out>; 71*4882a593Smuzhiyun data-lanes = <1 2>; 72*4882a593Smuzhiyun }; 73*4882a593Smuzhiyun }; 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun port@1 { 76*4882a593Smuzhiyun reg = <1>; 77*4882a593Smuzhiyun #address-cells = <1>; 78*4882a593Smuzhiyun #size-cells = <0>; 79*4882a593Smuzhiyun 80*4882a593Smuzhiyun csi_dphy_output1: endpoint@0 { 81*4882a593Smuzhiyun reg = <0>; 82*4882a593Smuzhiyun remote-endpoint = <&mipi1_csi2_input>; 83*4882a593Smuzhiyun }; 84*4882a593Smuzhiyun }; 85*4882a593Smuzhiyun }; 86*4882a593Smuzhiyun}; 87*4882a593Smuzhiyun 88*4882a593Smuzhiyun&i2c4 { 89*4882a593Smuzhiyun status = "okay"; 90*4882a593Smuzhiyun clock-frequency = <400000>; 91*4882a593Smuzhiyun pinctrl-names = "default"; 92*4882a593Smuzhiyun pinctrl-0 = <&i2c4m2_xfer>; 93*4882a593Smuzhiyun 94*4882a593Smuzhiyun os04a10: os04a10@36 { 95*4882a593Smuzhiyun compatible = "ovti,os04a10"; 96*4882a593Smuzhiyun status = "okay"; 97*4882a593Smuzhiyun reg = <0x36>; 98*4882a593Smuzhiyun clocks = <&cru MCLK_REF_MIPI0>; 99*4882a593Smuzhiyun clock-names = "xvclk"; 100*4882a593Smuzhiyun reset-gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_LOW>; 101*4882a593Smuzhiyun pwdn-gpios = <&gpio3 RK_PD2 GPIO_ACTIVE_HIGH>; 102*4882a593Smuzhiyun pinctrl-names = "default"; 103*4882a593Smuzhiyun pinctrl-0 = <&mipi_refclk_out0>; 104*4882a593Smuzhiyun rockchip,camera-module-index = <0>; 105*4882a593Smuzhiyun rockchip,camera-module-facing = "back"; 106*4882a593Smuzhiyun rockchip,camera-module-name = "CMK-OT1607-PV1"; 107*4882a593Smuzhiyun rockchip,camera-module-lens-name = "50IRC-F16"; 108*4882a593Smuzhiyun port { 109*4882a593Smuzhiyun os04a10_out: endpoint { 110*4882a593Smuzhiyun remote-endpoint = <&csi_dphy_input1>; 111*4882a593Smuzhiyun data-lanes = <1 2>; 112*4882a593Smuzhiyun }; 113*4882a593Smuzhiyun }; 114*4882a593Smuzhiyun }; 115*4882a593Smuzhiyun 116*4882a593Smuzhiyun sc4336: sc4336@30 { 117*4882a593Smuzhiyun compatible = "smartsens,sc4336"; 118*4882a593Smuzhiyun status = "okay"; 119*4882a593Smuzhiyun reg = <0x30>; 120*4882a593Smuzhiyun clocks = <&cru MCLK_REF_MIPI1>; 121*4882a593Smuzhiyun clock-names = "xvclk"; 122*4882a593Smuzhiyun reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>; 123*4882a593Smuzhiyun pwdn-gpios = <&gpio3 RK_PA4 GPIO_ACTIVE_HIGH>; 124*4882a593Smuzhiyun pinctrl-names = "default"; 125*4882a593Smuzhiyun pinctrl-0 = <&mipi_refclk_out1>; 126*4882a593Smuzhiyun rockchip,camera-module-index = <1>; 127*4882a593Smuzhiyun rockchip,camera-module-facing = "back"; 128*4882a593Smuzhiyun rockchip,camera-module-name = "OT01"; 129*4882a593Smuzhiyun rockchip,camera-module-lens-name = "40IRC_F16"; 130*4882a593Smuzhiyun port { 131*4882a593Smuzhiyun sc4336_out: endpoint { 132*4882a593Smuzhiyun remote-endpoint = <&csi_dphy_input3>; 133*4882a593Smuzhiyun data-lanes = <1 2>; 134*4882a593Smuzhiyun }; 135*4882a593Smuzhiyun }; 136*4882a593Smuzhiyun }; 137*4882a593Smuzhiyun 138*4882a593Smuzhiyun sc530ai: sc530ai@30 { 139*4882a593Smuzhiyun compatible = "smartsense,sc530ai"; 140*4882a593Smuzhiyun status = "okay"; 141*4882a593Smuzhiyun reg = <0x30>; 142*4882a593Smuzhiyun clocks = <&cru MCLK_REF_MIPI0>; 143*4882a593Smuzhiyun clock-names = "xvclk"; 144*4882a593Smuzhiyun reset-gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>; 145*4882a593Smuzhiyun pwdn-gpios = <&gpio3 RK_PD2 GPIO_ACTIVE_HIGH>; 146*4882a593Smuzhiyun pinctrl-names = "default"; 147*4882a593Smuzhiyun pinctrl-0 = <&mipi_refclk_out0>; 148*4882a593Smuzhiyun rockchip,camera-module-index = <0>; 149*4882a593Smuzhiyun rockchip,camera-module-facing = "back"; 150*4882a593Smuzhiyun rockchip,camera-module-name = "CMK-OT1607-PV1"; 151*4882a593Smuzhiyun rockchip,camera-module-lens-name = "50IRC-F16"; 152*4882a593Smuzhiyun port { 153*4882a593Smuzhiyun sc530ai_out: endpoint { 154*4882a593Smuzhiyun remote-endpoint = <&csi_dphy_input2>; 155*4882a593Smuzhiyun data-lanes = <1 2>; 156*4882a593Smuzhiyun }; 157*4882a593Smuzhiyun }; 158*4882a593Smuzhiyun }; 159*4882a593Smuzhiyun 160*4882a593Smuzhiyun tp2855_00: tp2855_00@44 { 161*4882a593Smuzhiyun compatible = "techpoint,tp2855"; 162*4882a593Smuzhiyun status = "okay"; 163*4882a593Smuzhiyun reg = <0x44>; 164*4882a593Smuzhiyun clocks = <&cru MCLK_REF_MIPI1>; 165*4882a593Smuzhiyun clock-names = "xvclk"; 166*4882a593Smuzhiyun reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_LOW>; 167*4882a593Smuzhiyun pinctrl-names = "default"; 168*4882a593Smuzhiyun pinctrl-0 = <&mipi_refclk_out1>; 169*4882a593Smuzhiyun rockchip,camera-module-index = <1>; 170*4882a593Smuzhiyun rockchip,camera-module-facing = "front"; 171*4882a593Smuzhiyun rockchip,camera-module-name = "tp2855"; 172*4882a593Smuzhiyun rockchip,camera-module-lens-name = "tp2855"; 173*4882a593Smuzhiyun port { 174*4882a593Smuzhiyun tp2855_out: endpoint { 175*4882a593Smuzhiyun remote-endpoint = <&csi_dphy_input4>; 176*4882a593Smuzhiyun data-lanes = <1 2>; 177*4882a593Smuzhiyun }; 178*4882a593Smuzhiyun }; 179*4882a593Smuzhiyun }; 180*4882a593Smuzhiyun}; 181*4882a593Smuzhiyun 182*4882a593Smuzhiyun&mipi0_csi2 { 183*4882a593Smuzhiyun status = "okay"; 184*4882a593Smuzhiyun 185*4882a593Smuzhiyun ports { 186*4882a593Smuzhiyun #address-cells = <1>; 187*4882a593Smuzhiyun #size-cells = <0>; 188*4882a593Smuzhiyun 189*4882a593Smuzhiyun port@0 { 190*4882a593Smuzhiyun reg = <0>; 191*4882a593Smuzhiyun #address-cells = <1>; 192*4882a593Smuzhiyun #size-cells = <0>; 193*4882a593Smuzhiyun 194*4882a593Smuzhiyun mipi_csi2_input: endpoint@1 { 195*4882a593Smuzhiyun reg = <1>; 196*4882a593Smuzhiyun remote-endpoint = <&csi_dphy_output>; 197*4882a593Smuzhiyun }; 198*4882a593Smuzhiyun }; 199*4882a593Smuzhiyun 200*4882a593Smuzhiyun port@1 { 201*4882a593Smuzhiyun reg = <1>; 202*4882a593Smuzhiyun #address-cells = <1>; 203*4882a593Smuzhiyun #size-cells = <0>; 204*4882a593Smuzhiyun 205*4882a593Smuzhiyun mipi_csi2_output: endpoint@0 { 206*4882a593Smuzhiyun reg = <0>; 207*4882a593Smuzhiyun remote-endpoint = <&cif_mipi_in>; 208*4882a593Smuzhiyun }; 209*4882a593Smuzhiyun }; 210*4882a593Smuzhiyun }; 211*4882a593Smuzhiyun}; 212*4882a593Smuzhiyun 213*4882a593Smuzhiyun&mipi1_csi2 { 214*4882a593Smuzhiyun status = "okay"; 215*4882a593Smuzhiyun 216*4882a593Smuzhiyun ports { 217*4882a593Smuzhiyun #address-cells = <1>; 218*4882a593Smuzhiyun #size-cells = <0>; 219*4882a593Smuzhiyun 220*4882a593Smuzhiyun port@0 { 221*4882a593Smuzhiyun reg = <0>; 222*4882a593Smuzhiyun #address-cells = <1>; 223*4882a593Smuzhiyun #size-cells = <0>; 224*4882a593Smuzhiyun 225*4882a593Smuzhiyun mipi1_csi2_input: endpoint@1 { 226*4882a593Smuzhiyun reg = <1>; 227*4882a593Smuzhiyun remote-endpoint = <&csi_dphy_output1>; 228*4882a593Smuzhiyun }; 229*4882a593Smuzhiyun }; 230*4882a593Smuzhiyun 231*4882a593Smuzhiyun port@1 { 232*4882a593Smuzhiyun reg = <1>; 233*4882a593Smuzhiyun #address-cells = <1>; 234*4882a593Smuzhiyun #size-cells = <0>; 235*4882a593Smuzhiyun 236*4882a593Smuzhiyun mipi1_csi2_output: endpoint@0 { 237*4882a593Smuzhiyun reg = <0>; 238*4882a593Smuzhiyun remote-endpoint = <&cif_mipi_in1>; 239*4882a593Smuzhiyun }; 240*4882a593Smuzhiyun }; 241*4882a593Smuzhiyun }; 242*4882a593Smuzhiyun}; 243*4882a593Smuzhiyun 244*4882a593Smuzhiyun&rkcif { 245*4882a593Smuzhiyun status = "okay"; 246*4882a593Smuzhiyun pinctrl-names = "default"; 247*4882a593Smuzhiyun pinctrl-0 = <&mipi_pins>; 248*4882a593Smuzhiyun}; 249*4882a593Smuzhiyun 250*4882a593Smuzhiyun&rkcif_mipi_lvds { 251*4882a593Smuzhiyun status = "okay"; 252*4882a593Smuzhiyun 253*4882a593Smuzhiyun port { 254*4882a593Smuzhiyun /* MIPI CSI-2 endpoint */ 255*4882a593Smuzhiyun cif_mipi_in: endpoint { 256*4882a593Smuzhiyun remote-endpoint = <&mipi_csi2_output>; 257*4882a593Smuzhiyun }; 258*4882a593Smuzhiyun }; 259*4882a593Smuzhiyun}; 260*4882a593Smuzhiyun 261*4882a593Smuzhiyun&rkcif_mipi_lvds_sditf { 262*4882a593Smuzhiyun status = "okay"; 263*4882a593Smuzhiyun 264*4882a593Smuzhiyun port { 265*4882a593Smuzhiyun /* MIPI CSI-2 endpoint */ 266*4882a593Smuzhiyun mipi_lvds_sditf: endpoint { 267*4882a593Smuzhiyun remote-endpoint = <&isp_in>; 268*4882a593Smuzhiyun }; 269*4882a593Smuzhiyun }; 270*4882a593Smuzhiyun}; 271*4882a593Smuzhiyun 272*4882a593Smuzhiyun&rkcif_mipi_lvds1 { 273*4882a593Smuzhiyun status = "okay"; 274*4882a593Smuzhiyun 275*4882a593Smuzhiyun port { 276*4882a593Smuzhiyun /* MIPI CSI-2 endpoint */ 277*4882a593Smuzhiyun cif_mipi_in1: endpoint { 278*4882a593Smuzhiyun remote-endpoint = <&mipi1_csi2_output>; 279*4882a593Smuzhiyun }; 280*4882a593Smuzhiyun }; 281*4882a593Smuzhiyun}; 282*4882a593Smuzhiyun 283*4882a593Smuzhiyun&rkisp { 284*4882a593Smuzhiyun status = "okay"; 285*4882a593Smuzhiyun}; 286*4882a593Smuzhiyun 287*4882a593Smuzhiyun&rkisp_vir0 { 288*4882a593Smuzhiyun status = "okay"; 289*4882a593Smuzhiyun 290*4882a593Smuzhiyun port@0 { 291*4882a593Smuzhiyun isp_in: endpoint { 292*4882a593Smuzhiyun remote-endpoint = <&mipi_lvds_sditf>; 293*4882a593Smuzhiyun }; 294*4882a593Smuzhiyun }; 295*4882a593Smuzhiyun}; 296*4882a593Smuzhiyun 297