1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Copyright (c) 2022 Rockchip Electronics Co., Ltd. 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun/dts-v1/; 7*4882a593Smuzhiyun#include <dt-bindings/input/input.h> 8*4882a593Smuzhiyun#include "rv1103.dtsi" 9*4882a593Smuzhiyun#include "rv1103-evb-v10.dtsi" 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun/ { 12*4882a593Smuzhiyun model = "Rockchip RV1103G SCANER V10 Board"; 13*4882a593Smuzhiyun compatible = "rockchip,rv1103g-scaner-v10", "rockchip,rv1103"; 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun buzzer { 16*4882a593Smuzhiyun compatible = "regulator-gpio"; 17*4882a593Smuzhiyun gpio = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>; 18*4882a593Smuzhiyun pinctrl-names = "default"; 19*4882a593Smuzhiyun pinctrl-0 = <&gpio_buzzer>; 20*4882a593Smuzhiyun }; 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun gpio-keys { 23*4882a593Smuzhiyun compatible = "gpio-keys"; 24*4882a593Smuzhiyun autorepeat; 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun key { 27*4882a593Smuzhiyun gpios = <&gpio1 RK_PC6 GPIO_ACTIVE_LOW>; 28*4882a593Smuzhiyun linux,code = <KEY_1>; 29*4882a593Smuzhiyun label = "GPIO Key"; 30*4882a593Smuzhiyun linux,input-type = <1>; 31*4882a593Smuzhiyun wakeup-source; 32*4882a593Smuzhiyun debounce-interval = <100>; 33*4882a593Smuzhiyun }; 34*4882a593Smuzhiyun }; 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun leds: gpio-leds { 37*4882a593Smuzhiyun compatible = "gpio-leds"; 38*4882a593Smuzhiyun pinctrl-names = "default"; 39*4882a593Smuzhiyun pinctrl-0 = <&gpio_leds>; 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun led_light { 42*4882a593Smuzhiyun gpios = <&gpio1 RK_PD0 GPIO_ACTIVE_HIGH>; 43*4882a593Smuzhiyun label = "led_light"; 44*4882a593Smuzhiyun }; 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun led_red { 47*4882a593Smuzhiyun gpios = <&gpio1 RK_PD1 GPIO_ACTIVE_HIGH>; 48*4882a593Smuzhiyun label = "led_red"; 49*4882a593Smuzhiyun }; 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun work_led { 52*4882a593Smuzhiyun gpios = <&gpio1 RK_PC7 GPIO_ACTIVE_HIGH>; 53*4882a593Smuzhiyun label = "work_led"; 54*4882a593Smuzhiyun }; 55*4882a593Smuzhiyun }; 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun vcc_1v8: vcc-1v8 { 58*4882a593Smuzhiyun compatible = "regulator-fixed"; 59*4882a593Smuzhiyun regulator-name = "vcc_1v8"; 60*4882a593Smuzhiyun regulator-always-on; 61*4882a593Smuzhiyun regulator-boot-on; 62*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 63*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 64*4882a593Smuzhiyun }; 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun vcc_3v3: vcc-3v3 { 67*4882a593Smuzhiyun compatible = "regulator-fixed"; 68*4882a593Smuzhiyun regulator-name = "vcc_3v3"; 69*4882a593Smuzhiyun regulator-always-on; 70*4882a593Smuzhiyun regulator-boot-on; 71*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 72*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 73*4882a593Smuzhiyun }; 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun vcc3v3_sd: vcc3v3-sd { 76*4882a593Smuzhiyun compatible = "regulator-fixed"; 77*4882a593Smuzhiyun regulator-name = "vcc3v3_sd"; 78*4882a593Smuzhiyun regulator-always-on; 79*4882a593Smuzhiyun regulator-boot-on; 80*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 81*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 82*4882a593Smuzhiyun }; 83*4882a593Smuzhiyun}; 84*4882a593Smuzhiyun 85*4882a593Smuzhiyun&acodec { 86*4882a593Smuzhiyun status = "disabled"; 87*4882a593Smuzhiyun}; 88*4882a593Smuzhiyun 89*4882a593Smuzhiyun&csi2_dphy_hw { 90*4882a593Smuzhiyun status = "okay"; 91*4882a593Smuzhiyun}; 92*4882a593Smuzhiyun 93*4882a593Smuzhiyun&csi2_dphy0 { 94*4882a593Smuzhiyun status = "okay"; 95*4882a593Smuzhiyun 96*4882a593Smuzhiyun ports { 97*4882a593Smuzhiyun #address-cells = <1>; 98*4882a593Smuzhiyun #size-cells = <0>; 99*4882a593Smuzhiyun 100*4882a593Smuzhiyun port@0 { 101*4882a593Smuzhiyun reg = <0>; 102*4882a593Smuzhiyun #address-cells = <1>; 103*4882a593Smuzhiyun #size-cells = <0>; 104*4882a593Smuzhiyun 105*4882a593Smuzhiyun csi_dphy_input1: endpoint@0 { 106*4882a593Smuzhiyun reg = <0>; 107*4882a593Smuzhiyun remote-endpoint = <&sc031gs_out>; 108*4882a593Smuzhiyun data-lanes = <1>; 109*4882a593Smuzhiyun }; 110*4882a593Smuzhiyun }; 111*4882a593Smuzhiyun 112*4882a593Smuzhiyun port@1 { 113*4882a593Smuzhiyun reg = <1>; 114*4882a593Smuzhiyun #address-cells = <1>; 115*4882a593Smuzhiyun #size-cells = <0>; 116*4882a593Smuzhiyun 117*4882a593Smuzhiyun csi_dphy_output: endpoint@0 { 118*4882a593Smuzhiyun reg = <0>; 119*4882a593Smuzhiyun remote-endpoint = <&mipi_csi2_input>; 120*4882a593Smuzhiyun }; 121*4882a593Smuzhiyun }; 122*4882a593Smuzhiyun }; 123*4882a593Smuzhiyun}; 124*4882a593Smuzhiyun 125*4882a593Smuzhiyun&i2c4 { 126*4882a593Smuzhiyun status = "okay"; 127*4882a593Smuzhiyun clock-frequency = <400000>; 128*4882a593Smuzhiyun pinctrl-names = "default"; 129*4882a593Smuzhiyun pinctrl-0 = <&i2c4m2_xfer>; 130*4882a593Smuzhiyun 131*4882a593Smuzhiyun sc031gs: sc031gs@30 { 132*4882a593Smuzhiyun compatible = "smartsens,sc031gs"; 133*4882a593Smuzhiyun status = "okay"; 134*4882a593Smuzhiyun reg = <0x30>; 135*4882a593Smuzhiyun clocks = <&cru MCLK_REF_MIPI0>; 136*4882a593Smuzhiyun clock-names = "xvclk"; 137*4882a593Smuzhiyun pwdn-gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>; 138*4882a593Smuzhiyun pinctrl-names = "default"; 139*4882a593Smuzhiyun pinctrl-0 = <&mipi_refclk_out0>; 140*4882a593Smuzhiyun rockchip,camera-module-index = <0>; 141*4882a593Smuzhiyun rockchip,camera-module-facing = "back"; 142*4882a593Smuzhiyun rockchip,camera-module-name = "CMK-HRG537A5-H211"; 143*4882a593Smuzhiyun rockchip,camera-module-lens-name = "12IR-F24"; 144*4882a593Smuzhiyun port { 145*4882a593Smuzhiyun sc031gs_out: endpoint { 146*4882a593Smuzhiyun remote-endpoint = <&csi_dphy_input1>; 147*4882a593Smuzhiyun data-lanes = <1>; 148*4882a593Smuzhiyun }; 149*4882a593Smuzhiyun }; 150*4882a593Smuzhiyun }; 151*4882a593Smuzhiyun}; 152*4882a593Smuzhiyun 153*4882a593Smuzhiyun&mipi0_csi2 { 154*4882a593Smuzhiyun status = "okay"; 155*4882a593Smuzhiyun 156*4882a593Smuzhiyun ports { 157*4882a593Smuzhiyun #address-cells = <1>; 158*4882a593Smuzhiyun #size-cells = <0>; 159*4882a593Smuzhiyun 160*4882a593Smuzhiyun port@0 { 161*4882a593Smuzhiyun reg = <0>; 162*4882a593Smuzhiyun #address-cells = <1>; 163*4882a593Smuzhiyun #size-cells = <0>; 164*4882a593Smuzhiyun 165*4882a593Smuzhiyun mipi_csi2_input: endpoint@1 { 166*4882a593Smuzhiyun reg = <1>; 167*4882a593Smuzhiyun remote-endpoint = <&csi_dphy_output>; 168*4882a593Smuzhiyun }; 169*4882a593Smuzhiyun }; 170*4882a593Smuzhiyun 171*4882a593Smuzhiyun port@1 { 172*4882a593Smuzhiyun reg = <1>; 173*4882a593Smuzhiyun #address-cells = <1>; 174*4882a593Smuzhiyun #size-cells = <0>; 175*4882a593Smuzhiyun 176*4882a593Smuzhiyun mipi_csi2_output: endpoint@0 { 177*4882a593Smuzhiyun reg = <0>; 178*4882a593Smuzhiyun remote-endpoint = <&cif_mipi_in>; 179*4882a593Smuzhiyun }; 180*4882a593Smuzhiyun }; 181*4882a593Smuzhiyun }; 182*4882a593Smuzhiyun}; 183*4882a593Smuzhiyun 184*4882a593Smuzhiyun&pinctrl { 185*4882a593Smuzhiyun buzzer { 186*4882a593Smuzhiyun gpio_buzzer: gpio-buzzer { 187*4882a593Smuzhiyun rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; 188*4882a593Smuzhiyun }; 189*4882a593Smuzhiyun }; 190*4882a593Smuzhiyun 191*4882a593Smuzhiyun gpio-leds { 192*4882a593Smuzhiyun gpio_leds: gpio-leds { 193*4882a593Smuzhiyun rockchip,pins = 194*4882a593Smuzhiyun <1 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>, 195*4882a593Smuzhiyun <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>, 196*4882a593Smuzhiyun <1 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>; 197*4882a593Smuzhiyun }; 198*4882a593Smuzhiyun }; 199*4882a593Smuzhiyun}; 200*4882a593Smuzhiyun 201*4882a593Smuzhiyun&rkcif { 202*4882a593Smuzhiyun status = "okay"; 203*4882a593Smuzhiyun}; 204*4882a593Smuzhiyun 205*4882a593Smuzhiyun&rkcif_mipi_lvds { 206*4882a593Smuzhiyun status = "okay"; 207*4882a593Smuzhiyun 208*4882a593Smuzhiyun pinctrl-names = "default"; 209*4882a593Smuzhiyun pinctrl-0 = <&mipi_pins>; 210*4882a593Smuzhiyun port { 211*4882a593Smuzhiyun /* MIPI CSI-2 endpoint */ 212*4882a593Smuzhiyun cif_mipi_in: endpoint { 213*4882a593Smuzhiyun remote-endpoint = <&mipi_csi2_output>; 214*4882a593Smuzhiyun }; 215*4882a593Smuzhiyun }; 216*4882a593Smuzhiyun}; 217*4882a593Smuzhiyun 218*4882a593Smuzhiyun&rkcif_mipi_lvds_sditf { 219*4882a593Smuzhiyun status = "okay"; 220*4882a593Smuzhiyun 221*4882a593Smuzhiyun port { 222*4882a593Smuzhiyun /* MIPI CSI-2 endpoint */ 223*4882a593Smuzhiyun mipi_lvds_sditf: endpoint { 224*4882a593Smuzhiyun remote-endpoint = <&isp_in>; 225*4882a593Smuzhiyun }; 226*4882a593Smuzhiyun }; 227*4882a593Smuzhiyun}; 228*4882a593Smuzhiyun 229*4882a593Smuzhiyun&rkisp { 230*4882a593Smuzhiyun status = "okay"; 231*4882a593Smuzhiyun}; 232*4882a593Smuzhiyun 233*4882a593Smuzhiyun&rkisp_vir0 { 234*4882a593Smuzhiyun status = "okay"; 235*4882a593Smuzhiyun 236*4882a593Smuzhiyun port@0 { 237*4882a593Smuzhiyun isp_in: endpoint { 238*4882a593Smuzhiyun remote-endpoint = <&mipi_lvds_sditf>; 239*4882a593Smuzhiyun }; 240*4882a593Smuzhiyun }; 241*4882a593Smuzhiyun}; 242*4882a593Smuzhiyun 243