1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun&cpu0_opp_table { 7*4882a593Smuzhiyun rockchip,max-volt = <1400000>; 8*4882a593Smuzhiyun opp-1704000000 { 9*4882a593Smuzhiyun opp-hz = /bits/ 64 <1704000000>; 10*4882a593Smuzhiyun opp-microvolt = <1350000 1350000 1400000>; 11*4882a593Smuzhiyun opp-microvolt-L0 = <1350000 1350000 1400000>; 12*4882a593Smuzhiyun opp-microvolt-L1 = <1350000 1350000 1400000>; 13*4882a593Smuzhiyun opp-microvolt-L2 = <1350000 1350000 1400000>; 14*4882a593Smuzhiyun opp-microvolt-L3 = <1350000 1350000 1400000>; 15*4882a593Smuzhiyun clock-latency-ns = <40000>; 16*4882a593Smuzhiyun }; 17*4882a593Smuzhiyun opp-1800000000 { 18*4882a593Smuzhiyun opp-hz = /bits/ 64 <1800000000>; 19*4882a593Smuzhiyun opp-microvolt = <1400000 1400000 1400000>; 20*4882a593Smuzhiyun opp-microvolt-L0 = <1400000 1400000 1400000>; 21*4882a593Smuzhiyun opp-microvolt-L1 = <1400000 1400000 1400000>; 22*4882a593Smuzhiyun opp-microvolt-L2 = <1400000 1400000 1400000>; 23*4882a593Smuzhiyun opp-microvolt-L3 = <1400000 1400000 1400000>; 24*4882a593Smuzhiyun clock-latency-ns = <40000>; 25*4882a593Smuzhiyun }; 26*4882a593Smuzhiyun}; 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun&gpu_opp_table { 29*4882a593Smuzhiyun opp-600000000 { 30*4882a593Smuzhiyun opp-hz = /bits/ 64 <600000000>; 31*4882a593Smuzhiyun opp-microvolt = <1250000>; 32*4882a593Smuzhiyun }; 33*4882a593Smuzhiyun}; 34