1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Google Veyron Tiger Rev 0+ board device tree source 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright 2016 Google, Inc 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun/dts-v1/; 9*4882a593Smuzhiyun#include "rk3288-veyron-fievel.dts" 10*4882a593Smuzhiyun#include "rk3288-veyron-edp.dtsi" 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun/ { 13*4882a593Smuzhiyun model = "Google Tiger"; 14*4882a593Smuzhiyun compatible = "google,veyron-tiger-rev8", "google,veyron-tiger-rev7", 15*4882a593Smuzhiyun "google,veyron-tiger-rev6", "google,veyron-tiger-rev5", 16*4882a593Smuzhiyun "google,veyron-tiger-rev4", "google,veyron-tiger-rev3", 17*4882a593Smuzhiyun "google,veyron-tiger-rev2", "google,veyron-tiger-rev1", 18*4882a593Smuzhiyun "google,veyron-tiger-rev0", "google,veyron-tiger", 19*4882a593Smuzhiyun "google,veyron", "rockchip,rk3288"; 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun /delete-node/ vcc18-lcd; 22*4882a593Smuzhiyun}; 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun&backlight { 25*4882a593Smuzhiyun /* Tiger panel PWM must be >= 1%, so start non-zero brightness at 3 */ 26*4882a593Smuzhiyun brightness-levels = <0 3 255>; 27*4882a593Smuzhiyun num-interpolated-steps = <252>; 28*4882a593Smuzhiyun}; 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun&backlight_regulator { 31*4882a593Smuzhiyun vin-supply = <&vccsys>; 32*4882a593Smuzhiyun}; 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun&i2c3 { 35*4882a593Smuzhiyun status = "okay"; 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun clock-frequency = <400000>; 38*4882a593Smuzhiyun i2c-scl-falling-time-ns = <50>; 39*4882a593Smuzhiyun i2c-scl-rising-time-ns = <300>; 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun touchscreen@10 { 42*4882a593Smuzhiyun compatible = "elan,ekth3500"; 43*4882a593Smuzhiyun reg = <0x10>; 44*4882a593Smuzhiyun interrupt-parent = <&gpio2>; 45*4882a593Smuzhiyun interrupts = <RK_PB6 IRQ_TYPE_EDGE_FALLING>; 46*4882a593Smuzhiyun pinctrl-names = "default"; 47*4882a593Smuzhiyun pinctrl-0 = <&touch_int &touch_rst>; 48*4882a593Smuzhiyun reset-gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_LOW>; 49*4882a593Smuzhiyun vcc33-supply = <&vcc33_io>; 50*4882a593Smuzhiyun vccio-supply = <&vcc33_io>; 51*4882a593Smuzhiyun wakeup-source; 52*4882a593Smuzhiyun }; 53*4882a593Smuzhiyun}; 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun&panel { 56*4882a593Smuzhiyun compatible = "auo,b101ean01"; 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun /delete-node/ panel-timing; 59*4882a593Smuzhiyun 60*4882a593Smuzhiyun panel-timing { 61*4882a593Smuzhiyun clock-frequency = <66666667>; 62*4882a593Smuzhiyun hactive = <1280>; 63*4882a593Smuzhiyun hfront-porch = <18>; 64*4882a593Smuzhiyun hback-porch = <21>; 65*4882a593Smuzhiyun hsync-len = <32>; 66*4882a593Smuzhiyun vactive = <800>; 67*4882a593Smuzhiyun vfront-porch = <4>; 68*4882a593Smuzhiyun vback-porch = <8>; 69*4882a593Smuzhiyun vsync-len = <18>; 70*4882a593Smuzhiyun }; 71*4882a593Smuzhiyun}; 72*4882a593Smuzhiyun 73*4882a593Smuzhiyun&pinctrl { 74*4882a593Smuzhiyun lcd { 75*4882a593Smuzhiyun /delete-node/ avdd-1v8-disp-en; 76*4882a593Smuzhiyun }; 77*4882a593Smuzhiyun 78*4882a593Smuzhiyun touchscreen { 79*4882a593Smuzhiyun touch_int: touch-int { 80*4882a593Smuzhiyun rockchip,pins = <2 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>; 81*4882a593Smuzhiyun }; 82*4882a593Smuzhiyun 83*4882a593Smuzhiyun touch_rst: touch-rst { 84*4882a593Smuzhiyun rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; 85*4882a593Smuzhiyun }; 86*4882a593Smuzhiyun }; 87*4882a593Smuzhiyun}; 88