1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Google Veyron (and derivatives) fragment for the max98090 audio 4*4882a593Smuzhiyun * codec and analog headphone jack. 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * Copyright 2016 Google, Inc 7*4882a593Smuzhiyun */ 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun/ { 10*4882a593Smuzhiyun sound { 11*4882a593Smuzhiyun compatible = "rockchip,rockchip-audio-max98090"; 12*4882a593Smuzhiyun pinctrl-names = "default"; 13*4882a593Smuzhiyun pinctrl-0 = <&mic_det>, <&hp_det>; 14*4882a593Smuzhiyun rockchip,model = "VEYRON-I2S"; 15*4882a593Smuzhiyun rockchip,i2s-controller = <&i2s>; 16*4882a593Smuzhiyun rockchip,audio-codec = <&max98090>; 17*4882a593Smuzhiyun rockchip,hp-det-gpios = <&gpio6 RK_PA5 GPIO_ACTIVE_HIGH>; 18*4882a593Smuzhiyun rockchip,mic-det-gpios = <&gpio6 RK_PB3 GPIO_ACTIVE_LOW>; 19*4882a593Smuzhiyun rockchip,headset-codec = <&headsetcodec>; 20*4882a593Smuzhiyun rockchip,hdmi-codec = <&hdmi>; 21*4882a593Smuzhiyun }; 22*4882a593Smuzhiyun}; 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun&i2c2 { 25*4882a593Smuzhiyun max98090: max98090@10 { 26*4882a593Smuzhiyun compatible = "maxim,max98090"; 27*4882a593Smuzhiyun reg = <0x10>; 28*4882a593Smuzhiyun interrupt-parent = <&gpio6>; 29*4882a593Smuzhiyun interrupts = <RK_PA7 IRQ_TYPE_EDGE_FALLING>; 30*4882a593Smuzhiyun clock-names = "mclk"; 31*4882a593Smuzhiyun clocks = <&cru SCLK_I2S0_OUT>; 32*4882a593Smuzhiyun pinctrl-names = "default"; 33*4882a593Smuzhiyun pinctrl-0 = <&int_codec>; 34*4882a593Smuzhiyun }; 35*4882a593Smuzhiyun}; 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun&i2c4 { 38*4882a593Smuzhiyun headsetcodec: ts3a227e@3b { 39*4882a593Smuzhiyun compatible = "ti,ts3a227e"; 40*4882a593Smuzhiyun reg = <0x3b>; 41*4882a593Smuzhiyun interrupt-parent = <&gpio0>; 42*4882a593Smuzhiyun interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>; 43*4882a593Smuzhiyun pinctrl-names = "default"; 44*4882a593Smuzhiyun pinctrl-0 = <&ts3a227e_int_l>; 45*4882a593Smuzhiyun ti,micbias = <7>; /* MICBIAS = 2.8V */ 46*4882a593Smuzhiyun }; 47*4882a593Smuzhiyun}; 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun&i2s { 50*4882a593Smuzhiyun status = "okay"; 51*4882a593Smuzhiyun}; 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun&io_domains { 54*4882a593Smuzhiyun audio-supply = <&vcc18_codec>; 55*4882a593Smuzhiyun}; 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun&rk808 { 58*4882a593Smuzhiyun vcc10-supply = <&vcc33_sys>; 59*4882a593Smuzhiyun 60*4882a593Smuzhiyun regulators { 61*4882a593Smuzhiyun vcc18_codec: LDO_REG6 { 62*4882a593Smuzhiyun regulator-name = "vcc18_codec"; 63*4882a593Smuzhiyun regulator-always-on; 64*4882a593Smuzhiyun regulator-boot-on; 65*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 66*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 67*4882a593Smuzhiyun regulator-state-mem { 68*4882a593Smuzhiyun regulator-off-in-suspend; 69*4882a593Smuzhiyun }; 70*4882a593Smuzhiyun }; 71*4882a593Smuzhiyun }; 72*4882a593Smuzhiyun}; 73*4882a593Smuzhiyun 74*4882a593Smuzhiyun&pinctrl { 75*4882a593Smuzhiyun codec { 76*4882a593Smuzhiyun hp_det: hp-det { 77*4882a593Smuzhiyun rockchip,pins = <6 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>; 78*4882a593Smuzhiyun }; 79*4882a593Smuzhiyun 80*4882a593Smuzhiyun /* 81*4882a593Smuzhiyun * HACK: We're going to _pull down_ this _active low_ interrupt 82*4882a593Smuzhiyun * so that it never fires. We don't need this interrupt because 83*4882a593Smuzhiyun * we've got a ts3a227e chip but the driver requires it. 84*4882a593Smuzhiyun */ 85*4882a593Smuzhiyun int_codec: int-codec { 86*4882a593Smuzhiyun rockchip,pins = <6 RK_PA7 RK_FUNC_GPIO &pcfg_pull_down>; 87*4882a593Smuzhiyun }; 88*4882a593Smuzhiyun 89*4882a593Smuzhiyun mic_det: mic-det { 90*4882a593Smuzhiyun rockchip,pins = <6 RK_PB3 RK_FUNC_GPIO &pcfg_pull_up>; 91*4882a593Smuzhiyun }; 92*4882a593Smuzhiyun }; 93*4882a593Smuzhiyun 94*4882a593Smuzhiyun headset { 95*4882a593Smuzhiyun ts3a227e_int_l: ts3a227e-int-l { 96*4882a593Smuzhiyun rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; 97*4882a593Smuzhiyun }; 98*4882a593Smuzhiyun }; 99*4882a593Smuzhiyun}; 100