xref: /OK3568_Linux_fs/kernel/scripts/dtc/include-prefixes/arm/rk3288-rock2-som.dtsi (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*4882a593Smuzhiyun
3*4882a593Smuzhiyun#include <dt-bindings/pwm/pwm.h>
4*4882a593Smuzhiyun#include "rk3288.dtsi"
5*4882a593Smuzhiyun
6*4882a593Smuzhiyun/ {
7*4882a593Smuzhiyun	memory@0 {
8*4882a593Smuzhiyun		reg = <0x0 0x0 0x0 0x80000000>;
9*4882a593Smuzhiyun		device_type = "memory";
10*4882a593Smuzhiyun	};
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun	emmc_pwrseq: emmc-pwrseq {
13*4882a593Smuzhiyun		compatible = "mmc-pwrseq-emmc";
14*4882a593Smuzhiyun		pinctrl-0 = <&emmc_reset>;
15*4882a593Smuzhiyun		pinctrl-names = "default";
16*4882a593Smuzhiyun		reset-gpios = <&gpio3 RK_PB1 GPIO_ACTIVE_LOW>;
17*4882a593Smuzhiyun	};
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun	ext_gmac: external-gmac-clock {
20*4882a593Smuzhiyun		compatible = "fixed-clock";
21*4882a593Smuzhiyun		#clock-cells = <0>;
22*4882a593Smuzhiyun		clock-frequency = <125000000>;
23*4882a593Smuzhiyun		clock-output-names = "ext_gmac";
24*4882a593Smuzhiyun	};
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun	vcc_flash: flash-regulator {
27*4882a593Smuzhiyun		compatible = "regulator-fixed";
28*4882a593Smuzhiyun		regulator-name = "vcc_flash";
29*4882a593Smuzhiyun		regulator-min-microvolt = <1800000>;
30*4882a593Smuzhiyun		regulator-max-microvolt = <1800000>;
31*4882a593Smuzhiyun		startup-delay-us = <150>;
32*4882a593Smuzhiyun		vin-supply = <&vcc_io>;
33*4882a593Smuzhiyun	};
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun	vcc_sys: vsys-regulator {
36*4882a593Smuzhiyun		compatible = "regulator-fixed";
37*4882a593Smuzhiyun		regulator-name = "vcc_sys";
38*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
39*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
40*4882a593Smuzhiyun		regulator-always-on;
41*4882a593Smuzhiyun		regulator-boot-on;
42*4882a593Smuzhiyun	};
43*4882a593Smuzhiyun};
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun&cpu0 {
46*4882a593Smuzhiyun	cpu0-supply = <&vdd_cpu>;
47*4882a593Smuzhiyun};
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun&emmc {
50*4882a593Smuzhiyun	bus-width = <8>;
51*4882a593Smuzhiyun	cap-mmc-highspeed;
52*4882a593Smuzhiyun	disable-wp;
53*4882a593Smuzhiyun	non-removable;
54*4882a593Smuzhiyun	mmc-pwrseq = <&emmc_pwrseq>;
55*4882a593Smuzhiyun	pinctrl-names = "default";
56*4882a593Smuzhiyun	pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
57*4882a593Smuzhiyun	vmmc-supply = <&vcc_io>;
58*4882a593Smuzhiyun	vqmmc-supply = <&vcc_flash>;
59*4882a593Smuzhiyun	status = "okay";
60*4882a593Smuzhiyun};
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun&gmac {
63*4882a593Smuzhiyun	assigned-clocks = <&cru SCLK_MAC>;
64*4882a593Smuzhiyun	assigned-clock-parents = <&ext_gmac>;
65*4882a593Smuzhiyun	clock_in_out = "input";
66*4882a593Smuzhiyun	phy-mode = "rgmii";
67*4882a593Smuzhiyun	phy-supply = <&vccio_pmu>;
68*4882a593Smuzhiyun	pinctrl-names = "default";
69*4882a593Smuzhiyun	pinctrl-0 = <&rgmii_pins &phy_rst>;
70*4882a593Smuzhiyun	snps,reset-gpio = <&gpio4 RK_PB0 GPIO_ACTIVE_LOW>;
71*4882a593Smuzhiyun	snps,reset-active-low;
72*4882a593Smuzhiyun	snps,reset-delays-us = <0 10000 30000>;
73*4882a593Smuzhiyun	rx_delay = <0x10>;
74*4882a593Smuzhiyun	tx_delay = <0x30>;
75*4882a593Smuzhiyun};
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun&gpu {
78*4882a593Smuzhiyun	mali-supply = <&vdd_gpu>;
79*4882a593Smuzhiyun	status = "okay";
80*4882a593Smuzhiyun};
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun&i2c0 {
83*4882a593Smuzhiyun	status = "okay";
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun	act8846: act8846@5a {
86*4882a593Smuzhiyun		compatible = "active-semi,act8846";
87*4882a593Smuzhiyun		reg = <0x5a>;
88*4882a593Smuzhiyun		system-power-controller;
89*4882a593Smuzhiyun		inl1-supply = <&vcc_io>;
90*4882a593Smuzhiyun		inl2-supply = <&vcc_sys>;
91*4882a593Smuzhiyun		inl3-supply = <&vcc_20>;
92*4882a593Smuzhiyun		vp1-supply = <&vcc_sys>;
93*4882a593Smuzhiyun		vp2-supply = <&vcc_sys>;
94*4882a593Smuzhiyun		vp3-supply = <&vcc_sys>;
95*4882a593Smuzhiyun		vp4-supply = <&vcc_sys>;
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun		regulators {
98*4882a593Smuzhiyun			vcc_ddr: REG1 {
99*4882a593Smuzhiyun				regulator-name = "VCC_DDR";
100*4882a593Smuzhiyun				regulator-min-microvolt = <1200000>;
101*4882a593Smuzhiyun				regulator-max-microvolt = <1200000>;
102*4882a593Smuzhiyun				regulator-always-on;
103*4882a593Smuzhiyun			};
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun			vcc_io: vccio_codec: REG2 {
106*4882a593Smuzhiyun				regulator-name = "VCC_IO";
107*4882a593Smuzhiyun				regulator-min-microvolt = <3300000>;
108*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
109*4882a593Smuzhiyun				regulator-always-on;
110*4882a593Smuzhiyun			};
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun			vdd_log: REG3 {
113*4882a593Smuzhiyun				regulator-name = "VDD_LOG";
114*4882a593Smuzhiyun				regulator-min-microvolt = <1000000>;
115*4882a593Smuzhiyun				regulator-max-microvolt = <1000000>;
116*4882a593Smuzhiyun				regulator-always-on;
117*4882a593Smuzhiyun			};
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun			vcc_20: REG4 {
120*4882a593Smuzhiyun				regulator-name = "VCC_20";
121*4882a593Smuzhiyun				regulator-min-microvolt = <2000000>;
122*4882a593Smuzhiyun				regulator-max-microvolt = <2000000>;
123*4882a593Smuzhiyun				regulator-always-on;
124*4882a593Smuzhiyun			};
125*4882a593Smuzhiyun
126*4882a593Smuzhiyun			vccio_sd: REG5 {
127*4882a593Smuzhiyun				regulator-name = "VCCIO_SD";
128*4882a593Smuzhiyun				regulator-min-microvolt = <3300000>;
129*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
130*4882a593Smuzhiyun				regulator-always-on;
131*4882a593Smuzhiyun			};
132*4882a593Smuzhiyun
133*4882a593Smuzhiyun			vdd10_lcd: REG6 {
134*4882a593Smuzhiyun				regulator-name = "VDD10_LCD";
135*4882a593Smuzhiyun				regulator-min-microvolt = <1000000>;
136*4882a593Smuzhiyun				regulator-max-microvolt = <1000000>;
137*4882a593Smuzhiyun				regulator-always-on;
138*4882a593Smuzhiyun			};
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun			vcca_codec: REG7 {
141*4882a593Smuzhiyun				regulator-name = "VCCA_CODEC";
142*4882a593Smuzhiyun				regulator-min-microvolt = <3300000>;
143*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
144*4882a593Smuzhiyun				regulator-always-on;
145*4882a593Smuzhiyun			};
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun			vcca_tp: REG8 {
148*4882a593Smuzhiyun				regulator-name = "VCCA_TP";
149*4882a593Smuzhiyun				regulator-min-microvolt = <3300000>;
150*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
151*4882a593Smuzhiyun				regulator-always-on;
152*4882a593Smuzhiyun			};
153*4882a593Smuzhiyun
154*4882a593Smuzhiyun			vccio_pmu: REG9 {
155*4882a593Smuzhiyun				regulator-name = "VCCIO_PMU";
156*4882a593Smuzhiyun				regulator-min-microvolt = <3300000>;
157*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
158*4882a593Smuzhiyun				regulator-always-on;
159*4882a593Smuzhiyun			};
160*4882a593Smuzhiyun
161*4882a593Smuzhiyun			vdd_10: REG10 {
162*4882a593Smuzhiyun				regulator-name = "VDD_10";
163*4882a593Smuzhiyun				regulator-min-microvolt = <1000000>;
164*4882a593Smuzhiyun				regulator-max-microvolt = <1000000>;
165*4882a593Smuzhiyun				regulator-always-on;
166*4882a593Smuzhiyun			};
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun			vcc_18: REG11 {
169*4882a593Smuzhiyun				regulator-name = "VCC_18";
170*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
171*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
172*4882a593Smuzhiyun				regulator-always-on;
173*4882a593Smuzhiyun			};
174*4882a593Smuzhiyun
175*4882a593Smuzhiyun			vcc18_lcd: REG12 {
176*4882a593Smuzhiyun				regulator-name = "VCC18_LCD";
177*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
178*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
179*4882a593Smuzhiyun				regulator-always-on;
180*4882a593Smuzhiyun			};
181*4882a593Smuzhiyun		};
182*4882a593Smuzhiyun	};
183*4882a593Smuzhiyun
184*4882a593Smuzhiyun	vdd_cpu: syr827@40 {
185*4882a593Smuzhiyun		compatible = "silergy,syr827";
186*4882a593Smuzhiyun		reg = <0x40>;
187*4882a593Smuzhiyun		fcs,suspend-voltage-selector = <1>;
188*4882a593Smuzhiyun		regulator-always-on;
189*4882a593Smuzhiyun		regulator-boot-on;
190*4882a593Smuzhiyun		regulator-enable-ramp-delay = <300>;
191*4882a593Smuzhiyun		regulator-name = "vdd_cpu";
192*4882a593Smuzhiyun		regulator-min-microvolt = <850000>;
193*4882a593Smuzhiyun		regulator-max-microvolt = <1350000>;
194*4882a593Smuzhiyun		regulator-ramp-delay = <8000>;
195*4882a593Smuzhiyun		vin-supply = <&vcc_sys>;
196*4882a593Smuzhiyun	};
197*4882a593Smuzhiyun
198*4882a593Smuzhiyun	vdd_gpu: syr828@41 {
199*4882a593Smuzhiyun		compatible = "silergy,syr828";
200*4882a593Smuzhiyun		reg = <0x41>;
201*4882a593Smuzhiyun		fcs,suspend-voltage-selector = <1>;
202*4882a593Smuzhiyun		regulator-always-on;
203*4882a593Smuzhiyun		regulator-enable-ramp-delay = <300>;
204*4882a593Smuzhiyun		regulator-min-microvolt = <850000>;
205*4882a593Smuzhiyun		regulator-max-microvolt = <1350000>;
206*4882a593Smuzhiyun		regulator-name = "vdd_gpu";
207*4882a593Smuzhiyun		regulator-ramp-delay = <8000>;
208*4882a593Smuzhiyun		vin-supply = <&vcc_sys>;
209*4882a593Smuzhiyun	};
210*4882a593Smuzhiyun};
211*4882a593Smuzhiyun
212*4882a593Smuzhiyun&io_domains {
213*4882a593Smuzhiyun	status = "okay";
214*4882a593Smuzhiyun
215*4882a593Smuzhiyun	audio-supply = <&vcc_io>;
216*4882a593Smuzhiyun	bb-supply = <&vcc_io>;
217*4882a593Smuzhiyun	dvp-supply = <&vcc_18>;
218*4882a593Smuzhiyun	flash0-supply = <&vcc_flash>;
219*4882a593Smuzhiyun	flash1-supply = <&vccio_pmu>;
220*4882a593Smuzhiyun	gpio30-supply = <&vccio_pmu>;
221*4882a593Smuzhiyun	gpio1830-supply = <&vcc_io>;
222*4882a593Smuzhiyun	lcdc-supply = <&vcc_io>;
223*4882a593Smuzhiyun	sdcard-supply = <&vccio_sd>;
224*4882a593Smuzhiyun	wifi-supply = <&vcc_18>;
225*4882a593Smuzhiyun};
226*4882a593Smuzhiyun
227*4882a593Smuzhiyun&pinctrl {
228*4882a593Smuzhiyun	pcfg_output_high: pcfg-output-high {
229*4882a593Smuzhiyun		output-high;
230*4882a593Smuzhiyun	};
231*4882a593Smuzhiyun
232*4882a593Smuzhiyun	emmc {
233*4882a593Smuzhiyun		emmc_reset: emmc-reset {
234*4882a593Smuzhiyun			rockchip,pins = <3 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
235*4882a593Smuzhiyun		};
236*4882a593Smuzhiyun	};
237*4882a593Smuzhiyun
238*4882a593Smuzhiyun	gmac {
239*4882a593Smuzhiyun		phy_rst: phy-rst {
240*4882a593Smuzhiyun			rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_output_high>;
241*4882a593Smuzhiyun		};
242*4882a593Smuzhiyun	};
243*4882a593Smuzhiyun};
244*4882a593Smuzhiyun
245*4882a593Smuzhiyun&saradc {
246*4882a593Smuzhiyun	vref-supply = <&vcc_18>;
247*4882a593Smuzhiyun};
248*4882a593Smuzhiyun
249*4882a593Smuzhiyun&tsadc {
250*4882a593Smuzhiyun	rockchip,hw-tshut-mode = <0>; /* tshut mode 0:CRU 1:GPIO */
251*4882a593Smuzhiyun	rockchip,hw-tshut-polarity = <0>; /* tshut polarity 0:LOW 1:HIGH */
252*4882a593Smuzhiyun	status = "okay";
253*4882a593Smuzhiyun};
254*4882a593Smuzhiyun
255*4882a593Smuzhiyun&vopb {
256*4882a593Smuzhiyun	status = "okay";
257*4882a593Smuzhiyun};
258*4882a593Smuzhiyun
259*4882a593Smuzhiyun&vopb_mmu {
260*4882a593Smuzhiyun	status = "okay";
261*4882a593Smuzhiyun};
262*4882a593Smuzhiyun
263*4882a593Smuzhiyun&vopl {
264*4882a593Smuzhiyun	status = "okay";
265*4882a593Smuzhiyun};
266*4882a593Smuzhiyun
267*4882a593Smuzhiyun&vopl_mmu {
268*4882a593Smuzhiyun	status = "okay";
269*4882a593Smuzhiyun};
270*4882a593Smuzhiyun
271*4882a593Smuzhiyun&wdt {
272*4882a593Smuzhiyun	status = "okay";
273*4882a593Smuzhiyun};
274