1*4882a593Smuzhiyun/* 2*4882a593Smuzhiyun * Copyright (c) 2016, 2017 Jerry Xu <Jerry.xu@rock-chips.com> 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * This file is dual-licensed: you can use it either under the terms 5*4882a593Smuzhiyun * of the GPL or the X11 license, at your option. Note that this dual 6*4882a593Smuzhiyun * licensing only applies to this file, and not this project as a 7*4882a593Smuzhiyun * whole. 8*4882a593Smuzhiyun * 9*4882a593Smuzhiyun * a) This file is free software; you can redistribute it and/or 10*4882a593Smuzhiyun * modify it under the terms of the GNU General Public License as 11*4882a593Smuzhiyun * published by the Free Software Foundation; either version 2 of the 12*4882a593Smuzhiyun * License, or (at your option) any later version. 13*4882a593Smuzhiyun * 14*4882a593Smuzhiyun * This file is distributed in the hope that it will be useful, 15*4882a593Smuzhiyun * but WITHOUT ANY WARRANTY; without even the implied warranty of 16*4882a593Smuzhiyun * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17*4882a593Smuzhiyun * GNU General Public License for more details. 18*4882a593Smuzhiyun * 19*4882a593Smuzhiyun * Or, alternatively, 20*4882a593Smuzhiyun * 21*4882a593Smuzhiyun * b) Permission is hereby granted, free of charge, to any person 22*4882a593Smuzhiyun * obtaining a copy of this software and associated documentation 23*4882a593Smuzhiyun * files (the "Software"), to deal in the Software without 24*4882a593Smuzhiyun * restriction, including without limitation the rights to use, 25*4882a593Smuzhiyun * copy, modify, merge, publish, distribute, sublicense, and/or 26*4882a593Smuzhiyun * sell copies of the Software, and to permit persons to whom the 27*4882a593Smuzhiyun * Software is furnished to do so, subject to the following 28*4882a593Smuzhiyun * conditions: 29*4882a593Smuzhiyun * 30*4882a593Smuzhiyun * The above copyright notice and this permission notice shall be 31*4882a593Smuzhiyun * included in all copies or substantial portions of the Software. 32*4882a593Smuzhiyun * 33*4882a593Smuzhiyun * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 34*4882a593Smuzhiyun * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 35*4882a593Smuzhiyun * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 36*4882a593Smuzhiyun * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 37*4882a593Smuzhiyun * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 38*4882a593Smuzhiyun * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 39*4882a593Smuzhiyun * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 40*4882a593Smuzhiyun * OTHER DEALINGS IN THE SOFTWARE. 41*4882a593Smuzhiyun */ 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun/dts-v1/; 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun#include "rk3288-evb.dtsi" 46*4882a593Smuzhiyun#include "rk3288-android.dtsi" 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun/ { 49*4882a593Smuzhiyun model = "PopMetal-RK3288"; 50*4882a593Smuzhiyun compatible = "chipspark,popmetal-rk3288", "rockchip,rk3288"; 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun sdio_pwrseq: sdio-pwrseq { 53*4882a593Smuzhiyun compatible = "mmc-pwrseq-simple"; 54*4882a593Smuzhiyun clocks = <&rk808 1>; 55*4882a593Smuzhiyun clock-names = "ext_clock"; 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun /* 58*4882a593Smuzhiyun * On the module itself this is one of these (depending 59*4882a593Smuzhiyun * on the actual card populated): 60*4882a593Smuzhiyun * - SDIO_RESET_L_WL_REG_ON 61*4882a593Smuzhiyun * - PDN (power down when low) 62*4882a593Smuzhiyun */ 63*4882a593Smuzhiyun reset-gpios = <&gpio4 28 GPIO_ACTIVE_LOW>; 64*4882a593Smuzhiyun }; 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun wireless-bluetooth { 67*4882a593Smuzhiyun clocks = <&rk808 1>; 68*4882a593Smuzhiyun clock-names = "ext_clock"; 69*4882a593Smuzhiyun }; 70*4882a593Smuzhiyun 71*4882a593Smuzhiyun memory@0 { 72*4882a593Smuzhiyun device_type = "memory"; 73*4882a593Smuzhiyun reg = <0x0 0x0 0x0 0x80000000>; 74*4882a593Smuzhiyun }; 75*4882a593Smuzhiyun 76*4882a593Smuzhiyun vga_bridge: vga-bridge { 77*4882a593Smuzhiyun compatible = "adi,adv7125"; 78*4882a593Smuzhiyun psave-gpios = <&gpio7 21 GPIO_ACTIVE_HIGH>; 79*4882a593Smuzhiyun vdd-supply = <&vcc_lcd>; 80*4882a593Smuzhiyun #address-cells = <1>; 81*4882a593Smuzhiyun #size-cells = <0>; 82*4882a593Smuzhiyun 83*4882a593Smuzhiyun ports { 84*4882a593Smuzhiyun #address-cells = <1>; 85*4882a593Smuzhiyun #size-cells = <0>; 86*4882a593Smuzhiyun 87*4882a593Smuzhiyun port@0 { 88*4882a593Smuzhiyun reg = <0>; 89*4882a593Smuzhiyun 90*4882a593Smuzhiyun adv7125_in_rgb: endpoint { 91*4882a593Smuzhiyun remote-endpoint = <&rgb_out_adv7125>; 92*4882a593Smuzhiyun }; 93*4882a593Smuzhiyun }; 94*4882a593Smuzhiyun 95*4882a593Smuzhiyun port@1 { 96*4882a593Smuzhiyun reg = <1>; 97*4882a593Smuzhiyun 98*4882a593Smuzhiyun adv7125_out_vga: endpoint { 99*4882a593Smuzhiyun remote-endpoint = <&vga_in_adv7125>; 100*4882a593Smuzhiyun }; 101*4882a593Smuzhiyun }; 102*4882a593Smuzhiyun }; 103*4882a593Smuzhiyun }; 104*4882a593Smuzhiyun 105*4882a593Smuzhiyun vga { 106*4882a593Smuzhiyun compatible = "vga-connector"; 107*4882a593Smuzhiyun ddc-i2c-bus = <&i2c2>; 108*4882a593Smuzhiyun 109*4882a593Smuzhiyun port { 110*4882a593Smuzhiyun vga_in_adv7125: endpoint { 111*4882a593Smuzhiyun remote-endpoint = <&adv7125_out_vga>; 112*4882a593Smuzhiyun }; 113*4882a593Smuzhiyun }; 114*4882a593Smuzhiyun }; 115*4882a593Smuzhiyun 116*4882a593Smuzhiyun ext_gmac: external-gmac-clock { 117*4882a593Smuzhiyun compatible = "fixed-clock"; 118*4882a593Smuzhiyun clock-frequency = <125000000>; 119*4882a593Smuzhiyun clock-output-names = "ext_gmac"; 120*4882a593Smuzhiyun #clock-cells = <0>; 121*4882a593Smuzhiyun }; 122*4882a593Smuzhiyun 123*4882a593Smuzhiyun gpio-keys { 124*4882a593Smuzhiyun compatible = "gpio-keys"; 125*4882a593Smuzhiyun #address-cells = <1>; 126*4882a593Smuzhiyun #size-cells = <0>; 127*4882a593Smuzhiyun autorepeat; 128*4882a593Smuzhiyun 129*4882a593Smuzhiyun pinctrl-names = "default"; 130*4882a593Smuzhiyun pinctrl-0 = <&pwrbtn>; 131*4882a593Smuzhiyun 132*4882a593Smuzhiyun button@0 { 133*4882a593Smuzhiyun gpios = <&gpio0 5 GPIO_ACTIVE_LOW>; 134*4882a593Smuzhiyun linux,code = <116>; 135*4882a593Smuzhiyun label = "GPIO Key Power"; 136*4882a593Smuzhiyun linux,input-type = <1>; 137*4882a593Smuzhiyun gpio-key,wakeup = <1>; 138*4882a593Smuzhiyun debounce-interval = <100>; 139*4882a593Smuzhiyun }; 140*4882a593Smuzhiyun }; 141*4882a593Smuzhiyun 142*4882a593Smuzhiyun ir: ir-receiver { 143*4882a593Smuzhiyun compatible = "gpio-ir-receiver"; 144*4882a593Smuzhiyun gpios = <&gpio0 6 GPIO_ACTIVE_LOW>; 145*4882a593Smuzhiyun pinctrl-names = "default"; 146*4882a593Smuzhiyun pinctrl-0 = <&ir_int>; 147*4882a593Smuzhiyun }; 148*4882a593Smuzhiyun 149*4882a593Smuzhiyun vcc_flash: flash-regulator { 150*4882a593Smuzhiyun compatible = "regulator-fixed"; 151*4882a593Smuzhiyun regulator-name = "vcc_flash"; 152*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 153*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 154*4882a593Smuzhiyun vin-supply = <&vcc_io>; 155*4882a593Smuzhiyun }; 156*4882a593Smuzhiyun 157*4882a593Smuzhiyun vcc_sd: sdmmc-regulator { 158*4882a593Smuzhiyun compatible = "regulator-fixed"; 159*4882a593Smuzhiyun gpio = <&gpio7 11 GPIO_ACTIVE_LOW>; 160*4882a593Smuzhiyun pinctrl-names = "default"; 161*4882a593Smuzhiyun pinctrl-0 = <&sdmmc_pwr>; 162*4882a593Smuzhiyun regulator-name = "vcc_sd"; 163*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 164*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 165*4882a593Smuzhiyun startup-delay-us = <100000>; 166*4882a593Smuzhiyun vin-supply = <&vcc_io>; 167*4882a593Smuzhiyun }; 168*4882a593Smuzhiyun 169*4882a593Smuzhiyun vcc_sys: vsys-regulator { 170*4882a593Smuzhiyun compatible = "regulator-fixed"; 171*4882a593Smuzhiyun regulator-name = "vcc_sys"; 172*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 173*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 174*4882a593Smuzhiyun regulator-always-on; 175*4882a593Smuzhiyun regulator-boot-on; 176*4882a593Smuzhiyun }; 177*4882a593Smuzhiyun 178*4882a593Smuzhiyun /* 179*4882a593Smuzhiyun * A PT5128 creates both dovdd_1v8 and vcc28_dvp, controlled 180*4882a593Smuzhiyun * by the dvp_pwr pin. 181*4882a593Smuzhiyun */ 182*4882a593Smuzhiyun vcc18_dvp: vcc18-dvp-regulator { 183*4882a593Smuzhiyun compatible = "regulator-fixed"; 184*4882a593Smuzhiyun regulator-name = "vcc18-dvp"; 185*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 186*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 187*4882a593Smuzhiyun vin-supply = <&vcc28_dvp>; 188*4882a593Smuzhiyun }; 189*4882a593Smuzhiyun 190*4882a593Smuzhiyun vcc28_dvp: vcc28-dvp-regulator { 191*4882a593Smuzhiyun compatible = "regulator-fixed"; 192*4882a593Smuzhiyun enable-active-high; 193*4882a593Smuzhiyun gpio = <&gpio0 17 GPIO_ACTIVE_HIGH>; 194*4882a593Smuzhiyun pinctrl-names = "default"; 195*4882a593Smuzhiyun pinctrl-0 = <&dvp_pwr>; 196*4882a593Smuzhiyun regulator-name = "vcc28_dvp"; 197*4882a593Smuzhiyun regulator-min-microvolt = <2800000>; 198*4882a593Smuzhiyun regulator-max-microvolt = <2800000>; 199*4882a593Smuzhiyun regulator-always-on; 200*4882a593Smuzhiyun vin-supply = <&vcc_io>; 201*4882a593Smuzhiyun }; 202*4882a593Smuzhiyun 203*4882a593Smuzhiyun xin32k: xin32k { 204*4882a593Smuzhiyun compatible = "fixed-clock"; 205*4882a593Smuzhiyun clock-frequency = <32768>; 206*4882a593Smuzhiyun clock-output-names = "xin32k"; 207*4882a593Smuzhiyun #clock-cells = <0>; 208*4882a593Smuzhiyun }; 209*4882a593Smuzhiyun}; 210*4882a593Smuzhiyun 211*4882a593Smuzhiyun&cpu0 { 212*4882a593Smuzhiyun cpu0-supply = <&vdd_cpu>; 213*4882a593Smuzhiyun}; 214*4882a593Smuzhiyun 215*4882a593Smuzhiyun&emmc { 216*4882a593Smuzhiyun bus-width = <8>; 217*4882a593Smuzhiyun cap-mmc-highspeed; 218*4882a593Smuzhiyun disable-wp; 219*4882a593Smuzhiyun non-removable; 220*4882a593Smuzhiyun num-slots = <1>; 221*4882a593Smuzhiyun pinctrl-names = "default"; 222*4882a593Smuzhiyun pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_pwr &emmc_bus8>; 223*4882a593Smuzhiyun vmmc-supply = <&vcc_io>; 224*4882a593Smuzhiyun vqmmc-supply = <&vcc_flash>; 225*4882a593Smuzhiyun status = "okay"; 226*4882a593Smuzhiyun}; 227*4882a593Smuzhiyun 228*4882a593Smuzhiyun&sdmmc { 229*4882a593Smuzhiyun bus-width = <4>; 230*4882a593Smuzhiyun cap-mmc-highspeed; 231*4882a593Smuzhiyun cap-sd-highspeed; 232*4882a593Smuzhiyun card-detect-delay = <200>; 233*4882a593Smuzhiyun disable-wp; /* wp not hooked up */ 234*4882a593Smuzhiyun num-slots = <1>; 235*4882a593Smuzhiyun pinctrl-names = "default"; 236*4882a593Smuzhiyun pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>; 237*4882a593Smuzhiyun vmmc-supply = <&vcc_sd>; 238*4882a593Smuzhiyun vqmmc-supply = <&vccio_sd>; 239*4882a593Smuzhiyun status = "okay"; 240*4882a593Smuzhiyun no-sdio; 241*4882a593Smuzhiyun no-mmc; 242*4882a593Smuzhiyun}; 243*4882a593Smuzhiyun 244*4882a593Smuzhiyun&gmac { 245*4882a593Smuzhiyun phy-supply = <&vcc_lan>; 246*4882a593Smuzhiyun phy-mode = "rgmii"; 247*4882a593Smuzhiyun clock_in_out = "input"; 248*4882a593Smuzhiyun snps,reset-gpio = <&gpio4 7 0>; 249*4882a593Smuzhiyun snps,reset-active-low; 250*4882a593Smuzhiyun snps,reset-delays-us = <0 10000 1000000>; 251*4882a593Smuzhiyun assigned-clocks = <&cru SCLK_MAC>; 252*4882a593Smuzhiyun assigned-clock-parents = <&ext_gmac>; 253*4882a593Smuzhiyun pinctrl-names = "default"; 254*4882a593Smuzhiyun pinctrl-0 = <&rgmii_pins>; 255*4882a593Smuzhiyun tx_delay = <0x30>; 256*4882a593Smuzhiyun rx_delay = <0x10>; 257*4882a593Smuzhiyun status = "ok"; 258*4882a593Smuzhiyun}; 259*4882a593Smuzhiyun 260*4882a593Smuzhiyun&gpu { 261*4882a593Smuzhiyun mali-supply = <&vdd_gpu>; 262*4882a593Smuzhiyun status = "okay"; 263*4882a593Smuzhiyun}; 264*4882a593Smuzhiyun 265*4882a593Smuzhiyun&hdmi { 266*4882a593Smuzhiyun status = "okay"; 267*4882a593Smuzhiyun}; 268*4882a593Smuzhiyun 269*4882a593Smuzhiyun&rgb { 270*4882a593Smuzhiyun status = "okay"; 271*4882a593Smuzhiyun 272*4882a593Smuzhiyun ports { 273*4882a593Smuzhiyun port@1 { 274*4882a593Smuzhiyun reg = <1>; 275*4882a593Smuzhiyun 276*4882a593Smuzhiyun rgb_out_adv7125: endpoint { 277*4882a593Smuzhiyun remote-endpoint = <&adv7125_in_rgb>; 278*4882a593Smuzhiyun }; 279*4882a593Smuzhiyun }; 280*4882a593Smuzhiyun }; 281*4882a593Smuzhiyun}; 282*4882a593Smuzhiyun 283*4882a593Smuzhiyun&rgb_in_vopl { 284*4882a593Smuzhiyun status = "okay"; 285*4882a593Smuzhiyun}; 286*4882a593Smuzhiyun 287*4882a593Smuzhiyun&rgb_in_vopb { 288*4882a593Smuzhiyun status = "disabled"; 289*4882a593Smuzhiyun}; 290*4882a593Smuzhiyun 291*4882a593Smuzhiyun&route_rgb { 292*4882a593Smuzhiyun connect = <&vopl_out_rgb>; 293*4882a593Smuzhiyun status = "disabled"; 294*4882a593Smuzhiyun}; 295*4882a593Smuzhiyun 296*4882a593Smuzhiyun&hevc_service { 297*4882a593Smuzhiyun status = "okay"; 298*4882a593Smuzhiyun}; 299*4882a593Smuzhiyun 300*4882a593Smuzhiyun&i2c0 { 301*4882a593Smuzhiyun status = "okay"; 302*4882a593Smuzhiyun clock-frequency = <400000>; 303*4882a593Smuzhiyun 304*4882a593Smuzhiyun rk808: pmic@1b { 305*4882a593Smuzhiyun compatible = "rockchip,rk808"; 306*4882a593Smuzhiyun reg = <0x1b>; 307*4882a593Smuzhiyun interrupt-parent = <&gpio0>; 308*4882a593Smuzhiyun interrupts = <4 IRQ_TYPE_LEVEL_LOW>; 309*4882a593Smuzhiyun pinctrl-names = "default"; 310*4882a593Smuzhiyun pinctrl-0 = <&pmic_int &global_pwroff>; 311*4882a593Smuzhiyun rockchip,system-power-controller; 312*4882a593Smuzhiyun wakeup-source; 313*4882a593Smuzhiyun #clock-cells = <1>; 314*4882a593Smuzhiyun clock-output-names = "rk808-clkout1", "rk808-clkout2"; 315*4882a593Smuzhiyun 316*4882a593Smuzhiyun vcc1-supply = <&vcc_sys>; 317*4882a593Smuzhiyun vcc2-supply = <&vcc_sys>; 318*4882a593Smuzhiyun vcc3-supply = <&vcc_sys>; 319*4882a593Smuzhiyun vcc4-supply = <&vcc_sys>; 320*4882a593Smuzhiyun vcc6-supply = <&vcc_sys>; 321*4882a593Smuzhiyun vcc7-supply = <&vcc_sys>; 322*4882a593Smuzhiyun vcc8-supply = <&vcc_18>; 323*4882a593Smuzhiyun vcc9-supply = <&vcc_io>; 324*4882a593Smuzhiyun vcc10-supply = <&vcc_io>; 325*4882a593Smuzhiyun vcc11-supply = <&vcc_sys>; 326*4882a593Smuzhiyun vcc12-supply = <&vcc_io>; 327*4882a593Smuzhiyun vddio-supply = <&vcc_io>; 328*4882a593Smuzhiyun 329*4882a593Smuzhiyun regulators { 330*4882a593Smuzhiyun vdd_cpu: DCDC_REG1 { 331*4882a593Smuzhiyun regulator-always-on; 332*4882a593Smuzhiyun regulator-boot-on; 333*4882a593Smuzhiyun regulator-min-microvolt = <750000>; 334*4882a593Smuzhiyun regulator-max-microvolt = <1350000>; 335*4882a593Smuzhiyun regulator-name = "vdd_arm"; 336*4882a593Smuzhiyun regulator-state-mem { 337*4882a593Smuzhiyun regulator-off-in-suspend; 338*4882a593Smuzhiyun }; 339*4882a593Smuzhiyun }; 340*4882a593Smuzhiyun 341*4882a593Smuzhiyun vdd_gpu: DCDC_REG2 { 342*4882a593Smuzhiyun regulator-always-on; 343*4882a593Smuzhiyun regulator-boot-on; 344*4882a593Smuzhiyun regulator-min-microvolt = <850000>; 345*4882a593Smuzhiyun regulator-max-microvolt = <1250000>; 346*4882a593Smuzhiyun regulator-name = "vdd_gpu"; 347*4882a593Smuzhiyun regulator-ramp-delay = <6000>; 348*4882a593Smuzhiyun regulator-state-mem { 349*4882a593Smuzhiyun regulator-on-in-suspend; 350*4882a593Smuzhiyun regulator-suspend-microvolt = <1000000>; 351*4882a593Smuzhiyun }; 352*4882a593Smuzhiyun }; 353*4882a593Smuzhiyun 354*4882a593Smuzhiyun vcc_ddr: DCDC_REG3 { 355*4882a593Smuzhiyun regulator-always-on; 356*4882a593Smuzhiyun regulator-boot-on; 357*4882a593Smuzhiyun regulator-name = "vcc_ddr"; 358*4882a593Smuzhiyun regulator-state-mem { 359*4882a593Smuzhiyun regulator-on-in-suspend; 360*4882a593Smuzhiyun }; 361*4882a593Smuzhiyun }; 362*4882a593Smuzhiyun 363*4882a593Smuzhiyun vcc_io: DCDC_REG4 { 364*4882a593Smuzhiyun regulator-always-on; 365*4882a593Smuzhiyun regulator-boot-on; 366*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 367*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 368*4882a593Smuzhiyun regulator-name = "vcc_io"; 369*4882a593Smuzhiyun regulator-state-mem { 370*4882a593Smuzhiyun regulator-on-in-suspend; 371*4882a593Smuzhiyun regulator-suspend-microvolt = <3300000>; 372*4882a593Smuzhiyun }; 373*4882a593Smuzhiyun }; 374*4882a593Smuzhiyun 375*4882a593Smuzhiyun vcc_lan: LDO_REG1 { 376*4882a593Smuzhiyun regulator-always-on; 377*4882a593Smuzhiyun regulator-boot-on; 378*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 379*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 380*4882a593Smuzhiyun regulator-name = "vcc_lan"; 381*4882a593Smuzhiyun regulator-state-mem { 382*4882a593Smuzhiyun regulator-on-in-suspend; 383*4882a593Smuzhiyun regulator-suspend-microvolt = <3300000>; 384*4882a593Smuzhiyun }; 385*4882a593Smuzhiyun }; 386*4882a593Smuzhiyun 387*4882a593Smuzhiyun vccio_sd: LDO_REG2 { 388*4882a593Smuzhiyun regulator-always-on; 389*4882a593Smuzhiyun regulator-boot-on; 390*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 391*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 392*4882a593Smuzhiyun regulator-name = "vccio_sd"; 393*4882a593Smuzhiyun regulator-state-mem { 394*4882a593Smuzhiyun regulator-off-in-suspend; 395*4882a593Smuzhiyun }; 396*4882a593Smuzhiyun }; 397*4882a593Smuzhiyun 398*4882a593Smuzhiyun vdd_10: LDO_REG3 { 399*4882a593Smuzhiyun regulator-always-on; 400*4882a593Smuzhiyun regulator-boot-on; 401*4882a593Smuzhiyun regulator-min-microvolt = <1000000>; 402*4882a593Smuzhiyun regulator-max-microvolt = <1000000>; 403*4882a593Smuzhiyun regulator-name = "vdd_10"; 404*4882a593Smuzhiyun regulator-state-mem { 405*4882a593Smuzhiyun regulator-on-in-suspend; 406*4882a593Smuzhiyun regulator-suspend-microvolt = <1000000>; 407*4882a593Smuzhiyun }; 408*4882a593Smuzhiyun }; 409*4882a593Smuzhiyun 410*4882a593Smuzhiyun vcc18_lcd: LDO_REG4 { 411*4882a593Smuzhiyun regulator-always-on; 412*4882a593Smuzhiyun regulator-boot-on; 413*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 414*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 415*4882a593Smuzhiyun regulator-name = "vcc18_lcd"; 416*4882a593Smuzhiyun regulator-state-mem { 417*4882a593Smuzhiyun regulator-on-in-suspend; 418*4882a593Smuzhiyun regulator-suspend-microvolt = <1800000>; 419*4882a593Smuzhiyun }; 420*4882a593Smuzhiyun }; 421*4882a593Smuzhiyun 422*4882a593Smuzhiyun ldo5: LDO_REG5 { 423*4882a593Smuzhiyun regulator-always-on; 424*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 425*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 426*4882a593Smuzhiyun regulator-name = "ldo5"; 427*4882a593Smuzhiyun }; 428*4882a593Smuzhiyun 429*4882a593Smuzhiyun vdd10_lcd: LDO_REG6 { 430*4882a593Smuzhiyun regulator-always-on; 431*4882a593Smuzhiyun regulator-boot-on; 432*4882a593Smuzhiyun regulator-min-microvolt = <1000000>; 433*4882a593Smuzhiyun regulator-max-microvolt = <1000000>; 434*4882a593Smuzhiyun regulator-name = "vdd10_lcd"; 435*4882a593Smuzhiyun regulator-state-mem { 436*4882a593Smuzhiyun regulator-on-in-suspend; 437*4882a593Smuzhiyun regulator-suspend-microvolt = <1000000>; 438*4882a593Smuzhiyun }; 439*4882a593Smuzhiyun }; 440*4882a593Smuzhiyun 441*4882a593Smuzhiyun vcc_18: LDO_REG7 { 442*4882a593Smuzhiyun regulator-always-on; 443*4882a593Smuzhiyun regulator-boot-on; 444*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 445*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 446*4882a593Smuzhiyun regulator-name = "vcc_18"; 447*4882a593Smuzhiyun regulator-state-mem { 448*4882a593Smuzhiyun regulator-on-in-suspend; 449*4882a593Smuzhiyun regulator-suspend-microvolt = <1800000>; 450*4882a593Smuzhiyun }; 451*4882a593Smuzhiyun }; 452*4882a593Smuzhiyun 453*4882a593Smuzhiyun vcca_33: LDO_REG8 { 454*4882a593Smuzhiyun regulator-always-on; 455*4882a593Smuzhiyun regulator-boot-on; 456*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 457*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 458*4882a593Smuzhiyun regulator-name = "vcca_33"; 459*4882a593Smuzhiyun regulator-state-mem { 460*4882a593Smuzhiyun regulator-on-in-suspend; 461*4882a593Smuzhiyun regulator-suspend-microvolt = <3300000>; 462*4882a593Smuzhiyun }; 463*4882a593Smuzhiyun }; 464*4882a593Smuzhiyun 465*4882a593Smuzhiyun vccio_wl: SWITCH_REG1 { 466*4882a593Smuzhiyun regulator-always-on; 467*4882a593Smuzhiyun regulator-boot-on; 468*4882a593Smuzhiyun regulator-name = "vccio_wl"; 469*4882a593Smuzhiyun regulator-state-mem { 470*4882a593Smuzhiyun regulator-on-in-suspend; 471*4882a593Smuzhiyun }; 472*4882a593Smuzhiyun }; 473*4882a593Smuzhiyun 474*4882a593Smuzhiyun vcc_lcd: SWITCH_REG2 { 475*4882a593Smuzhiyun regulator-always-on; 476*4882a593Smuzhiyun regulator-boot-on; 477*4882a593Smuzhiyun regulator-name = "vcc_lcd"; 478*4882a593Smuzhiyun regulator-state-mem { 479*4882a593Smuzhiyun regulator-on-in-suspend; 480*4882a593Smuzhiyun }; 481*4882a593Smuzhiyun }; 482*4882a593Smuzhiyun }; 483*4882a593Smuzhiyun }; 484*4882a593Smuzhiyun}; 485*4882a593Smuzhiyun 486*4882a593Smuzhiyun&i2c1 { 487*4882a593Smuzhiyun status = "okay"; 488*4882a593Smuzhiyun clock-frequency = <400000>; 489*4882a593Smuzhiyun 490*4882a593Smuzhiyun ak8963: ak8963@0d { 491*4882a593Smuzhiyun compatible = "asahi-kasei,ak8975"; 492*4882a593Smuzhiyun reg = <0x0d>; 493*4882a593Smuzhiyun interrupt-parent = <&gpio8>; 494*4882a593Smuzhiyun interrupts = <1 IRQ_TYPE_EDGE_RISING>; 495*4882a593Smuzhiyun pinctrl-names = "default"; 496*4882a593Smuzhiyun pinctrl-0 = <&comp_int>; 497*4882a593Smuzhiyun }; 498*4882a593Smuzhiyun 499*4882a593Smuzhiyun l3g4200d: l3g4200d@68 { 500*4882a593Smuzhiyun compatible = "st,l3g4200d-gyro"; 501*4882a593Smuzhiyun st,drdy-int-pin = <2>; 502*4882a593Smuzhiyun reg = <0x6b>; 503*4882a593Smuzhiyun }; 504*4882a593Smuzhiyun 505*4882a593Smuzhiyun mma8452: mma8452@1d { 506*4882a593Smuzhiyun compatible = "fsl,mma8452"; 507*4882a593Smuzhiyun reg = <0x1d>; 508*4882a593Smuzhiyun interrupt-parent = <&gpio8>; 509*4882a593Smuzhiyun interrupts = <0 IRQ_TYPE_EDGE_RISING>; 510*4882a593Smuzhiyun pinctrl-names = "default"; 511*4882a593Smuzhiyun pinctrl-0 = <&gsensor_int>; 512*4882a593Smuzhiyun }; 513*4882a593Smuzhiyun}; 514*4882a593Smuzhiyun 515*4882a593Smuzhiyun&i2c2 { 516*4882a593Smuzhiyun status = "okay"; 517*4882a593Smuzhiyun}; 518*4882a593Smuzhiyun 519*4882a593Smuzhiyun&i2c3 { 520*4882a593Smuzhiyun status = "okay"; 521*4882a593Smuzhiyun}; 522*4882a593Smuzhiyun 523*4882a593Smuzhiyun&i2c4 { 524*4882a593Smuzhiyun status = "okay"; 525*4882a593Smuzhiyun}; 526*4882a593Smuzhiyun 527*4882a593Smuzhiyun&io_domains { 528*4882a593Smuzhiyun status = "okay"; 529*4882a593Smuzhiyun 530*4882a593Smuzhiyun audio-supply = <&vcca_33>; 531*4882a593Smuzhiyun bb-supply = <&vcc_io>; 532*4882a593Smuzhiyun dvp-supply = <&vcc18_dvp>; 533*4882a593Smuzhiyun flash0-supply = <&vcc_flash>; 534*4882a593Smuzhiyun flash1-supply = <&vcc_lan>; 535*4882a593Smuzhiyun gpio30-supply = <&vcc_io>; 536*4882a593Smuzhiyun gpio1830-supply = <&vcc_io>; 537*4882a593Smuzhiyun lcdc-supply = <&vcc_io>; 538*4882a593Smuzhiyun sdcard-supply = <&vccio_sd>; 539*4882a593Smuzhiyun wifi-supply = <&vccio_wl>; 540*4882a593Smuzhiyun}; 541*4882a593Smuzhiyun 542*4882a593Smuzhiyun&rga { 543*4882a593Smuzhiyun status = "okay"; 544*4882a593Smuzhiyun}; 545*4882a593Smuzhiyun 546*4882a593Smuzhiyun&pinctrl { 547*4882a593Smuzhiyun ak8963 { 548*4882a593Smuzhiyun comp_int: comp-int { 549*4882a593Smuzhiyun rockchip,pins = <8 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>; 550*4882a593Smuzhiyun }; 551*4882a593Smuzhiyun }; 552*4882a593Smuzhiyun 553*4882a593Smuzhiyun buttons { 554*4882a593Smuzhiyun pwrbtn: pwrbtn { 555*4882a593Smuzhiyun rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>; 556*4882a593Smuzhiyun }; 557*4882a593Smuzhiyun }; 558*4882a593Smuzhiyun 559*4882a593Smuzhiyun dvp { 560*4882a593Smuzhiyun dvp_pwr: dvp-pwr { 561*4882a593Smuzhiyun rockchip,pins = <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>; 562*4882a593Smuzhiyun }; 563*4882a593Smuzhiyun }; 564*4882a593Smuzhiyun 565*4882a593Smuzhiyun ir { 566*4882a593Smuzhiyun ir_int: ir-int { 567*4882a593Smuzhiyun rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>; 568*4882a593Smuzhiyun }; 569*4882a593Smuzhiyun }; 570*4882a593Smuzhiyun 571*4882a593Smuzhiyun mma8452 { 572*4882a593Smuzhiyun gsensor_int: gsensor-int { 573*4882a593Smuzhiyun rockchip,pins = <8 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>; 574*4882a593Smuzhiyun }; 575*4882a593Smuzhiyun }; 576*4882a593Smuzhiyun 577*4882a593Smuzhiyun pmic { 578*4882a593Smuzhiyun pmic_int: pmic-int { 579*4882a593Smuzhiyun rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>; 580*4882a593Smuzhiyun }; 581*4882a593Smuzhiyun }; 582*4882a593Smuzhiyun 583*4882a593Smuzhiyun sdmmc { 584*4882a593Smuzhiyun sdmmc_pwr: sdmmc-pwr { 585*4882a593Smuzhiyun rockchip,pins = <7 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; 586*4882a593Smuzhiyun }; 587*4882a593Smuzhiyun }; 588*4882a593Smuzhiyun}; 589*4882a593Smuzhiyun 590*4882a593Smuzhiyun&tsadc { 591*4882a593Smuzhiyun rockchip,hw-tshut-polarity = <0>; 592*4882a593Smuzhiyun status = "okay"; 593*4882a593Smuzhiyun}; 594*4882a593Smuzhiyun 595*4882a593Smuzhiyun&vopb { 596*4882a593Smuzhiyun status = "okay"; 597*4882a593Smuzhiyun}; 598*4882a593Smuzhiyun 599*4882a593Smuzhiyun&vopb_mmu { 600*4882a593Smuzhiyun status = "okay"; 601*4882a593Smuzhiyun}; 602*4882a593Smuzhiyun 603*4882a593Smuzhiyun&vopl { 604*4882a593Smuzhiyun status = "okay"; 605*4882a593Smuzhiyun}; 606*4882a593Smuzhiyun 607*4882a593Smuzhiyun&vopl_mmu { 608*4882a593Smuzhiyun status = "okay"; 609*4882a593Smuzhiyun}; 610*4882a593Smuzhiyun 611*4882a593Smuzhiyun&vpu_service { 612*4882a593Smuzhiyun status = "okay"; 613*4882a593Smuzhiyun}; 614*4882a593Smuzhiyun 615*4882a593Smuzhiyun&uart0 { 616*4882a593Smuzhiyun status = "okay"; 617*4882a593Smuzhiyun}; 618*4882a593Smuzhiyun 619*4882a593Smuzhiyun&uart1 { 620*4882a593Smuzhiyun status = "okay"; 621*4882a593Smuzhiyun}; 622*4882a593Smuzhiyun 623*4882a593Smuzhiyun&uart2 { 624*4882a593Smuzhiyun status = "okay"; 625*4882a593Smuzhiyun}; 626*4882a593Smuzhiyun 627*4882a593Smuzhiyun&uart3 { 628*4882a593Smuzhiyun status = "okay"; 629*4882a593Smuzhiyun}; 630*4882a593Smuzhiyun 631*4882a593Smuzhiyun&uart4 { 632*4882a593Smuzhiyun status = "okay"; 633*4882a593Smuzhiyun}; 634*4882a593Smuzhiyun 635*4882a593Smuzhiyun&usbphy { 636*4882a593Smuzhiyun status = "okay"; 637*4882a593Smuzhiyun}; 638*4882a593Smuzhiyun 639*4882a593Smuzhiyun&usb_host0_ehci { 640*4882a593Smuzhiyun no-relinquish-port; 641*4882a593Smuzhiyun status = "okay"; 642*4882a593Smuzhiyun}; 643*4882a593Smuzhiyun 644*4882a593Smuzhiyun&usb_host1 { 645*4882a593Smuzhiyun status = "okay"; 646*4882a593Smuzhiyun}; 647*4882a593Smuzhiyun 648*4882a593Smuzhiyun&usb_otg { 649*4882a593Smuzhiyun status= "okay"; 650*4882a593Smuzhiyun}; 651