xref: /OK3568_Linux_fs/kernel/scripts/dtc/include-prefixes/arm/rk3288-evb-android-rk818-mipi-edp.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun/*
2*4882a593Smuzhiyun * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * This file is dual-licensed: you can use it either under the terms
5*4882a593Smuzhiyun * of the GPL or the X11 license, at your option. Note that this dual
6*4882a593Smuzhiyun * licensing only applies to this file, and not this project as a
7*4882a593Smuzhiyun * whole.
8*4882a593Smuzhiyun *
9*4882a593Smuzhiyun *  a) This file is free software; you can redistribute it and/or
10*4882a593Smuzhiyun *     modify it under the terms of the GNU General Public License as
11*4882a593Smuzhiyun *     published by the Free Software Foundation; either version 2 of the
12*4882a593Smuzhiyun *     License, or (at your option) any later version.
13*4882a593Smuzhiyun *
14*4882a593Smuzhiyun *     This file is distributed in the hope that it will be useful,
15*4882a593Smuzhiyun *     but WITHOUT ANY WARRANTY; without even the implied warranty of
16*4882a593Smuzhiyun *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17*4882a593Smuzhiyun *     GNU General Public License for more details.
18*4882a593Smuzhiyun *
19*4882a593Smuzhiyun * Or, alternatively,
20*4882a593Smuzhiyun *
21*4882a593Smuzhiyun *  b) Permission is hereby granted, free of charge, to any person
22*4882a593Smuzhiyun *     obtaining a copy of this software and associated documentation
23*4882a593Smuzhiyun *     files (the "Software"), to deal in the Software without
24*4882a593Smuzhiyun *     restriction, including without limitation the rights to use,
25*4882a593Smuzhiyun *     copy, modify, merge, publish, distribute, sublicense, and/or
26*4882a593Smuzhiyun *     sell copies of the Software, and to permit persons to whom the
27*4882a593Smuzhiyun *     Software is furnished to do so, subject to the following
28*4882a593Smuzhiyun *     conditions:
29*4882a593Smuzhiyun *
30*4882a593Smuzhiyun *     The above copyright notice and this permission notice shall be
31*4882a593Smuzhiyun *     included in all copies or substantial portions of the Software.
32*4882a593Smuzhiyun *
33*4882a593Smuzhiyun *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34*4882a593Smuzhiyun *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35*4882a593Smuzhiyun *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36*4882a593Smuzhiyun *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37*4882a593Smuzhiyun *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38*4882a593Smuzhiyun *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39*4882a593Smuzhiyun *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40*4882a593Smuzhiyun *     OTHER DEALINGS IN THE SOFTWARE.
41*4882a593Smuzhiyun */
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun/dts-v1/;
44*4882a593Smuzhiyun#include "rk3288-evb.dtsi"
45*4882a593Smuzhiyun#include "rk3288-android.dtsi"
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun/ {
48*4882a593Smuzhiyun	compatible = "rockchip,rk3288-evb-android-rk818", "rockchip,rk3288";
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun	sdio_pwrseq: sdio-pwrseq {
51*4882a593Smuzhiyun		compatible = "mmc-pwrseq-simple";
52*4882a593Smuzhiyun		clocks = <&rk818 1>;
53*4882a593Smuzhiyun		clock-names = "ext_clock";
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun		/*
56*4882a593Smuzhiyun		 * On the module itself this is one of these (depending
57*4882a593Smuzhiyun		 * on the actual card populated):
58*4882a593Smuzhiyun		 * - SDIO_RESET_L_WL_REG_ON
59*4882a593Smuzhiyun		 * - PDN (power down when low)
60*4882a593Smuzhiyun		 */
61*4882a593Smuzhiyun		reset-gpios = <&gpio4 28 GPIO_ACTIVE_LOW>;
62*4882a593Smuzhiyun	};
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun	wireless-bluetooth {
65*4882a593Smuzhiyun		clocks = <&rk818 1>;
66*4882a593Smuzhiyun		clock-names = "ext_clock";
67*4882a593Smuzhiyun	};
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun	/delete-node/ sdmmc-regulator;
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun	vcc_lcd: vcc-lcd {
72*4882a593Smuzhiyun		compatible = "regulator-fixed";
73*4882a593Smuzhiyun		enable-active-high;
74*4882a593Smuzhiyun		regulator-boot-on;
75*4882a593Smuzhiyun		gpio = <&gpio7 3 GPIO_ACTIVE_HIGH>;
76*4882a593Smuzhiyun		pinctrl-names = "default";
77*4882a593Smuzhiyun		pinctrl-0 = <&lcd_en>;
78*4882a593Smuzhiyun		regulator-name = "vcc_lcd";
79*4882a593Smuzhiyun		vin-supply = <&vcc_io>;
80*4882a593Smuzhiyun	};
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun	xin32k: xin32k {
83*4882a593Smuzhiyun		compatible = "fixed-clock";
84*4882a593Smuzhiyun		clock-frequency = <32768>;
85*4882a593Smuzhiyun		clock-output-names = "xin32k";
86*4882a593Smuzhiyun		#clock-cells = <0>;
87*4882a593Smuzhiyun	};
88*4882a593Smuzhiyun};
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun&cpu0 {
91*4882a593Smuzhiyun	cpu-supply = <&vdd_cpu>;
92*4882a593Smuzhiyun};
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun&gpu {
95*4882a593Smuzhiyun	status = "okay";
96*4882a593Smuzhiyun	mali-supply = <&vdd_gpu>;
97*4882a593Smuzhiyun};
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun&hdmi_analog_sound {
100*4882a593Smuzhiyun	status = "okay";
101*4882a593Smuzhiyun};
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun&i2c0 {
104*4882a593Smuzhiyun	clock-frequency = <400000>;
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun	vdd_cpu: syr827@40 {
107*4882a593Smuzhiyun		compatible = "silergy,syr827";
108*4882a593Smuzhiyun		reg = <0x40>;
109*4882a593Smuzhiyun		vin-supply = <&vcc_sys>;
110*4882a593Smuzhiyun		regulator-compatible = "fan53555-reg";
111*4882a593Smuzhiyun		pinctrl-0 = <&vsel1_gpio>;
112*4882a593Smuzhiyun		vsel-gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>;
113*4882a593Smuzhiyun		regulator-name = "vdd_cpu";
114*4882a593Smuzhiyun		regulator-min-microvolt = <712500>;
115*4882a593Smuzhiyun		regulator-max-microvolt = <1500000>;
116*4882a593Smuzhiyun		regulator-ramp-delay = <1000>;
117*4882a593Smuzhiyun		fcs,suspend-voltage-selector = <1>;
118*4882a593Smuzhiyun		regulator-always-on;
119*4882a593Smuzhiyun		regulator-boot-on;
120*4882a593Smuzhiyun		regulator-initial-state = <3>;
121*4882a593Smuzhiyun		regulator-state-mem {
122*4882a593Smuzhiyun			regulator-off-in-suspend;
123*4882a593Smuzhiyun		};
124*4882a593Smuzhiyun	};
125*4882a593Smuzhiyun
126*4882a593Smuzhiyun	rk818: pmic@1c {
127*4882a593Smuzhiyun		compatible = "rockchip,rk818";
128*4882a593Smuzhiyun		reg = <0x1c>;
129*4882a593Smuzhiyun		status = "okay";
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun		clock-output-names = "rk818-clkout1", "wifibt_32kin";
132*4882a593Smuzhiyun		interrupt-parent = <&gpio0>;
133*4882a593Smuzhiyun		interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
134*4882a593Smuzhiyun		pinctrl-names = "default";
135*4882a593Smuzhiyun		pinctrl-0 = <&pmic_int>;
136*4882a593Smuzhiyun		rockchip,system-power-controller;
137*4882a593Smuzhiyun		wakeup-source;
138*4882a593Smuzhiyun		#clock-cells = <1>;
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun		vcc1-supply = <&vcc_sys>;
141*4882a593Smuzhiyun		vcc2-supply = <&vcc_sys>;
142*4882a593Smuzhiyun		vcc3-supply = <&vcc_sys>;
143*4882a593Smuzhiyun		vcc4-supply = <&vcc_sys>;
144*4882a593Smuzhiyun		vcc6-supply = <&vcc_sys>;
145*4882a593Smuzhiyun		vcc7-supply = <&vcc_sys>;
146*4882a593Smuzhiyun		vcc8-supply = <&vcc_sys>;
147*4882a593Smuzhiyun		vcc9-supply = <&vcc_io>;
148*4882a593Smuzhiyun
149*4882a593Smuzhiyun		regulators {
150*4882a593Smuzhiyun			vdd_logic: DCDC_REG1 {
151*4882a593Smuzhiyun				regulator-name = "vdd_logic";
152*4882a593Smuzhiyun				regulator-always-on;
153*4882a593Smuzhiyun				regulator-boot-on;
154*4882a593Smuzhiyun				regulator-min-microvolt = <800000>;
155*4882a593Smuzhiyun				regulator-max-microvolt = <1250000>;
156*4882a593Smuzhiyun				regulator-ramp-delay = <6001>;
157*4882a593Smuzhiyun				regulator-state-mem {
158*4882a593Smuzhiyun					regulator-on-in-suspend;
159*4882a593Smuzhiyun					regulator-suspend-microvolt = <1000000>;
160*4882a593Smuzhiyun				};
161*4882a593Smuzhiyun			};
162*4882a593Smuzhiyun
163*4882a593Smuzhiyun			vdd_gpu: DCDC_REG2 {
164*4882a593Smuzhiyun				regulator-name = "vdd_gpu";
165*4882a593Smuzhiyun				regulator-always-on;
166*4882a593Smuzhiyun				regulator-boot-on;
167*4882a593Smuzhiyun				regulator-min-microvolt = <800000>;
168*4882a593Smuzhiyun				regulator-max-microvolt = <1250000>;
169*4882a593Smuzhiyun				regulator-ramp-delay = <6001>;
170*4882a593Smuzhiyun				regulator-state-mem {
171*4882a593Smuzhiyun					regulator-on-in-suspend;
172*4882a593Smuzhiyun					regulator-suspend-microvolt = <1000000>;
173*4882a593Smuzhiyun				};
174*4882a593Smuzhiyun			};
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun			vcc_ddr: DCDC_REG3 {
177*4882a593Smuzhiyun				regulator-always-on;
178*4882a593Smuzhiyun				regulator-boot-on;
179*4882a593Smuzhiyun				regulator-name = "vcc_ddr";
180*4882a593Smuzhiyun				regulator-state-mem {
181*4882a593Smuzhiyun					regulator-on-in-suspend;
182*4882a593Smuzhiyun				};
183*4882a593Smuzhiyun			};
184*4882a593Smuzhiyun
185*4882a593Smuzhiyun			vcc_io: DCDC_REG4 {
186*4882a593Smuzhiyun				regulator-always-on;
187*4882a593Smuzhiyun				regulator-boot-on;
188*4882a593Smuzhiyun				regulator-min-microvolt = <3300000>;
189*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
190*4882a593Smuzhiyun				regulator-name = "vcc_io";
191*4882a593Smuzhiyun				regulator-state-mem {
192*4882a593Smuzhiyun					regulator-off-in-suspend;
193*4882a593Smuzhiyun				};
194*4882a593Smuzhiyun			};
195*4882a593Smuzhiyun
196*4882a593Smuzhiyun			vcca_codec: LDO_REG1 {
197*4882a593Smuzhiyun				regulator-always-on;
198*4882a593Smuzhiyun				regulator-boot-on;
199*4882a593Smuzhiyun				regulator-min-microvolt = <3300000>;
200*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
201*4882a593Smuzhiyun				regulator-name = "vcca_codec";
202*4882a593Smuzhiyun				regulator-state-mem {
203*4882a593Smuzhiyun					regulator-off-in-suspend;
204*4882a593Smuzhiyun				};
205*4882a593Smuzhiyun			};
206*4882a593Smuzhiyun
207*4882a593Smuzhiyun			vcc_tp: LDO_REG2 {
208*4882a593Smuzhiyun				regulator-always-on;
209*4882a593Smuzhiyun				regulator-boot-on;
210*4882a593Smuzhiyun				regulator-min-microvolt = <3300000>;
211*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
212*4882a593Smuzhiyun				regulator-name = "vcc_tp";
213*4882a593Smuzhiyun				regulator-state-mem {
214*4882a593Smuzhiyun					regulator-off-in-suspend;
215*4882a593Smuzhiyun				};
216*4882a593Smuzhiyun			};
217*4882a593Smuzhiyun
218*4882a593Smuzhiyun			vdd_10: LDO_REG3 {
219*4882a593Smuzhiyun				regulator-always-on;
220*4882a593Smuzhiyun				regulator-boot-on;
221*4882a593Smuzhiyun				regulator-min-microvolt = <1000000>;
222*4882a593Smuzhiyun				regulator-max-microvolt = <1000000>;
223*4882a593Smuzhiyun				regulator-name = "vdd_10";
224*4882a593Smuzhiyun				regulator-state-mem {
225*4882a593Smuzhiyun					regulator-on-in-suspend;
226*4882a593Smuzhiyun					regulator-suspend-microvolt = <1000000>;
227*4882a593Smuzhiyun				};
228*4882a593Smuzhiyun			};
229*4882a593Smuzhiyun
230*4882a593Smuzhiyun			vcc18_lcd: LDO_REG4 {
231*4882a593Smuzhiyun				regulator-always-on;
232*4882a593Smuzhiyun				regulator-boot-on;
233*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
234*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
235*4882a593Smuzhiyun				regulator-name = "vcc18_lcd";
236*4882a593Smuzhiyun				regulator-state-mem {
237*4882a593Smuzhiyun					regulator-off-in-suspend;
238*4882a593Smuzhiyun				};
239*4882a593Smuzhiyun			};
240*4882a593Smuzhiyun
241*4882a593Smuzhiyun			vccio_pmu: LDO_REG5 {
242*4882a593Smuzhiyun				regulator-always-on;
243*4882a593Smuzhiyun				regulator-boot-on;
244*4882a593Smuzhiyun				regulator-min-microvolt = <3300000>;
245*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
246*4882a593Smuzhiyun				regulator-name = "vccio_pmu";
247*4882a593Smuzhiyun				regulator-state-mem {
248*4882a593Smuzhiyun					regulator-on-in-suspend;
249*4882a593Smuzhiyun					regulator-suspend-microvolt = <3300000>;
250*4882a593Smuzhiyun				};
251*4882a593Smuzhiyun			};
252*4882a593Smuzhiyun
253*4882a593Smuzhiyun			vdd10_lcd: LDO_REG6 {
254*4882a593Smuzhiyun				regulator-always-on;
255*4882a593Smuzhiyun				regulator-boot-on;
256*4882a593Smuzhiyun				regulator-min-microvolt = <1000000>;
257*4882a593Smuzhiyun				regulator-max-microvolt = <1000000>;
258*4882a593Smuzhiyun				regulator-name = "vdd10_lcd";
259*4882a593Smuzhiyun				regulator-state-mem {
260*4882a593Smuzhiyun					regulator-off-in-suspend;
261*4882a593Smuzhiyun				};
262*4882a593Smuzhiyun			};
263*4882a593Smuzhiyun
264*4882a593Smuzhiyun			vcc_18: LDO_REG7 {
265*4882a593Smuzhiyun				regulator-always-on;
266*4882a593Smuzhiyun				regulator-boot-on;
267*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
268*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
269*4882a593Smuzhiyun				regulator-name = "vcc_18";
270*4882a593Smuzhiyun				regulator-state-mem {
271*4882a593Smuzhiyun					regulator-on-in-suspend;
272*4882a593Smuzhiyun					regulator-suspend-microvolt = <1800000>;
273*4882a593Smuzhiyun				};
274*4882a593Smuzhiyun			};
275*4882a593Smuzhiyun
276*4882a593Smuzhiyun			vccio_wl: LDO_REG8 {
277*4882a593Smuzhiyun				regulator-always-on;
278*4882a593Smuzhiyun				regulator-boot-on;
279*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
280*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
281*4882a593Smuzhiyun				regulator-name = "vccio_wl";
282*4882a593Smuzhiyun				regulator-state-mem {
283*4882a593Smuzhiyun					regulator-on-in-suspend;
284*4882a593Smuzhiyun					regulator-suspend-microvolt = <3300000>;
285*4882a593Smuzhiyun				};
286*4882a593Smuzhiyun			};
287*4882a593Smuzhiyun
288*4882a593Smuzhiyun			vccio_sd: LDO_REG9 {
289*4882a593Smuzhiyun				regulator-always-on;
290*4882a593Smuzhiyun				regulator-boot-on;
291*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
292*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
293*4882a593Smuzhiyun				regulator-name = "vccio_sd";
294*4882a593Smuzhiyun				regulator-state-mem {
295*4882a593Smuzhiyun					regulator-on-in-suspend;
296*4882a593Smuzhiyun					regulator-suspend-microvolt = <3300000>;
297*4882a593Smuzhiyun				};
298*4882a593Smuzhiyun			};
299*4882a593Smuzhiyun
300*4882a593Smuzhiyun			vcc_sd: SWITCH_REG {
301*4882a593Smuzhiyun				regulator-always-on;
302*4882a593Smuzhiyun				regulator-boot-on;
303*4882a593Smuzhiyun				regulator-name = "vcc_sd";
304*4882a593Smuzhiyun				regulator-state-mem {
305*4882a593Smuzhiyun					regulator-on-in-suspend;
306*4882a593Smuzhiyun				};
307*4882a593Smuzhiyun			};
308*4882a593Smuzhiyun		};
309*4882a593Smuzhiyun	};
310*4882a593Smuzhiyun};
311*4882a593Smuzhiyun
312*4882a593Smuzhiyun&i2c1 {
313*4882a593Smuzhiyun	status = "okay";
314*4882a593Smuzhiyun	clock-frequency = <400000>;
315*4882a593Smuzhiyun
316*4882a593Smuzhiyun	mpu6050@68 {
317*4882a593Smuzhiyun		compatible = "invensense,mpu6050";
318*4882a593Smuzhiyun		status = "okay";
319*4882a593Smuzhiyun		pinctrl-names = "default";
320*4882a593Smuzhiyun		pinctrl-0 = <&mpu6050_irq_gpio>;
321*4882a593Smuzhiyun		reg = <0x68>;
322*4882a593Smuzhiyun		irq-gpio = <&gpio8 0 IRQ_TYPE_EDGE_RISING>;
323*4882a593Smuzhiyun		mpu-int_config = <0x10>;
324*4882a593Smuzhiyun		mpu-level_shifter = <0>;
325*4882a593Smuzhiyun		mpu-orientation = <0 1 0 1 0 0 0 0 1>;
326*4882a593Smuzhiyun		orientation-x= <0>;
327*4882a593Smuzhiyun		orientation-y= <1>;
328*4882a593Smuzhiyun		orientation-z= <0>;
329*4882a593Smuzhiyun		support-hw-poweroff = <1>;
330*4882a593Smuzhiyun		mpu-debug = <1>;
331*4882a593Smuzhiyun	};
332*4882a593Smuzhiyun};
333*4882a593Smuzhiyun
334*4882a593Smuzhiyun&lvds_panel {
335*4882a593Smuzhiyun	power-supply = <&vcc_lcd>;
336*4882a593Smuzhiyun};
337*4882a593Smuzhiyun
338*4882a593Smuzhiyun&dsi0 {
339*4882a593Smuzhiyun	status = "okay";
340*4882a593Smuzhiyun	rockchip,lane-rate = <1000>;
341*4882a593Smuzhiyun
342*4882a593Smuzhiyun	panel: panel {
343*4882a593Smuzhiyun		compatible = "simple-panel-dsi";
344*4882a593Smuzhiyun		reg = <0>;
345*4882a593Smuzhiyun		power-supply = <&vcc_lcd>;
346*4882a593Smuzhiyun		dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST)>;
347*4882a593Smuzhiyun		dsi,format = <MIPI_DSI_FMT_RGB888>;
348*4882a593Smuzhiyun		dsi,lanes = <4>;
349*4882a593Smuzhiyun		reset-delay-ms = <20>;
350*4882a593Smuzhiyun		init-delay-ms = <20>;
351*4882a593Smuzhiyun		enable-delay-ms = <120>;
352*4882a593Smuzhiyun		prepare-delay-ms = <120>;
353*4882a593Smuzhiyun		status = "okay";
354*4882a593Smuzhiyun
355*4882a593Smuzhiyun		disp_timings: display-timings {
356*4882a593Smuzhiyun			native-mode = <&timing0>;
357*4882a593Smuzhiyun
358*4882a593Smuzhiyun			timing0: timing0 {
359*4882a593Smuzhiyun				clock-frequency = <150000000>;
360*4882a593Smuzhiyun				hactive = <1200>;
361*4882a593Smuzhiyun				vactive = <1920>;
362*4882a593Smuzhiyun				hback-porch = <80>;
363*4882a593Smuzhiyun				hfront-porch = <81>;
364*4882a593Smuzhiyun				vback-porch = <21>;
365*4882a593Smuzhiyun				vfront-porch = <21>;
366*4882a593Smuzhiyun				hsync-len = <10>;
367*4882a593Smuzhiyun				vsync-len = <3>;
368*4882a593Smuzhiyun				hsync-active = <0>;
369*4882a593Smuzhiyun				vsync-active = <0>;
370*4882a593Smuzhiyun				de-active = <0>;
371*4882a593Smuzhiyun				pixelclk-active = <0>;
372*4882a593Smuzhiyun			};
373*4882a593Smuzhiyun		};
374*4882a593Smuzhiyun	};
375*4882a593Smuzhiyun};
376*4882a593Smuzhiyun
377*4882a593Smuzhiyun&route_dsi0 {
378*4882a593Smuzhiyun	status = "okay";
379*4882a593Smuzhiyun	connect = <&vopl_out_dsi0>;
380*4882a593Smuzhiyun};
381*4882a593Smuzhiyun
382*4882a593Smuzhiyun&dsi0_in_vopl {
383*4882a593Smuzhiyun	status = "okay";
384*4882a593Smuzhiyun};
385*4882a593Smuzhiyun
386*4882a593Smuzhiyun&dsi0_in_vopb {
387*4882a593Smuzhiyun	status = "disabled";
388*4882a593Smuzhiyun};
389*4882a593Smuzhiyun
390*4882a593Smuzhiyun&edp {
391*4882a593Smuzhiyun	status = "okay";
392*4882a593Smuzhiyun};
393*4882a593Smuzhiyun
394*4882a593Smuzhiyun&edp_panel {
395*4882a593Smuzhiyun	compatible ="lg,lp079qx1-sp0v", "simple-panel";
396*4882a593Smuzhiyun	backlight = <&backlight>;
397*4882a593Smuzhiyun	enable-gpios = <&gpio7 4 GPIO_ACTIVE_HIGH>;
398*4882a593Smuzhiyun	enable-delay-ms = <120>;
399*4882a593Smuzhiyun	pinctrl-0 = <&lcd_cs>;
400*4882a593Smuzhiyun	power-supply = <&vcc_lcd>;
401*4882a593Smuzhiyun	status = "okay";
402*4882a593Smuzhiyun
403*4882a593Smuzhiyun	display-timings {
404*4882a593Smuzhiyun		native-mode = <&F402>;
405*4882a593Smuzhiyun
406*4882a593Smuzhiyun		F402: timing0 {
407*4882a593Smuzhiyun			clock-frequency = <200000000>;
408*4882a593Smuzhiyun			hactive = <1536>;
409*4882a593Smuzhiyun			vactive = <2048>;
410*4882a593Smuzhiyun			hfront-porch = <12>;
411*4882a593Smuzhiyun			hsync-len = <16>;
412*4882a593Smuzhiyun			hback-porch = <48>;
413*4882a593Smuzhiyun			vfront-porch = <8>;
414*4882a593Smuzhiyun			vsync-len = <4>;
415*4882a593Smuzhiyun			vback-porch = <8>;
416*4882a593Smuzhiyun			hsync-active = <0>;
417*4882a593Smuzhiyun			vsync-active = <0>;
418*4882a593Smuzhiyun			de-active = <0>;
419*4882a593Smuzhiyun			pixelclk-active = <0>;
420*4882a593Smuzhiyun		};
421*4882a593Smuzhiyun	};
422*4882a593Smuzhiyun};
423*4882a593Smuzhiyun
424*4882a593Smuzhiyun&route_edp {
425*4882a593Smuzhiyun	status = "okay";
426*4882a593Smuzhiyun	connect = <&vopb_out_edp>;
427*4882a593Smuzhiyun};
428*4882a593Smuzhiyun
429*4882a593Smuzhiyun&edp_in_vopb {
430*4882a593Smuzhiyun	status = "okay";
431*4882a593Smuzhiyun};
432*4882a593Smuzhiyun
433*4882a593Smuzhiyun&edp_in_vopl {
434*4882a593Smuzhiyun	status = "disabled";
435*4882a593Smuzhiyun};
436*4882a593Smuzhiyun
437*4882a593Smuzhiyun&tsadc {
438*4882a593Smuzhiyun	rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */
439*4882a593Smuzhiyun};
440*4882a593Smuzhiyun
441*4882a593Smuzhiyun&pinctrl {
442*4882a593Smuzhiyun	lcd {
443*4882a593Smuzhiyun		lcd_en: lcd-en  {
444*4882a593Smuzhiyun			rockchip,pins = <7 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
445*4882a593Smuzhiyun		};
446*4882a593Smuzhiyun	};
447*4882a593Smuzhiyun
448*4882a593Smuzhiyun	mpu6050 {
449*4882a593Smuzhiyun		mpu6050_irq_gpio: mpu6050-irq-gpio {
450*4882a593Smuzhiyun			rockchip,pins = <8 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
451*4882a593Smuzhiyun		};
452*4882a593Smuzhiyun	};
453*4882a593Smuzhiyun
454*4882a593Smuzhiyun	pmic {
455*4882a593Smuzhiyun		pmic_int: pmic-int {
456*4882a593Smuzhiyun			rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>;
457*4882a593Smuzhiyun		};
458*4882a593Smuzhiyun		vsel1_gpio: vsel1-gpio {
459*4882a593Smuzhiyun			rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_down>;
460*4882a593Smuzhiyun		};
461*4882a593Smuzhiyun	};
462*4882a593Smuzhiyun};
463