1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Copyright (c) 2018 MundoReader S.L. 4*4882a593Smuzhiyun * Author: Heiko Stuebner <heiko.stuebner@bq.com> 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun/dts-v1/; 8*4882a593Smuzhiyun#include <dt-bindings/i2c/i2c.h> 9*4882a593Smuzhiyun#include <dt-bindings/input/input.h> 10*4882a593Smuzhiyun#include "rk3188.dtsi" 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun/ { 13*4882a593Smuzhiyun model = "BQ Edison2 Quad-Core"; 14*4882a593Smuzhiyun compatible = "mundoreader,bq-edison2qc", "rockchip,rk3188"; 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun memory@60000000 { 17*4882a593Smuzhiyun device_type = "memory"; 18*4882a593Smuzhiyun reg = <0x60000000 0x80000000>; 19*4882a593Smuzhiyun }; 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun backlight: backlight { 22*4882a593Smuzhiyun compatible = "pwm-backlight"; 23*4882a593Smuzhiyun power-supply = <&vsys>; 24*4882a593Smuzhiyun pwms = <&pwm1 0 25000>; 25*4882a593Smuzhiyun }; 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun gpio-keys { 28*4882a593Smuzhiyun compatible = "gpio-keys"; 29*4882a593Smuzhiyun autorepeat; 30*4882a593Smuzhiyun pinctrl-names = "default"; 31*4882a593Smuzhiyun pinctrl-0 = <&pwr_key &usb_int>; 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun power { 34*4882a593Smuzhiyun gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>; 35*4882a593Smuzhiyun linux,code = <KEY_POWER>; 36*4882a593Smuzhiyun label = "GPIO Key Power"; 37*4882a593Smuzhiyun linux,input-type = <1>; 38*4882a593Smuzhiyun debounce-interval = <100>; 39*4882a593Smuzhiyun wakeup-source; 40*4882a593Smuzhiyun }; 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun wake_on_usb: wake-on-usb { 43*4882a593Smuzhiyun label = "Wake-on-USB"; 44*4882a593Smuzhiyun gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>; 45*4882a593Smuzhiyun linux,code = <KEY_WAKEUP>; 46*4882a593Smuzhiyun wakeup-source; 47*4882a593Smuzhiyun }; 48*4882a593Smuzhiyun }; 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun gpio-poweroff { 51*4882a593Smuzhiyun compatible = "gpio-poweroff"; 52*4882a593Smuzhiyun gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_LOW>; 53*4882a593Smuzhiyun pinctrl-names = "default"; 54*4882a593Smuzhiyun pinctrl-0 = <&pwr_hold>; 55*4882a593Smuzhiyun /* only drive the pin low until device is off */ 56*4882a593Smuzhiyun active-delay-ms = <3000>; 57*4882a593Smuzhiyun }; 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun lvds-encoder { 60*4882a593Smuzhiyun compatible = "ti,sn75lvds83", "lvds-encoder"; 61*4882a593Smuzhiyun 62*4882a593Smuzhiyun ports { 63*4882a593Smuzhiyun #address-cells = <1>; 64*4882a593Smuzhiyun #size-cells = <0>; 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun port@0 { 67*4882a593Smuzhiyun reg = <0>; 68*4882a593Smuzhiyun 69*4882a593Smuzhiyun lvds_in_vop0: endpoint { 70*4882a593Smuzhiyun remote-endpoint = <&vop0_out_lvds>; 71*4882a593Smuzhiyun }; 72*4882a593Smuzhiyun }; 73*4882a593Smuzhiyun 74*4882a593Smuzhiyun port@1 { 75*4882a593Smuzhiyun reg = <1>; 76*4882a593Smuzhiyun 77*4882a593Smuzhiyun lvds_out_panel: endpoint { 78*4882a593Smuzhiyun remote-endpoint = <&panel_in_lvds>; 79*4882a593Smuzhiyun }; 80*4882a593Smuzhiyun }; 81*4882a593Smuzhiyun }; 82*4882a593Smuzhiyun }; 83*4882a593Smuzhiyun 84*4882a593Smuzhiyun panel { 85*4882a593Smuzhiyun compatible = "innolux,ee101ia-01d", "panel-lvds"; 86*4882a593Smuzhiyun backlight = <&backlight>; 87*4882a593Smuzhiyun 88*4882a593Smuzhiyun /* pin LCD_CS, Nshtdn input of lvds-encoder */ 89*4882a593Smuzhiyun enable-gpios = <&gpio3 RK_PD6 GPIO_ACTIVE_HIGH>; 90*4882a593Smuzhiyun pinctrl-names = "default"; 91*4882a593Smuzhiyun pinctrl-0 = <&lcd_cs>; 92*4882a593Smuzhiyun power-supply = <&vcc_lcd>; 93*4882a593Smuzhiyun 94*4882a593Smuzhiyun data-mapping = "vesa-24"; 95*4882a593Smuzhiyun height-mm = <163>; 96*4882a593Smuzhiyun width-mm = <261>; 97*4882a593Smuzhiyun 98*4882a593Smuzhiyun panel-timing { 99*4882a593Smuzhiyun clock-frequency = <72000000>; 100*4882a593Smuzhiyun hactive = <1280>; 101*4882a593Smuzhiyun vactive = <800>; 102*4882a593Smuzhiyun hback-porch = <160>; 103*4882a593Smuzhiyun hfront-porch = <16>; 104*4882a593Smuzhiyun hsync-len = <10>; 105*4882a593Smuzhiyun vback-porch = <23>; 106*4882a593Smuzhiyun vfront-porch = <12>; 107*4882a593Smuzhiyun vsync-len = <3>; 108*4882a593Smuzhiyun }; 109*4882a593Smuzhiyun 110*4882a593Smuzhiyun port { 111*4882a593Smuzhiyun panel_in_lvds: endpoint { 112*4882a593Smuzhiyun remote-endpoint = <&lvds_out_panel>; 113*4882a593Smuzhiyun }; 114*4882a593Smuzhiyun }; 115*4882a593Smuzhiyun }; 116*4882a593Smuzhiyun 117*4882a593Smuzhiyun sdio_pwrseq: sdio-pwrseq { 118*4882a593Smuzhiyun compatible = "mmc-pwrseq-simple"; 119*4882a593Smuzhiyun clocks = <&hym8563>; 120*4882a593Smuzhiyun clock-names = "ext_clock"; 121*4882a593Smuzhiyun pinctrl-names = "default"; 122*4882a593Smuzhiyun pinctrl-0 = <&wifi_reg_on>; 123*4882a593Smuzhiyun reset-gpios = <&gpio3 RK_PD0 GPIO_ACTIVE_LOW>; 124*4882a593Smuzhiyun }; 125*4882a593Smuzhiyun 126*4882a593Smuzhiyun avdd_cif: cif-avdd-regulator { 127*4882a593Smuzhiyun compatible = "regulator-fixed"; 128*4882a593Smuzhiyun regulator-name = "avdd-cif"; 129*4882a593Smuzhiyun regulator-min-microvolt = <2800000>; 130*4882a593Smuzhiyun regulator-max-microvolt = <2800000>; 131*4882a593Smuzhiyun gpio = <&gpio1 RK_PA6 GPIO_ACTIVE_LOW>; 132*4882a593Smuzhiyun pinctrl-names = "default"; 133*4882a593Smuzhiyun pinctrl-0 = <&cif_avdd_en>; 134*4882a593Smuzhiyun startup-delay-us = <100000>; 135*4882a593Smuzhiyun vin-supply = <&vcc28_cif>; 136*4882a593Smuzhiyun }; 137*4882a593Smuzhiyun 138*4882a593Smuzhiyun vcc_5v: vcc-5v-regulator { 139*4882a593Smuzhiyun compatible = "regulator-fixed"; 140*4882a593Smuzhiyun regulator-name = "vcc-5v"; 141*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 142*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 143*4882a593Smuzhiyun enable-active-high; 144*4882a593Smuzhiyun gpio = <&gpio0 RK_PA3 GPIO_ACTIVE_HIGH>; 145*4882a593Smuzhiyun pinctrl-names = "default"; 146*4882a593Smuzhiyun pinctrl-0 = <&v5_drv>; 147*4882a593Smuzhiyun vin-supply = <&vsys>; 148*4882a593Smuzhiyun }; 149*4882a593Smuzhiyun 150*4882a593Smuzhiyun vcc_lcd: lcd-regulator { 151*4882a593Smuzhiyun compatible = "regulator-fixed"; 152*4882a593Smuzhiyun regulator-name = "vcc-lcd"; 153*4882a593Smuzhiyun gpio = <&gpio0 RK_PB0 GPIO_ACTIVE_LOW>; 154*4882a593Smuzhiyun pinctrl-names = "default"; 155*4882a593Smuzhiyun pinctrl-0 = <&lcd_en>; 156*4882a593Smuzhiyun startup-delay-us = <50000>; 157*4882a593Smuzhiyun vin-supply = <&vcc_io>; 158*4882a593Smuzhiyun }; 159*4882a593Smuzhiyun 160*4882a593Smuzhiyun vcc_otg: usb-otg-regulator { 161*4882a593Smuzhiyun compatible = "regulator-fixed"; 162*4882a593Smuzhiyun regulator-name = "vcc-otg"; 163*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 164*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 165*4882a593Smuzhiyun enable-active-high; 166*4882a593Smuzhiyun gpio = <&gpio3 RK_PB1 GPIO_ACTIVE_HIGH>; 167*4882a593Smuzhiyun pinctrl-names = "default"; 168*4882a593Smuzhiyun pinctrl-0 = <&otg_drv>; 169*4882a593Smuzhiyun startup-delay-us = <100000>; 170*4882a593Smuzhiyun vin-supply = <&vcc_5v>; 171*4882a593Smuzhiyun }; 172*4882a593Smuzhiyun 173*4882a593Smuzhiyun vcc_sd: sdmmc-regulator { 174*4882a593Smuzhiyun compatible = "regulator-fixed"; 175*4882a593Smuzhiyun regulator-name = "vcc-sd"; 176*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 177*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 178*4882a593Smuzhiyun gpio = <&gpio3 RK_PA1 GPIO_ACTIVE_LOW>; 179*4882a593Smuzhiyun pinctrl-names = "default"; 180*4882a593Smuzhiyun pinctrl-0 = <&sdmmc_pwr>; 181*4882a593Smuzhiyun startup-delay-us = <100000>; 182*4882a593Smuzhiyun vin-supply = <&vcc_io>; 183*4882a593Smuzhiyun }; 184*4882a593Smuzhiyun 185*4882a593Smuzhiyun vccq_emmc: emmc-vccq-regulator { 186*4882a593Smuzhiyun compatible = "regulator-fixed"; 187*4882a593Smuzhiyun regulator-name = "vccq-emmc"; 188*4882a593Smuzhiyun regulator-min-microvolt = <2800000>; 189*4882a593Smuzhiyun regulator-max-microvolt = <2800000>; 190*4882a593Smuzhiyun vin-supply = <&vcc_io>; 191*4882a593Smuzhiyun }; 192*4882a593Smuzhiyun 193*4882a593Smuzhiyun /* supplied from the bq24196 */ 194*4882a593Smuzhiyun vsys: vsys-regulator { 195*4882a593Smuzhiyun compatible = "regulator-fixed"; 196*4882a593Smuzhiyun regulator-name = "vsys"; 197*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 198*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 199*4882a593Smuzhiyun regulator-boot-on; 200*4882a593Smuzhiyun }; 201*4882a593Smuzhiyun}; 202*4882a593Smuzhiyun 203*4882a593Smuzhiyun&cpu0 { 204*4882a593Smuzhiyun cpu-supply = <&vdd_arm>; 205*4882a593Smuzhiyun}; 206*4882a593Smuzhiyun 207*4882a593Smuzhiyun&cpu1 { 208*4882a593Smuzhiyun cpu-supply = <&vdd_arm>; 209*4882a593Smuzhiyun}; 210*4882a593Smuzhiyun 211*4882a593Smuzhiyun&cpu2 { 212*4882a593Smuzhiyun cpu-supply = <&vdd_arm>; 213*4882a593Smuzhiyun}; 214*4882a593Smuzhiyun 215*4882a593Smuzhiyun&cpu3 { 216*4882a593Smuzhiyun cpu-supply = <&vdd_arm>; 217*4882a593Smuzhiyun}; 218*4882a593Smuzhiyun 219*4882a593Smuzhiyun&cru { 220*4882a593Smuzhiyun assigned-clocks = <&cru PLL_GPLL>, <&cru PLL_CPLL>, 221*4882a593Smuzhiyun <&cru ACLK_CPU>, 222*4882a593Smuzhiyun <&cru HCLK_CPU>, <&cru PCLK_CPU>, 223*4882a593Smuzhiyun <&cru ACLK_PERI>, <&cru HCLK_PERI>, 224*4882a593Smuzhiyun <&cru PCLK_PERI>; 225*4882a593Smuzhiyun assigned-clock-rates = <594000000>, <504000000>, 226*4882a593Smuzhiyun <300000000>, 227*4882a593Smuzhiyun <150000000>, <75000000>, 228*4882a593Smuzhiyun <300000000>, <150000000>, 229*4882a593Smuzhiyun <75000000>; 230*4882a593Smuzhiyun}; 231*4882a593Smuzhiyun 232*4882a593Smuzhiyun&emmc { 233*4882a593Smuzhiyun bus-width = <8>; 234*4882a593Smuzhiyun cap-mmc-highspeed; 235*4882a593Smuzhiyun non-removable; 236*4882a593Smuzhiyun pinctrl-names = "default"; 237*4882a593Smuzhiyun pinctrl-0 = <&emmc_clk &emmc_cmd>; 238*4882a593Smuzhiyun vmmc-supply = <&vcc_io>; 239*4882a593Smuzhiyun vqmmc-supply = <&vccq_emmc>; 240*4882a593Smuzhiyun status = "okay"; 241*4882a593Smuzhiyun}; 242*4882a593Smuzhiyun 243*4882a593Smuzhiyun&gpu { 244*4882a593Smuzhiyun status = "okay"; 245*4882a593Smuzhiyun}; 246*4882a593Smuzhiyun 247*4882a593Smuzhiyun&i2c0 { 248*4882a593Smuzhiyun clock-frequency = <400000>; 249*4882a593Smuzhiyun status = "okay"; 250*4882a593Smuzhiyun 251*4882a593Smuzhiyun lis3de: accelerometer@29 { 252*4882a593Smuzhiyun compatible = "st,lis3de"; 253*4882a593Smuzhiyun reg = <0x29>; 254*4882a593Smuzhiyun interrupt-parent = <&gpio0>; 255*4882a593Smuzhiyun interrupts = <RK_PB7 IRQ_TYPE_EDGE_RISING>; 256*4882a593Smuzhiyun pinctrl-names = "default"; 257*4882a593Smuzhiyun pinctrl-0 = <&gsensor_int>; 258*4882a593Smuzhiyun rotation-matrix = "1", "0", "0", 259*4882a593Smuzhiyun "0", "-1", "0", 260*4882a593Smuzhiyun "0", "0", "1"; 261*4882a593Smuzhiyun vdd-supply = <&vcc_io>; 262*4882a593Smuzhiyun }; 263*4882a593Smuzhiyun}; 264*4882a593Smuzhiyun 265*4882a593Smuzhiyun&i2c1 { 266*4882a593Smuzhiyun clock-frequency = <400000>; 267*4882a593Smuzhiyun status = "okay"; 268*4882a593Smuzhiyun 269*4882a593Smuzhiyun tmp108@48 { 270*4882a593Smuzhiyun compatible = "ti,tmp108"; 271*4882a593Smuzhiyun reg = <0x48>; 272*4882a593Smuzhiyun interrupt-parent = <&gpio1>; 273*4882a593Smuzhiyun interrupts = <RK_PA7 IRQ_TYPE_LEVEL_LOW>; 274*4882a593Smuzhiyun pinctrl-names = "default"; 275*4882a593Smuzhiyun pinctrl-0 = <&tmp_alrt>; 276*4882a593Smuzhiyun #thermal-sensor-cells = <0>; 277*4882a593Smuzhiyun }; 278*4882a593Smuzhiyun 279*4882a593Smuzhiyun hym8563: rtc@51 { 280*4882a593Smuzhiyun compatible = "haoyu,hym8563"; 281*4882a593Smuzhiyun reg = <0x51>; 282*4882a593Smuzhiyun interrupt-parent = <&gpio0>; 283*4882a593Smuzhiyun interrupts = <RK_PB5 IRQ_TYPE_EDGE_FALLING>; 284*4882a593Smuzhiyun pinctrl-names = "default"; 285*4882a593Smuzhiyun pinctrl-0 = <&rtc_int>; 286*4882a593Smuzhiyun #clock-cells = <0>; 287*4882a593Smuzhiyun clock-output-names = "xin32k"; 288*4882a593Smuzhiyun }; 289*4882a593Smuzhiyun 290*4882a593Smuzhiyun bat: battery@55 { 291*4882a593Smuzhiyun compatible = "ti,bq27541"; 292*4882a593Smuzhiyun reg = <0x55>; 293*4882a593Smuzhiyun power-supplies = <&bq24196>; 294*4882a593Smuzhiyun }; 295*4882a593Smuzhiyun 296*4882a593Smuzhiyun act8846: pmic@5a { 297*4882a593Smuzhiyun compatible = "active-semi,act8846"; 298*4882a593Smuzhiyun reg = <0x5a>; 299*4882a593Smuzhiyun pinctrl-names = "default"; 300*4882a593Smuzhiyun pinctrl-0 = <&dvs0_ctl &pmic_int>; 301*4882a593Smuzhiyun 302*4882a593Smuzhiyun vp1-supply = <&vsys>; 303*4882a593Smuzhiyun vp2-supply = <&vsys>; 304*4882a593Smuzhiyun vp3-supply = <&vsys>; 305*4882a593Smuzhiyun vp4-supply = <&vsys>; 306*4882a593Smuzhiyun inl1-supply = <&vcc_io>; 307*4882a593Smuzhiyun inl2-supply = <&vsys>; 308*4882a593Smuzhiyun inl3-supply = <&vsys>; 309*4882a593Smuzhiyun 310*4882a593Smuzhiyun regulators { 311*4882a593Smuzhiyun vcc_ddr: REG1 { 312*4882a593Smuzhiyun regulator-name = "VCC_DDR"; 313*4882a593Smuzhiyun regulator-min-microvolt = <1200000>; 314*4882a593Smuzhiyun regulator-max-microvolt = <1200000>; 315*4882a593Smuzhiyun regulator-always-on; 316*4882a593Smuzhiyun }; 317*4882a593Smuzhiyun 318*4882a593Smuzhiyun vdd_log: REG2 { 319*4882a593Smuzhiyun regulator-name = "VDD_LOG"; 320*4882a593Smuzhiyun regulator-min-microvolt = <1000000>; 321*4882a593Smuzhiyun regulator-max-microvolt = <1200000>; 322*4882a593Smuzhiyun regulator-always-on; 323*4882a593Smuzhiyun }; 324*4882a593Smuzhiyun 325*4882a593Smuzhiyun vdd_arm: REG3 { 326*4882a593Smuzhiyun regulator-name = "VDD_ARM"; 327*4882a593Smuzhiyun regulator-min-microvolt = <875000>; 328*4882a593Smuzhiyun regulator-max-microvolt = <1350000>; 329*4882a593Smuzhiyun regulator-always-on; 330*4882a593Smuzhiyun }; 331*4882a593Smuzhiyun 332*4882a593Smuzhiyun vcc_io: vcc_hdmi: REG4 { 333*4882a593Smuzhiyun regulator-name = "VCC_IO"; 334*4882a593Smuzhiyun regulator-min-microvolt = <3000000>; 335*4882a593Smuzhiyun regulator-max-microvolt = <3000000>; 336*4882a593Smuzhiyun regulator-always-on; 337*4882a593Smuzhiyun }; 338*4882a593Smuzhiyun 339*4882a593Smuzhiyun vdd_10: REG5 { 340*4882a593Smuzhiyun regulator-name = "VDD_10"; 341*4882a593Smuzhiyun regulator-min-microvolt = <1000000>; 342*4882a593Smuzhiyun regulator-max-microvolt = <1000000>; 343*4882a593Smuzhiyun regulator-always-on; 344*4882a593Smuzhiyun }; 345*4882a593Smuzhiyun 346*4882a593Smuzhiyun vdd_12: REG6 { 347*4882a593Smuzhiyun regulator-name = "VDD_12"; 348*4882a593Smuzhiyun regulator-min-microvolt = <1200000>; 349*4882a593Smuzhiyun regulator-max-microvolt = <1200000>; 350*4882a593Smuzhiyun regulator-always-on; 351*4882a593Smuzhiyun }; 352*4882a593Smuzhiyun 353*4882a593Smuzhiyun vcc18_cif: REG7 { 354*4882a593Smuzhiyun regulator-name = "VCC18_CIF"; 355*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 356*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 357*4882a593Smuzhiyun regulator-always-on; 358*4882a593Smuzhiyun }; 359*4882a593Smuzhiyun 360*4882a593Smuzhiyun vcca_33: REG8 { 361*4882a593Smuzhiyun regulator-name = "VCCA_33"; 362*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 363*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 364*4882a593Smuzhiyun regulator-always-on; 365*4882a593Smuzhiyun }; 366*4882a593Smuzhiyun 367*4882a593Smuzhiyun vcc_tp: REG9 { 368*4882a593Smuzhiyun regulator-name = "VCC_TP"; 369*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 370*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 371*4882a593Smuzhiyun regulator-always-on; 372*4882a593Smuzhiyun }; 373*4882a593Smuzhiyun 374*4882a593Smuzhiyun vccio_wl: REG10 { 375*4882a593Smuzhiyun regulator-name = "VCCIO_WL"; 376*4882a593Smuzhiyun regulator-min-microvolt = <2800000>; 377*4882a593Smuzhiyun regulator-max-microvolt = <2800000>; 378*4882a593Smuzhiyun regulator-always-on; 379*4882a593Smuzhiyun }; 380*4882a593Smuzhiyun 381*4882a593Smuzhiyun vcc_18: REG11 { 382*4882a593Smuzhiyun regulator-name = "VCC_18"; 383*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 384*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 385*4882a593Smuzhiyun regulator-always-on; 386*4882a593Smuzhiyun }; 387*4882a593Smuzhiyun 388*4882a593Smuzhiyun vcc28_cif: REG12 { 389*4882a593Smuzhiyun regulator-name = "VCC28_CIF"; 390*4882a593Smuzhiyun regulator-min-microvolt = <2800000>; 391*4882a593Smuzhiyun regulator-max-microvolt = <2800000>; 392*4882a593Smuzhiyun regulator-always-on; 393*4882a593Smuzhiyun }; 394*4882a593Smuzhiyun }; 395*4882a593Smuzhiyun }; 396*4882a593Smuzhiyun 397*4882a593Smuzhiyun bq24196: charger@6b { 398*4882a593Smuzhiyun compatible = "ti,bq24196"; 399*4882a593Smuzhiyun reg = <0x6b>; 400*4882a593Smuzhiyun interrupt-parent = <&gpio0>; 401*4882a593Smuzhiyun interrupts = <RK_PD7 IRQ_TYPE_EDGE_FALLING>; 402*4882a593Smuzhiyun pinctrl-names = "default"; 403*4882a593Smuzhiyun pinctrl-0 = <&charger_int &chg_ctl &otg_en>; 404*4882a593Smuzhiyun ti,system-minimum-microvolt = <3200000>; 405*4882a593Smuzhiyun monitored-battery = <&bat>; 406*4882a593Smuzhiyun omit-battery-class; 407*4882a593Smuzhiyun 408*4882a593Smuzhiyun usb_otg_vbus: usb-otg-vbus { }; 409*4882a593Smuzhiyun }; 410*4882a593Smuzhiyun}; 411*4882a593Smuzhiyun 412*4882a593Smuzhiyun&i2c2 { 413*4882a593Smuzhiyun clock-frequency = <400000>; 414*4882a593Smuzhiyun status = "okay"; 415*4882a593Smuzhiyun 416*4882a593Smuzhiyun ft5606: touchscreen@3e { 417*4882a593Smuzhiyun compatible = "edt,edt-ft5506"; 418*4882a593Smuzhiyun reg = <0x3e>; 419*4882a593Smuzhiyun interrupt-parent = <&gpio1>; 420*4882a593Smuzhiyun interrupts = <RK_PB7 IRQ_TYPE_EDGE_FALLING>; 421*4882a593Smuzhiyun pinctrl-names = "default"; 422*4882a593Smuzhiyun pinctrl-0 = <&tp_int &tp_rst>; 423*4882a593Smuzhiyun reset-gpios = <&gpio0 RK_PB6 GPIO_ACTIVE_LOW>; 424*4882a593Smuzhiyun touchscreen-inverted-y; 425*4882a593Smuzhiyun /* hw ts resolution does not match display */ 426*4882a593Smuzhiyun touchscreen-size-y = <1024>; 427*4882a593Smuzhiyun touchscreen-size-x = <768>; 428*4882a593Smuzhiyun touchscreen-swapped-x-y; 429*4882a593Smuzhiyun }; 430*4882a593Smuzhiyun}; 431*4882a593Smuzhiyun 432*4882a593Smuzhiyun&i2c3 { 433*4882a593Smuzhiyun clock-frequency = <400000>; 434*4882a593Smuzhiyun status = "okay"; 435*4882a593Smuzhiyun}; 436*4882a593Smuzhiyun 437*4882a593Smuzhiyun&i2c4 { 438*4882a593Smuzhiyun clock-frequency = <400000>; 439*4882a593Smuzhiyun status = "okay"; 440*4882a593Smuzhiyun 441*4882a593Smuzhiyun rt5616: codec@1b { 442*4882a593Smuzhiyun compatible = "realtek,rt5616"; 443*4882a593Smuzhiyun reg = <0x1b>; 444*4882a593Smuzhiyun clocks = <&cru SCLK_I2S0>; 445*4882a593Smuzhiyun clock-names = "mclk"; 446*4882a593Smuzhiyun #sound-dai-cells = <0>; 447*4882a593Smuzhiyun }; 448*4882a593Smuzhiyun}; 449*4882a593Smuzhiyun 450*4882a593Smuzhiyun&i2s0 { 451*4882a593Smuzhiyun status = "okay"; 452*4882a593Smuzhiyun}; 453*4882a593Smuzhiyun 454*4882a593Smuzhiyun&mmc0 { 455*4882a593Smuzhiyun bus-width = <4>; 456*4882a593Smuzhiyun cap-mmc-highspeed; 457*4882a593Smuzhiyun cap-sd-highspeed; 458*4882a593Smuzhiyun disable-wp; 459*4882a593Smuzhiyun pinctrl-names = "default"; 460*4882a593Smuzhiyun pinctrl-0 = <&sd0_clk>, <&sd0_cmd>, <&sd0_cd>, <&sd0_bus4>; 461*4882a593Smuzhiyun vmmc-supply = <&vcc_sd>; 462*4882a593Smuzhiyun status = "okay"; 463*4882a593Smuzhiyun}; 464*4882a593Smuzhiyun 465*4882a593Smuzhiyun&mmc1 { 466*4882a593Smuzhiyun bus-width = <4>; 467*4882a593Smuzhiyun cap-sd-highspeed; 468*4882a593Smuzhiyun keep-power-in-suspend; 469*4882a593Smuzhiyun mmc-pwrseq = <&sdio_pwrseq>; 470*4882a593Smuzhiyun non-removable; 471*4882a593Smuzhiyun pinctrl-names = "default"; 472*4882a593Smuzhiyun pinctrl-0 = <&sd1_clk>, <&sd1_cmd>, <&sd1_bus4>; 473*4882a593Smuzhiyun vqmmc-supply = <&vccio_wl>; 474*4882a593Smuzhiyun #address-cells = <1>; 475*4882a593Smuzhiyun #size-cells = <0>; 476*4882a593Smuzhiyun status = "okay"; 477*4882a593Smuzhiyun 478*4882a593Smuzhiyun brcmf: wifi@1 { 479*4882a593Smuzhiyun reg = <1>; 480*4882a593Smuzhiyun compatible = "brcm,bcm4329-fmac"; 481*4882a593Smuzhiyun interrupt-parent = <&gpio3>; 482*4882a593Smuzhiyun interrupts = <RK_PD2 GPIO_ACTIVE_HIGH>; 483*4882a593Smuzhiyun interrupt-names = "host-wake"; 484*4882a593Smuzhiyun brcm,drive-strength = <5>; 485*4882a593Smuzhiyun pinctrl-names = "default"; 486*4882a593Smuzhiyun pinctrl-0 = <&wifi_host_wake>; 487*4882a593Smuzhiyun }; 488*4882a593Smuzhiyun}; 489*4882a593Smuzhiyun 490*4882a593Smuzhiyun&pwm1 { 491*4882a593Smuzhiyun status = "okay"; 492*4882a593Smuzhiyun}; 493*4882a593Smuzhiyun 494*4882a593Smuzhiyun&pinctrl { 495*4882a593Smuzhiyun pcfg_output_high: pcfg-output-high { 496*4882a593Smuzhiyun output-high; 497*4882a593Smuzhiyun }; 498*4882a593Smuzhiyun 499*4882a593Smuzhiyun pcfg_output_low: pcfg-output-low { 500*4882a593Smuzhiyun output-low; 501*4882a593Smuzhiyun }; 502*4882a593Smuzhiyun 503*4882a593Smuzhiyun act8846 { 504*4882a593Smuzhiyun dvs0_ctl: dvs0-ctl { 505*4882a593Smuzhiyun rockchip,pins = <3 RK_PD3 RK_FUNC_GPIO &pcfg_output_low>; 506*4882a593Smuzhiyun }; 507*4882a593Smuzhiyun 508*4882a593Smuzhiyun pmic_int: pmic-int { 509*4882a593Smuzhiyun rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_up>; 510*4882a593Smuzhiyun }; 511*4882a593Smuzhiyun }; 512*4882a593Smuzhiyun 513*4882a593Smuzhiyun bq24196 { 514*4882a593Smuzhiyun charger_int: charger-int { 515*4882a593Smuzhiyun rockchip,pins = <0 RK_PD7 RK_FUNC_GPIO &pcfg_pull_up>; 516*4882a593Smuzhiyun }; 517*4882a593Smuzhiyun 518*4882a593Smuzhiyun /* pin hog to make it select usb profile */ 519*4882a593Smuzhiyun chg_ctl: chg-ctl { 520*4882a593Smuzhiyun rockchip,pins = <0 RK_PA1 RK_FUNC_GPIO &pcfg_output_high>; 521*4882a593Smuzhiyun }; 522*4882a593Smuzhiyun 523*4882a593Smuzhiyun /* low: charging, high: complete, fault: blinking */ 524*4882a593Smuzhiyun chg_det: chg-det { 525*4882a593Smuzhiyun rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; 526*4882a593Smuzhiyun }; 527*4882a593Smuzhiyun 528*4882a593Smuzhiyun /* charging enabled when pin low and register set */ 529*4882a593Smuzhiyun chg_en: chg-en { 530*4882a593Smuzhiyun rockchip,pins = <0 RK_PC1 RK_FUNC_GPIO &pcfg_output_low>; 531*4882a593Smuzhiyun }; 532*4882a593Smuzhiyun 533*4882a593Smuzhiyun /* bq29196 powergood (when low) signal */ 534*4882a593Smuzhiyun dc_det: dc-det { 535*4882a593Smuzhiyun rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; 536*4882a593Smuzhiyun }; 537*4882a593Smuzhiyun 538*4882a593Smuzhiyun /* wire bq24196 otg pin to high, to enable 500mA charging */ 539*4882a593Smuzhiyun otg_en: otg-en { 540*4882a593Smuzhiyun rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_output_high>; 541*4882a593Smuzhiyun }; 542*4882a593Smuzhiyun }; 543*4882a593Smuzhiyun 544*4882a593Smuzhiyun camera { 545*4882a593Smuzhiyun cif0_pdn: cif0-pdn { 546*4882a593Smuzhiyun rockchip,pins = <3 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>; 547*4882a593Smuzhiyun }; 548*4882a593Smuzhiyun 549*4882a593Smuzhiyun cif1_pdn: cif1-pdn { 550*4882a593Smuzhiyun rockchip,pins = <3 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>; 551*4882a593Smuzhiyun }; 552*4882a593Smuzhiyun 553*4882a593Smuzhiyun cif_avdd_en: cif-avdd-en { 554*4882a593Smuzhiyun rockchip,pins = <1 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; 555*4882a593Smuzhiyun }; 556*4882a593Smuzhiyun }; 557*4882a593Smuzhiyun 558*4882a593Smuzhiyun display { 559*4882a593Smuzhiyun lcd_cs: lcd-cs { 560*4882a593Smuzhiyun rockchip,pins = <3 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>; 561*4882a593Smuzhiyun }; 562*4882a593Smuzhiyun 563*4882a593Smuzhiyun lcd_en: lcd-en { 564*4882a593Smuzhiyun rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; 565*4882a593Smuzhiyun }; 566*4882a593Smuzhiyun }; 567*4882a593Smuzhiyun 568*4882a593Smuzhiyun ft5606 { 569*4882a593Smuzhiyun tp_int: tp-int { 570*4882a593Smuzhiyun rockchip,pins = <1 RK_PB7 RK_FUNC_GPIO &pcfg_pull_up>; 571*4882a593Smuzhiyun }; 572*4882a593Smuzhiyun 573*4882a593Smuzhiyun tp_rst: tp-rst { 574*4882a593Smuzhiyun rockchip,pins = <0 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>; 575*4882a593Smuzhiyun }; 576*4882a593Smuzhiyun }; 577*4882a593Smuzhiyun 578*4882a593Smuzhiyun hdmi { 579*4882a593Smuzhiyun hdmi_int: hdmi-int { 580*4882a593Smuzhiyun rockchip,pins = <2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up>; 581*4882a593Smuzhiyun }; 582*4882a593Smuzhiyun 583*4882a593Smuzhiyun hdmi_rst: hdmi-rst { 584*4882a593Smuzhiyun rockchip,pins = <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; 585*4882a593Smuzhiyun }; 586*4882a593Smuzhiyun }; 587*4882a593Smuzhiyun 588*4882a593Smuzhiyun hym8563 { 589*4882a593Smuzhiyun rtc_int: rtc-int { 590*4882a593Smuzhiyun rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>; 591*4882a593Smuzhiyun }; 592*4882a593Smuzhiyun }; 593*4882a593Smuzhiyun 594*4882a593Smuzhiyun keys { 595*4882a593Smuzhiyun pwr_hold: pwr-hold { 596*4882a593Smuzhiyun rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>; 597*4882a593Smuzhiyun }; 598*4882a593Smuzhiyun 599*4882a593Smuzhiyun pwr_key: pwr-key { 600*4882a593Smuzhiyun rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>; 601*4882a593Smuzhiyun }; 602*4882a593Smuzhiyun }; 603*4882a593Smuzhiyun 604*4882a593Smuzhiyun lis3de { 605*4882a593Smuzhiyun gsensor_int: gsensor-int { 606*4882a593Smuzhiyun rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; 607*4882a593Smuzhiyun }; 608*4882a593Smuzhiyun }; 609*4882a593Smuzhiyun 610*4882a593Smuzhiyun mmc { 611*4882a593Smuzhiyun sdmmc_pwr: sdmmc-pwr { 612*4882a593Smuzhiyun rockchip,pins = <3 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>; 613*4882a593Smuzhiyun }; 614*4882a593Smuzhiyun }; 615*4882a593Smuzhiyun 616*4882a593Smuzhiyun tmp108 { 617*4882a593Smuzhiyun tmp_alrt: tmp-alrt { 618*4882a593Smuzhiyun rockchip,pins = <1 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>; 619*4882a593Smuzhiyun }; 620*4882a593Smuzhiyun }; 621*4882a593Smuzhiyun 622*4882a593Smuzhiyun usb { 623*4882a593Smuzhiyun v5_drv: v5-drv { 624*4882a593Smuzhiyun rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>; 625*4882a593Smuzhiyun }; 626*4882a593Smuzhiyun 627*4882a593Smuzhiyun otg_drv: otg-drv { 628*4882a593Smuzhiyun rockchip,pins = <3 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; 629*4882a593Smuzhiyun }; 630*4882a593Smuzhiyun 631*4882a593Smuzhiyun usb_int: usb-int { 632*4882a593Smuzhiyun rockchip,pins = <0 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>; 633*4882a593Smuzhiyun }; 634*4882a593Smuzhiyun }; 635*4882a593Smuzhiyun 636*4882a593Smuzhiyun rk903 { 637*4882a593Smuzhiyun bt_host_wake: bt-host-wake { 638*4882a593Smuzhiyun rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>; 639*4882a593Smuzhiyun }; 640*4882a593Smuzhiyun 641*4882a593Smuzhiyun bt_reg_on: bt-reg-on { 642*4882a593Smuzhiyun rockchip,pins = <3 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>; 643*4882a593Smuzhiyun }; 644*4882a593Smuzhiyun 645*4882a593Smuzhiyun /* pin hog to pull the reset high */ 646*4882a593Smuzhiyun bt_rst: bt-rst { 647*4882a593Smuzhiyun rockchip,pins = <3 RK_PD1 RK_FUNC_GPIO &pcfg_output_high>; 648*4882a593Smuzhiyun }; 649*4882a593Smuzhiyun 650*4882a593Smuzhiyun bt_wake: bt-wake { 651*4882a593Smuzhiyun rockchip,pins = <3 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; 652*4882a593Smuzhiyun }; 653*4882a593Smuzhiyun 654*4882a593Smuzhiyun wifi_host_wake: wifi-host-wake { 655*4882a593Smuzhiyun rockchip,pins = <3 RK_PD2 RK_FUNC_GPIO &pcfg_pull_up>; 656*4882a593Smuzhiyun }; 657*4882a593Smuzhiyun 658*4882a593Smuzhiyun wifi_reg_on: wifi-reg-on { 659*4882a593Smuzhiyun rockchip,pins = <3 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>; 660*4882a593Smuzhiyun }; 661*4882a593Smuzhiyun }; 662*4882a593Smuzhiyun}; 663*4882a593Smuzhiyun 664*4882a593Smuzhiyun&saradc { 665*4882a593Smuzhiyun vref-supply = <&vcc_18>; 666*4882a593Smuzhiyun status = "okay"; 667*4882a593Smuzhiyun}; 668*4882a593Smuzhiyun 669*4882a593Smuzhiyun&spdif { 670*4882a593Smuzhiyun status = "okay"; 671*4882a593Smuzhiyun}; 672*4882a593Smuzhiyun 673*4882a593Smuzhiyun&uart0 { 674*4882a593Smuzhiyun pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>; 675*4882a593Smuzhiyun status = "okay"; 676*4882a593Smuzhiyun 677*4882a593Smuzhiyun bluetooth { 678*4882a593Smuzhiyun compatible = "brcm,bcm43438-bt"; 679*4882a593Smuzhiyun max-speed = <2000000>; 680*4882a593Smuzhiyun device-wakeup-gpios = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>; 681*4882a593Smuzhiyun host-wakeup-gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>; 682*4882a593Smuzhiyun shutdown-gpios = <&gpio3 RK_PC7 GPIO_ACTIVE_HIGH>; 683*4882a593Smuzhiyun pinctrl-names = "default"; 684*4882a593Smuzhiyun pinctrl-0 = <&bt_host_wake &bt_reg_on &bt_rst &bt_wake>; 685*4882a593Smuzhiyun }; 686*4882a593Smuzhiyun}; 687*4882a593Smuzhiyun 688*4882a593Smuzhiyun&uart1 { 689*4882a593Smuzhiyun status = "okay"; 690*4882a593Smuzhiyun}; 691*4882a593Smuzhiyun 692*4882a593Smuzhiyun&uart2 { 693*4882a593Smuzhiyun status = "okay"; 694*4882a593Smuzhiyun}; 695*4882a593Smuzhiyun 696*4882a593Smuzhiyun&uart3 { 697*4882a593Smuzhiyun pinctrl-0 = <&uart3_xfer &uart3_cts &uart3_rts>; 698*4882a593Smuzhiyun status = "okay"; 699*4882a593Smuzhiyun}; 700*4882a593Smuzhiyun 701*4882a593Smuzhiyun&usbphy { 702*4882a593Smuzhiyun status = "okay"; 703*4882a593Smuzhiyun}; 704*4882a593Smuzhiyun 705*4882a593Smuzhiyun&usb_host { 706*4882a593Smuzhiyun status = "okay"; 707*4882a593Smuzhiyun}; 708*4882a593Smuzhiyun 709*4882a593Smuzhiyun&usb_otg { 710*4882a593Smuzhiyun status = "okay"; 711*4882a593Smuzhiyun}; 712*4882a593Smuzhiyun 713*4882a593Smuzhiyun&vop0 { 714*4882a593Smuzhiyun status = "okay"; 715*4882a593Smuzhiyun}; 716*4882a593Smuzhiyun 717*4882a593Smuzhiyun&vop0_out { 718*4882a593Smuzhiyun vop0_out_lvds: endpoint { 719*4882a593Smuzhiyun remote-endpoint = <&lvds_in_vop0>; 720*4882a593Smuzhiyun }; 721*4882a593Smuzhiyun}; 722*4882a593Smuzhiyun 723*4882a593Smuzhiyun&vop1 { 724*4882a593Smuzhiyun pinctrl-names = "default"; 725*4882a593Smuzhiyun pinctrl-0 = <&lcdc1_dclk &lcdc1_den &lcdc1_hsync 726*4882a593Smuzhiyun &lcdc1_vsync &lcdc1_rgb24>; 727*4882a593Smuzhiyun status = "okay"; 728*4882a593Smuzhiyun}; 729*4882a593Smuzhiyun 730*4882a593Smuzhiyun&wdt { 731*4882a593Smuzhiyun status = "okay"; 732*4882a593Smuzhiyun}; 733