xref: /OK3568_Linux_fs/kernel/scripts/dtc/include-prefixes/arm/rk3126-evb.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun/*
2*4882a593Smuzhiyun * This file is dual-licensed: you can use it either under the terms
3*4882a593Smuzhiyun * of the GPL or the X11 license, at your option. Note that this dual
4*4882a593Smuzhiyun * licensing only applies to this file, and not this project as a
5*4882a593Smuzhiyun * whole.
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun *  a) This file is free software; you can redistribute it and/or
8*4882a593Smuzhiyun *     modify it under the terms of the GNU General Public License as
9*4882a593Smuzhiyun *     published by the Free Software Foundation; either version 2 of the
10*4882a593Smuzhiyun *     License, or (at your option) any later version.
11*4882a593Smuzhiyun *
12*4882a593Smuzhiyun *     This file is distributed in the hope that it will be useful,
13*4882a593Smuzhiyun *     but WITHOUT ANY WARRANTY; without even the implied warranty of
14*4882a593Smuzhiyun *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15*4882a593Smuzhiyun *     GNU General Public License for more details.
16*4882a593Smuzhiyun *
17*4882a593Smuzhiyun *  Or, alternatively,
18*4882a593Smuzhiyun *
19*4882a593Smuzhiyun *  b) Permission is hereby granted, free of charge, to any person
20*4882a593Smuzhiyun *     obtaining a copy of this software and associated documentation
21*4882a593Smuzhiyun *     files (the "Software"), to deal in the Software without
22*4882a593Smuzhiyun *     restriction, including without limitation the rights to use,
23*4882a593Smuzhiyun *     copy, modify, merge, publish, distribute, sublicense, and/or
24*4882a593Smuzhiyun *     sell copies of the Software, and to permit persons to whom the
25*4882a593Smuzhiyun *     Software is furnished to do so, subject to the following
26*4882a593Smuzhiyun *     conditions:
27*4882a593Smuzhiyun *
28*4882a593Smuzhiyun *     The above copyright notice and this permission notice shall be
29*4882a593Smuzhiyun *     included in all copies or substantial portions of the Software.
30*4882a593Smuzhiyun *
31*4882a593Smuzhiyun *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
32*4882a593Smuzhiyun *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
33*4882a593Smuzhiyun *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
34*4882a593Smuzhiyun *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
35*4882a593Smuzhiyun *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
36*4882a593Smuzhiyun *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
37*4882a593Smuzhiyun *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
38*4882a593Smuzhiyun *     OTHER DEALINGS IN THE SOFTWARE.
39*4882a593Smuzhiyun */
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun/dts-v1/;
42*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h>
43*4882a593Smuzhiyun#include <dt-bindings/input/input.h>
44*4882a593Smuzhiyun#include <dt-bindings/pinctrl/rockchip.h>
45*4882a593Smuzhiyun#include <dt-bindings/pwm/pwm.h>
46*4882a593Smuzhiyun#include "rk3126.dtsi"
47*4882a593Smuzhiyun#include "rk312x-android.dtsi"
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun/ {
50*4882a593Smuzhiyun	model = "Rockchip RK3126 Evaluation board";
51*4882a593Smuzhiyun	compatible = "rockchip,rk3126";
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun	adc-keys {
54*4882a593Smuzhiyun		compatible = "adc-keys";
55*4882a593Smuzhiyun		io-channels = <&saradc 2>;
56*4882a593Smuzhiyun		io-channel-names = "buttons";
57*4882a593Smuzhiyun		poll-interval = <100>;
58*4882a593Smuzhiyun		keyup-threshold-microvolt = <3300000>;
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun		button-up {
61*4882a593Smuzhiyun			label = "Volume Up";
62*4882a593Smuzhiyun			linux,code = <KEY_VOLUMEUP>;
63*4882a593Smuzhiyun			press-threshold-microvolt = <0>;
64*4882a593Smuzhiyun		};
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun		button-down {
67*4882a593Smuzhiyun			label = "Volume Down";
68*4882a593Smuzhiyun			linux,code = <KEY_VOLUMEDOWN>;
69*4882a593Smuzhiyun			press-threshold-microvolt = <1650000>;
70*4882a593Smuzhiyun		};
71*4882a593Smuzhiyun	};
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun	backlight: backlight {
74*4882a593Smuzhiyun		compatible = "pwm-backlight";
75*4882a593Smuzhiyun		brightness-levels = <
76*4882a593Smuzhiyun			0   1   2   3   4   5   6   7
77*4882a593Smuzhiyun			8   9  10  11  12  13  14  15
78*4882a593Smuzhiyun			16  17  18  19  20  21  22  23
79*4882a593Smuzhiyun			24  25  26  27  28  29  30  31
80*4882a593Smuzhiyun			32  33  34  35  36  37  38  39
81*4882a593Smuzhiyun			40  41  42  43  44  45  46  47
82*4882a593Smuzhiyun			48  49  50  51  52  53  54  55
83*4882a593Smuzhiyun			56  57  58  59  60  61  62  63
84*4882a593Smuzhiyun			64  65  66  67  68  69  70  71
85*4882a593Smuzhiyun			72  73  74  75  76  77  78  79
86*4882a593Smuzhiyun			80  81  82  83  84  85  86  87
87*4882a593Smuzhiyun			88  89  90  91  92  93  94  95
88*4882a593Smuzhiyun			96  97  98  99 100 101 102 103
89*4882a593Smuzhiyun			104 105 106 107 108 109 110 111
90*4882a593Smuzhiyun			112 113 114 115 116 117 118 119
91*4882a593Smuzhiyun			120 121 122 123 124 125 126 127
92*4882a593Smuzhiyun			128 129 130 131 132 133 134 135
93*4882a593Smuzhiyun			136 137 138 139 140 141 142 143
94*4882a593Smuzhiyun			144 145 146 147 148 149 150 151
95*4882a593Smuzhiyun			152 153 154 155 156 157 158 159
96*4882a593Smuzhiyun			160 161 162 163 164 165 166 167
97*4882a593Smuzhiyun			168 169 170 171 172 173 174 175
98*4882a593Smuzhiyun			176 177 178 179 180 181 182 183
99*4882a593Smuzhiyun			184 185 186 187 188 189 190 191
100*4882a593Smuzhiyun			192 193 194 195 196 197 198 199
101*4882a593Smuzhiyun			200 201 202 203 204 205 206 207
102*4882a593Smuzhiyun			208 209 210 211 212 213 214 215
103*4882a593Smuzhiyun			216 217 218 219 220 221 222 223
104*4882a593Smuzhiyun			224 225 226 227 228 229 230 231
105*4882a593Smuzhiyun			232 233 234 235 236 237 238 239
106*4882a593Smuzhiyun			240 241 242 243 244 245 246 247
107*4882a593Smuzhiyun			248 249 250 251 252 253 254 255>;
108*4882a593Smuzhiyun		default-brightness-level = <128>;
109*4882a593Smuzhiyun		pwms = <&pwm0 0 1000000 PWM_POLARITY_INVERTED>;
110*4882a593Smuzhiyun		enable-gpios = <&gpio2 RK_PB2 GPIO_ACTIVE_HIGH>;
111*4882a593Smuzhiyun	};
112*4882a593Smuzhiyun
113*4882a593Smuzhiyun	panel {
114*4882a593Smuzhiyun		compatible ="simple-panel";
115*4882a593Smuzhiyun		backlight = <&backlight>;
116*4882a593Smuzhiyun		power-supply = <&ldo6>;
117*4882a593Smuzhiyun		power-invert;
118*4882a593Smuzhiyun		bus-format = <MEDIA_BUS_FMT_RGB666_1X18>;
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun		display-timings {
121*4882a593Smuzhiyun			native-mode = <&timing0>;
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun			timing0: timing0 {
124*4882a593Smuzhiyun				clock-frequency = <60000000>;
125*4882a593Smuzhiyun				hactive = <1024>;
126*4882a593Smuzhiyun				vactive = <600>;
127*4882a593Smuzhiyun				hback-porch = <100>;
128*4882a593Smuzhiyun				hfront-porch = <120>;
129*4882a593Smuzhiyun				vback-porch = <10>;
130*4882a593Smuzhiyun				vfront-porch = <15>;
131*4882a593Smuzhiyun				hsync-len = <100>;
132*4882a593Smuzhiyun				vsync-len = <10>;
133*4882a593Smuzhiyun				hsync-active = <0>;
134*4882a593Smuzhiyun				vsync-active = <0>;
135*4882a593Smuzhiyun				de-active = <0>;
136*4882a593Smuzhiyun				pixelclk-active = <0>;
137*4882a593Smuzhiyun			};
138*4882a593Smuzhiyun		};
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun		port {
141*4882a593Smuzhiyun			panel_in_rgb: endpoint {
142*4882a593Smuzhiyun				remote-endpoint = <&rgb_out_panel>;
143*4882a593Smuzhiyun			};
144*4882a593Smuzhiyun		};
145*4882a593Smuzhiyun	};
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun	vccadc_ref: vccadc-ref {
148*4882a593Smuzhiyun		compatible = "regulator-fixed";
149*4882a593Smuzhiyun		regulator-name = "SARADC_AVDD33";
150*4882a593Smuzhiyun		regulator-always-on;
151*4882a593Smuzhiyun		regulator-boot-on;
152*4882a593Smuzhiyun		regulator-min-microvolt = <3300000>;
153*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
154*4882a593Smuzhiyun	};
155*4882a593Smuzhiyun
156*4882a593Smuzhiyun	vcc_sys: vcc-sys {
157*4882a593Smuzhiyun		compatible = "regulator-fixed";
158*4882a593Smuzhiyun		regulator-name = "vcc_sys";
159*4882a593Smuzhiyun		regulator-min-microvolt = <4000000>;
160*4882a593Smuzhiyun		regulator-max-microvolt = <4000000>;
161*4882a593Smuzhiyun		regulator-always-on;
162*4882a593Smuzhiyun	};
163*4882a593Smuzhiyun
164*4882a593Smuzhiyun	xin32k: xin32k {
165*4882a593Smuzhiyun		compatible = "fixed-clock";
166*4882a593Smuzhiyun		clock-frequency = <32768>;
167*4882a593Smuzhiyun		clock-output-names = "xin32k";
168*4882a593Smuzhiyun		#clock-cells = <0>;
169*4882a593Smuzhiyun	};
170*4882a593Smuzhiyun};
171*4882a593Smuzhiyun
172*4882a593Smuzhiyun&cpu0 {
173*4882a593Smuzhiyun	cpu-supply = <&vdd_arm>;
174*4882a593Smuzhiyun};
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun&dmc {
177*4882a593Smuzhiyun	center-supply = <&vdd_log>;
178*4882a593Smuzhiyun};
179*4882a593Smuzhiyun
180*4882a593Smuzhiyun&emmc {
181*4882a593Smuzhiyun	bus-width = <8>;
182*4882a593Smuzhiyun	cap-mmc-highspeed;
183*4882a593Smuzhiyun	no-sdio;
184*4882a593Smuzhiyun	no-sd;
185*4882a593Smuzhiyun	disable-wp;
186*4882a593Smuzhiyun	non-removable;
187*4882a593Smuzhiyun	num-slots = <1>;
188*4882a593Smuzhiyun	pinctrl-names = "default";
189*4882a593Smuzhiyun	pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
190*4882a593Smuzhiyun	status = "okay";
191*4882a593Smuzhiyun};
192*4882a593Smuzhiyun
193*4882a593Smuzhiyun&gpu {
194*4882a593Smuzhiyun	status = "okay";
195*4882a593Smuzhiyun	mali-supply = <&vdd_log>;
196*4882a593Smuzhiyun};
197*4882a593Smuzhiyun
198*4882a593Smuzhiyun&i2c2 {
199*4882a593Smuzhiyun	status = "okay";
200*4882a593Smuzhiyun	clock-frequency = <400000>;
201*4882a593Smuzhiyun
202*4882a593Smuzhiyun	rk816: pmic@1a {
203*4882a593Smuzhiyun		compatible = "rockchip,rk816";
204*4882a593Smuzhiyun		reg = <0x1a>;
205*4882a593Smuzhiyun		interrupt-parent = <&gpio0>;
206*4882a593Smuzhiyun		interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
207*4882a593Smuzhiyun		pinctrl-names = "default";
208*4882a593Smuzhiyun		pinctrl-0 = <&pmic_int_l>;
209*4882a593Smuzhiyun		rockchip,system-power-controller;
210*4882a593Smuzhiyun		wakeup-source;
211*4882a593Smuzhiyun		gpio-controller;
212*4882a593Smuzhiyun		#gpio-cells = <2>;
213*4882a593Smuzhiyun		#clock-cells = <1>;
214*4882a593Smuzhiyun		clock-output-names = "rk816-clkout1", "rk816-clkout2";
215*4882a593Smuzhiyun		extcon = <&u2phy>;
216*4882a593Smuzhiyun
217*4882a593Smuzhiyun		vcc1-supply = <&vcc_sys>;
218*4882a593Smuzhiyun		vcc2-supply = <&vcc_sys>;
219*4882a593Smuzhiyun		vcc3-supply = <&vcc_sys>;
220*4882a593Smuzhiyun		vcc4-supply = <&vcc_sys>;
221*4882a593Smuzhiyun		vcc5-supply = <&vcc_io>;
222*4882a593Smuzhiyun		vcc6-supply = <&vcc_sys>;
223*4882a593Smuzhiyun
224*4882a593Smuzhiyun		gpio {
225*4882a593Smuzhiyun			status = "okay";
226*4882a593Smuzhiyun		};
227*4882a593Smuzhiyun
228*4882a593Smuzhiyun		pwrkey {
229*4882a593Smuzhiyun			status = "okay";
230*4882a593Smuzhiyun		};
231*4882a593Smuzhiyun
232*4882a593Smuzhiyun		rtc {
233*4882a593Smuzhiyun			status = "okay";
234*4882a593Smuzhiyun		};
235*4882a593Smuzhiyun
236*4882a593Smuzhiyun		battery {
237*4882a593Smuzhiyun			compatible = "rk816-battery";
238*4882a593Smuzhiyun			ocv_table = <3400 3654 3686 3710 3744 3775 3803
239*4882a593Smuzhiyun				     3825 3843 3858 3870 3886 3916 3955
240*4882a593Smuzhiyun				     3988 4010 4023 4032 4049 4080 4151>;
241*4882a593Smuzhiyun			design_capacity = <2000>;
242*4882a593Smuzhiyun			design_qmax = <2200>;
243*4882a593Smuzhiyun			bat_res = <120>;
244*4882a593Smuzhiyun			max_input_current = <2000>;
245*4882a593Smuzhiyun			max_chrg_current = <1000>;
246*4882a593Smuzhiyun			max_chrg_voltage = <4200>;
247*4882a593Smuzhiyun			sleep_enter_current = <300>;
248*4882a593Smuzhiyun			sleep_exit_current = <300>;
249*4882a593Smuzhiyun			sleep_filter_current = <100>;
250*4882a593Smuzhiyun			power_off_thresd = <3500>;
251*4882a593Smuzhiyun			zero_algorithm_vol = <3800>;
252*4882a593Smuzhiyun			fb_temperature = <105>;
253*4882a593Smuzhiyun			max_soc_offset = <60>;
254*4882a593Smuzhiyun			monitor_sec = <5>;
255*4882a593Smuzhiyun			virtual_power = <0>;
256*4882a593Smuzhiyun			energy_mode = <0>;
257*4882a593Smuzhiyun			power_dc2otg = <0>;
258*4882a593Smuzhiyun			dc_det_adc = <0>;
259*4882a593Smuzhiyun		};
260*4882a593Smuzhiyun
261*4882a593Smuzhiyun		regulators {
262*4882a593Smuzhiyun
263*4882a593Smuzhiyun			vdd_arm: DCDC_REG1{
264*4882a593Smuzhiyun				regulator-name= "vdd_arm";
265*4882a593Smuzhiyun				regulator-min-microvolt = <750000>;
266*4882a593Smuzhiyun				regulator-max-microvolt = <1500000>;
267*4882a593Smuzhiyun				regulator-ramp-delay = <6001>;
268*4882a593Smuzhiyun				regulator-always-on;
269*4882a593Smuzhiyun				regulator-boot-on;
270*4882a593Smuzhiyun				regulator-state-mem {
271*4882a593Smuzhiyun					regulator-on-in-suspend;
272*4882a593Smuzhiyun					regulator-suspend-microvolt = <900000>;
273*4882a593Smuzhiyun				};
274*4882a593Smuzhiyun			};
275*4882a593Smuzhiyun
276*4882a593Smuzhiyun			vdd_log: DCDC_REG2 {
277*4882a593Smuzhiyun				regulator-name= "vdd_logic";
278*4882a593Smuzhiyun				regulator-min-microvolt = <750000>;
279*4882a593Smuzhiyun				regulator-max-microvolt = <1500000>;
280*4882a593Smuzhiyun				regulator-ramp-delay = <6001>;
281*4882a593Smuzhiyun				regulator-always-on;
282*4882a593Smuzhiyun				regulator-boot-on;
283*4882a593Smuzhiyun				regulator-state-mem {
284*4882a593Smuzhiyun					regulator-on-in-suspend;
285*4882a593Smuzhiyun					regulator-suspend-microvolt = <1000000>;
286*4882a593Smuzhiyun				};
287*4882a593Smuzhiyun			};
288*4882a593Smuzhiyun
289*4882a593Smuzhiyun			vcc_ddr: DCDC_REG3 {
290*4882a593Smuzhiyun				regulator-name = "vcc_ddr";
291*4882a593Smuzhiyun				regulator-always-on;
292*4882a593Smuzhiyun				regulator-boot-on;
293*4882a593Smuzhiyun			};
294*4882a593Smuzhiyun
295*4882a593Smuzhiyun			vcc_io: DCDC_REG4 {
296*4882a593Smuzhiyun				regulator-name = "vcc_io";
297*4882a593Smuzhiyun				regulator-min-microvolt = <3300000>;
298*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
299*4882a593Smuzhiyun				regulator-always-on;
300*4882a593Smuzhiyun				regulator-boot-on;
301*4882a593Smuzhiyun				regulator-state-mem {
302*4882a593Smuzhiyun					regulator-on-in-suspend;
303*4882a593Smuzhiyun					regulator-suspend-microvolt = <3000000>;
304*4882a593Smuzhiyun				};
305*4882a593Smuzhiyun			};
306*4882a593Smuzhiyun
307*4882a593Smuzhiyun			vcc28_cif: LDO_REG1 {
308*4882a593Smuzhiyun				regulator-name = "vcc28_cif";
309*4882a593Smuzhiyun				regulator-min-microvolt = <2800000>;
310*4882a593Smuzhiyun				regulator-max-microvolt = <2800000>;
311*4882a593Smuzhiyun				regulator-always-on;
312*4882a593Smuzhiyun				regulator-boot-on;
313*4882a593Smuzhiyun				regulator-state-mem {
314*4882a593Smuzhiyun					regulator-off-in-suspend;
315*4882a593Smuzhiyun				};
316*4882a593Smuzhiyun			};
317*4882a593Smuzhiyun
318*4882a593Smuzhiyun			vcc18_cif: LDO_REG2 {
319*4882a593Smuzhiyun				regulator-name = "vcc18_cif";
320*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
321*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
322*4882a593Smuzhiyun				regulator-always-on;
323*4882a593Smuzhiyun				regulator-boot-on;
324*4882a593Smuzhiyun				regulator-state-mem {
325*4882a593Smuzhiyun					regulator-off-in-suspend;
326*4882a593Smuzhiyun				};
327*4882a593Smuzhiyun			};
328*4882a593Smuzhiyun
329*4882a593Smuzhiyun			vdd_11: LDO_REG3 {
330*4882a593Smuzhiyun				regulator-name = "vdd_11";
331*4882a593Smuzhiyun				regulator-min-microvolt = <1100000>;
332*4882a593Smuzhiyun				regulator-max-microvolt = <1100000>;
333*4882a593Smuzhiyun				regulator-always-on;
334*4882a593Smuzhiyun				regulator-boot-on;
335*4882a593Smuzhiyun				regulator-state-mem {
336*4882a593Smuzhiyun					regulator-on-in-suspend;
337*4882a593Smuzhiyun					regulator-suspend-microvolt = <1100000>;
338*4882a593Smuzhiyun				};
339*4882a593Smuzhiyun			};
340*4882a593Smuzhiyun
341*4882a593Smuzhiyun			ldo4: LDO_REG4 {
342*4882a593Smuzhiyun				regulator-name= "ldo4";
343*4882a593Smuzhiyun				regulator-min-microvolt = <3300000>;
344*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
345*4882a593Smuzhiyun				regulator-always-on;
346*4882a593Smuzhiyun				regulator-boot-on;
347*4882a593Smuzhiyun				regulator-state-mem {
348*4882a593Smuzhiyun					regulator-off-in-suspend;
349*4882a593Smuzhiyun				};
350*4882a593Smuzhiyun			};
351*4882a593Smuzhiyun
352*4882a593Smuzhiyun			ldo5: LDO_REG5 {
353*4882a593Smuzhiyun				regulator-name= "ldo5";
354*4882a593Smuzhiyun				regulator-min-microvolt = <3000000>;
355*4882a593Smuzhiyun				regulator-max-microvolt = <3000000>;
356*4882a593Smuzhiyun				regulator-always-on;
357*4882a593Smuzhiyun				regulator-boot-on;
358*4882a593Smuzhiyun				regulator-state-mem {
359*4882a593Smuzhiyun					regulator-off-in-suspend;
360*4882a593Smuzhiyun				};
361*4882a593Smuzhiyun			};
362*4882a593Smuzhiyun
363*4882a593Smuzhiyun			ldo6: LDO_REG6 {
364*4882a593Smuzhiyun				regulator-name= "ldo6";
365*4882a593Smuzhiyun				regulator-min-microvolt = <3300000>;
366*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
367*4882a593Smuzhiyun				regulator-state-mem {
368*4882a593Smuzhiyun					regulator-on-in-suspend;
369*4882a593Smuzhiyun					regulator-suspend-microvolt = <3300000>;
370*4882a593Smuzhiyun				};
371*4882a593Smuzhiyun			};
372*4882a593Smuzhiyun		};
373*4882a593Smuzhiyun	};
374*4882a593Smuzhiyun};
375*4882a593Smuzhiyun
376*4882a593Smuzhiyun&rgb {
377*4882a593Smuzhiyun	pinctrl-names = "default", "sleep";
378*4882a593Smuzhiyun	pinctrl-0 = <&lcdc_rgb_pins>;
379*4882a593Smuzhiyun	pinctrl-1 = <&lcdc_sleep_pins>;
380*4882a593Smuzhiyun	status = "okay";
381*4882a593Smuzhiyun
382*4882a593Smuzhiyun	ports {
383*4882a593Smuzhiyun		port@1 {
384*4882a593Smuzhiyun			reg = <1>;
385*4882a593Smuzhiyun
386*4882a593Smuzhiyun			rgb_out_panel: endpoint {
387*4882a593Smuzhiyun				remote-endpoint = <&panel_in_rgb>;
388*4882a593Smuzhiyun			};
389*4882a593Smuzhiyun		};
390*4882a593Smuzhiyun	};
391*4882a593Smuzhiyun};
392*4882a593Smuzhiyun
393*4882a593Smuzhiyun&pinctrl {
394*4882a593Smuzhiyun	lcdc {
395*4882a593Smuzhiyun		lcdc_rgb_pins: lcdc-rgb-pins {
396*4882a593Smuzhiyun			rockchip,pins =
397*4882a593Smuzhiyun				<2 RK_PB0 1 &pcfg_pull_none>, /* DCLK */
398*4882a593Smuzhiyun				<2 RK_PB3 1 &pcfg_pull_none>, /* DEN */
399*4882a593Smuzhiyun				<2 RK_PB4 1 &pcfg_pull_none>, /* DATA10 */
400*4882a593Smuzhiyun				<2 RK_PB5 1 &pcfg_pull_none>, /* DATA11 */
401*4882a593Smuzhiyun				<2 RK_PB6 1 &pcfg_pull_none>, /* DATA12 */
402*4882a593Smuzhiyun				<2 RK_PB7 1 &pcfg_pull_none>, /* DATA13 */
403*4882a593Smuzhiyun				<2 RK_PC0 1 &pcfg_pull_none>, /* DATA14 */
404*4882a593Smuzhiyun				<2 RK_PC1 1 &pcfg_pull_none>, /* DATA15 */
405*4882a593Smuzhiyun				<2 RK_PC2 1 &pcfg_pull_none>, /* DATA16 */
406*4882a593Smuzhiyun				<2 RK_PC3 1 &pcfg_pull_none>; /* DATA17 */
407*4882a593Smuzhiyun		};
408*4882a593Smuzhiyun
409*4882a593Smuzhiyun		lcdc_sleep_pins: lcdc-sleep-pins {
410*4882a593Smuzhiyun			rockchip,pins =
411*4882a593Smuzhiyun				<2 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>, /* DCLK */
412*4882a593Smuzhiyun				<2 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>, /* DEN */
413*4882a593Smuzhiyun				<2 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>, /* DATA10 */
414*4882a593Smuzhiyun				<2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>, /* DATA11 */
415*4882a593Smuzhiyun				<2 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>, /* DATA12 */
416*4882a593Smuzhiyun				<2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>, /* DATA13 */
417*4882a593Smuzhiyun				<2 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>, /* DATA14 */
418*4882a593Smuzhiyun				<2 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>, /* DATA15 */
419*4882a593Smuzhiyun				<2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>, /* DATA16 */
420*4882a593Smuzhiyun				<2 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>; /* DATA17 */
421*4882a593Smuzhiyun		};
422*4882a593Smuzhiyun	};
423*4882a593Smuzhiyun
424*4882a593Smuzhiyun	pmic {
425*4882a593Smuzhiyun		pmic_int_l: pmic-int-l {
426*4882a593Smuzhiyun			rockchip,pins =
427*4882a593Smuzhiyun				<0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_default>;
428*4882a593Smuzhiyun		};
429*4882a593Smuzhiyun	};
430*4882a593Smuzhiyun};
431*4882a593Smuzhiyun
432*4882a593Smuzhiyun&pwm0 {
433*4882a593Smuzhiyun	status = "okay";
434*4882a593Smuzhiyun};
435*4882a593Smuzhiyun
436*4882a593Smuzhiyun&rga {
437*4882a593Smuzhiyun	status = "okay";
438*4882a593Smuzhiyun};
439*4882a593Smuzhiyun
440*4882a593Smuzhiyun&saradc {
441*4882a593Smuzhiyun	status = "okay";
442*4882a593Smuzhiyun	vref-supply = <&vccadc_ref>;
443*4882a593Smuzhiyun};
444*4882a593Smuzhiyun
445*4882a593Smuzhiyun&sdmmc {
446*4882a593Smuzhiyun	cap-mmc-highspeed;
447*4882a593Smuzhiyun	no-sdio;
448*4882a593Smuzhiyun	no-mmc;
449*4882a593Smuzhiyun	broken-cd;
450*4882a593Smuzhiyun	card-detect-delay = <800>;
451*4882a593Smuzhiyun	ignore-pm-notify;
452*4882a593Smuzhiyun	keep-power-in-suspend;
453*4882a593Smuzhiyun	cd-gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>; /* CD GPIO */
454*4882a593Smuzhiyun	status = "disabled";
455*4882a593Smuzhiyun};
456*4882a593Smuzhiyun
457*4882a593Smuzhiyun&sdio {
458*4882a593Smuzhiyun	cap-mmc-highspeed;
459*4882a593Smuzhiyun	no-sd;
460*4882a593Smuzhiyun	no-mmc;
461*4882a593Smuzhiyun	ignore-pm-notify;
462*4882a593Smuzhiyun	keep-power-in-suspend;
463*4882a593Smuzhiyun	non-removable;
464*4882a593Smuzhiyun	cap-sdio-irq;
465*4882a593Smuzhiyun	status = "disabled";
466*4882a593Smuzhiyun};
467*4882a593Smuzhiyun
468*4882a593Smuzhiyun&u2phy {
469*4882a593Smuzhiyun	status = "okay";
470*4882a593Smuzhiyun
471*4882a593Smuzhiyun	u2phy_otg: otg-port {
472*4882a593Smuzhiyun		status = "okay";
473*4882a593Smuzhiyun	};
474*4882a593Smuzhiyun
475*4882a593Smuzhiyun	u2phy_host: host-port {
476*4882a593Smuzhiyun		status = "okay";
477*4882a593Smuzhiyun	};
478*4882a593Smuzhiyun};
479*4882a593Smuzhiyun
480*4882a593Smuzhiyun&usb_otg {
481*4882a593Smuzhiyun	status = "okay";
482*4882a593Smuzhiyun};
483*4882a593Smuzhiyun
484*4882a593Smuzhiyun&vop {
485*4882a593Smuzhiyun	status = "okay";
486*4882a593Smuzhiyun};
487*4882a593Smuzhiyun
488*4882a593Smuzhiyun&vop_mmu {
489*4882a593Smuzhiyun	status = "okay";
490*4882a593Smuzhiyun};
491