xref: /OK3568_Linux_fs/kernel/scripts/dtc/include-prefixes/arm/r8a7791-koelsch.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Device Tree Source for the Koelsch board
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2013 Renesas Electronics Corporation
6*4882a593Smuzhiyun * Copyright (C) 2013-2014 Renesas Solutions Corp.
7*4882a593Smuzhiyun * Copyright (C) 2014 Cogent Embedded, Inc.
8*4882a593Smuzhiyun */
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun/*
11*4882a593Smuzhiyun * SSI-AK4643
12*4882a593Smuzhiyun *
13*4882a593Smuzhiyun * SW1: 1: AK4643
14*4882a593Smuzhiyun *      2: CN22
15*4882a593Smuzhiyun *      3: ADV7511
16*4882a593Smuzhiyun *
17*4882a593Smuzhiyun * This command is required when Playback/Capture
18*4882a593Smuzhiyun *
19*4882a593Smuzhiyun *	amixer set "LINEOUT Mixer DACL" on
20*4882a593Smuzhiyun *	amixer set "DVC Out" 100%
21*4882a593Smuzhiyun *	amixer set "DVC In" 100%
22*4882a593Smuzhiyun *
23*4882a593Smuzhiyun * You can use Mute
24*4882a593Smuzhiyun *
25*4882a593Smuzhiyun *	amixer set "DVC Out Mute" on
26*4882a593Smuzhiyun *	amixer set "DVC In Mute" on
27*4882a593Smuzhiyun *
28*4882a593Smuzhiyun * You can use Volume Ramp
29*4882a593Smuzhiyun *
30*4882a593Smuzhiyun *	amixer set "DVC Out Ramp Up Rate"   "0.125 dB/64 steps"
31*4882a593Smuzhiyun *	amixer set "DVC Out Ramp Down Rate" "0.125 dB/512 steps"
32*4882a593Smuzhiyun *	amixer set "DVC Out Ramp" on
33*4882a593Smuzhiyun *	aplay xxx.wav &
34*4882a593Smuzhiyun *	amixer set "DVC Out"  80%  // Volume Down
35*4882a593Smuzhiyun *	amixer set "DVC Out" 100%  // Volume Up
36*4882a593Smuzhiyun */
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun/dts-v1/;
39*4882a593Smuzhiyun#include "r8a7791.dtsi"
40*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h>
41*4882a593Smuzhiyun#include <dt-bindings/input/input.h>
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun/ {
44*4882a593Smuzhiyun	model = "Koelsch";
45*4882a593Smuzhiyun	compatible = "renesas,koelsch", "renesas,r8a7791";
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun	aliases {
48*4882a593Smuzhiyun		serial0 = &scif0;
49*4882a593Smuzhiyun		serial1 = &scif1;
50*4882a593Smuzhiyun		i2c9 = &gpioi2c1;
51*4882a593Smuzhiyun		i2c10 = &gpioi2c2;
52*4882a593Smuzhiyun		i2c11 = &gpioi2c4;
53*4882a593Smuzhiyun		i2c12 = &i2cexio1;
54*4882a593Smuzhiyun		i2c13 = &i2chdmi;
55*4882a593Smuzhiyun		i2c14 = &i2cexio4;
56*4882a593Smuzhiyun		mmc0 = &sdhi0;
57*4882a593Smuzhiyun		mmc1 = &sdhi1;
58*4882a593Smuzhiyun		mmc2 = &sdhi2;
59*4882a593Smuzhiyun	};
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun	chosen {
62*4882a593Smuzhiyun		bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
63*4882a593Smuzhiyun		stdout-path = "serial0:115200n8";
64*4882a593Smuzhiyun	};
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun	memory@40000000 {
67*4882a593Smuzhiyun		device_type = "memory";
68*4882a593Smuzhiyun		reg = <0 0x40000000 0 0x40000000>;
69*4882a593Smuzhiyun	};
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun	memory@200000000 {
72*4882a593Smuzhiyun		device_type = "memory";
73*4882a593Smuzhiyun		reg = <2 0x00000000 0 0x40000000>;
74*4882a593Smuzhiyun	};
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun	lbsc {
77*4882a593Smuzhiyun		#address-cells = <1>;
78*4882a593Smuzhiyun		#size-cells = <1>;
79*4882a593Smuzhiyun	};
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun	keyboard {
82*4882a593Smuzhiyun		compatible = "gpio-keys";
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun		key-1 {
85*4882a593Smuzhiyun			gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
86*4882a593Smuzhiyun			linux,code = <KEY_1>;
87*4882a593Smuzhiyun			label = "SW2-1";
88*4882a593Smuzhiyun			wakeup-source;
89*4882a593Smuzhiyun			debounce-interval = <20>;
90*4882a593Smuzhiyun		};
91*4882a593Smuzhiyun		key-2 {
92*4882a593Smuzhiyun			gpios = <&gpio5 1 GPIO_ACTIVE_LOW>;
93*4882a593Smuzhiyun			linux,code = <KEY_2>;
94*4882a593Smuzhiyun			label = "SW2-2";
95*4882a593Smuzhiyun			wakeup-source;
96*4882a593Smuzhiyun			debounce-interval = <20>;
97*4882a593Smuzhiyun		};
98*4882a593Smuzhiyun		key-3 {
99*4882a593Smuzhiyun			gpios = <&gpio5 2 GPIO_ACTIVE_LOW>;
100*4882a593Smuzhiyun			linux,code = <KEY_3>;
101*4882a593Smuzhiyun			label = "SW2-3";
102*4882a593Smuzhiyun			wakeup-source;
103*4882a593Smuzhiyun			debounce-interval = <20>;
104*4882a593Smuzhiyun		};
105*4882a593Smuzhiyun		key-4 {
106*4882a593Smuzhiyun			gpios = <&gpio5 3 GPIO_ACTIVE_LOW>;
107*4882a593Smuzhiyun			linux,code = <KEY_4>;
108*4882a593Smuzhiyun			label = "SW2-4";
109*4882a593Smuzhiyun			wakeup-source;
110*4882a593Smuzhiyun			debounce-interval = <20>;
111*4882a593Smuzhiyun		};
112*4882a593Smuzhiyun		key-a {
113*4882a593Smuzhiyun			gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
114*4882a593Smuzhiyun			linux,code = <KEY_A>;
115*4882a593Smuzhiyun			label = "SW30";
116*4882a593Smuzhiyun			wakeup-source;
117*4882a593Smuzhiyun			debounce-interval = <20>;
118*4882a593Smuzhiyun		};
119*4882a593Smuzhiyun		key-b {
120*4882a593Smuzhiyun			gpios = <&gpio7 1 GPIO_ACTIVE_LOW>;
121*4882a593Smuzhiyun			linux,code = <KEY_B>;
122*4882a593Smuzhiyun			label = "SW31";
123*4882a593Smuzhiyun			wakeup-source;
124*4882a593Smuzhiyun			debounce-interval = <20>;
125*4882a593Smuzhiyun		};
126*4882a593Smuzhiyun		key-c {
127*4882a593Smuzhiyun			gpios = <&gpio7 2 GPIO_ACTIVE_LOW>;
128*4882a593Smuzhiyun			linux,code = <KEY_C>;
129*4882a593Smuzhiyun			label = "SW32";
130*4882a593Smuzhiyun			wakeup-source;
131*4882a593Smuzhiyun			debounce-interval = <20>;
132*4882a593Smuzhiyun		};
133*4882a593Smuzhiyun		key-d {
134*4882a593Smuzhiyun			gpios = <&gpio7 3 GPIO_ACTIVE_LOW>;
135*4882a593Smuzhiyun			linux,code = <KEY_D>;
136*4882a593Smuzhiyun			label = "SW33";
137*4882a593Smuzhiyun			wakeup-source;
138*4882a593Smuzhiyun			debounce-interval = <20>;
139*4882a593Smuzhiyun		};
140*4882a593Smuzhiyun		key-e {
141*4882a593Smuzhiyun			gpios = <&gpio7 4 GPIO_ACTIVE_LOW>;
142*4882a593Smuzhiyun			linux,code = <KEY_E>;
143*4882a593Smuzhiyun			label = "SW34";
144*4882a593Smuzhiyun			wakeup-source;
145*4882a593Smuzhiyun			debounce-interval = <20>;
146*4882a593Smuzhiyun		};
147*4882a593Smuzhiyun		key-f {
148*4882a593Smuzhiyun			gpios = <&gpio7 5 GPIO_ACTIVE_LOW>;
149*4882a593Smuzhiyun			linux,code = <KEY_F>;
150*4882a593Smuzhiyun			label = "SW35";
151*4882a593Smuzhiyun			wakeup-source;
152*4882a593Smuzhiyun			debounce-interval = <20>;
153*4882a593Smuzhiyun		};
154*4882a593Smuzhiyun		key-g {
155*4882a593Smuzhiyun			gpios = <&gpio7 6 GPIO_ACTIVE_LOW>;
156*4882a593Smuzhiyun			linux,code = <KEY_G>;
157*4882a593Smuzhiyun			label = "SW36";
158*4882a593Smuzhiyun			wakeup-source;
159*4882a593Smuzhiyun			debounce-interval = <20>;
160*4882a593Smuzhiyun		};
161*4882a593Smuzhiyun	};
162*4882a593Smuzhiyun
163*4882a593Smuzhiyun	leds {
164*4882a593Smuzhiyun		compatible = "gpio-leds";
165*4882a593Smuzhiyun		led6 {
166*4882a593Smuzhiyun			gpios = <&gpio2 19 GPIO_ACTIVE_HIGH>;
167*4882a593Smuzhiyun			label = "LED6";
168*4882a593Smuzhiyun		};
169*4882a593Smuzhiyun		led7 {
170*4882a593Smuzhiyun			gpios = <&gpio2 20 GPIO_ACTIVE_HIGH>;
171*4882a593Smuzhiyun			label = "LED7";
172*4882a593Smuzhiyun		};
173*4882a593Smuzhiyun		led8 {
174*4882a593Smuzhiyun			gpios = <&gpio2 21 GPIO_ACTIVE_HIGH>;
175*4882a593Smuzhiyun			label = "LED8";
176*4882a593Smuzhiyun		};
177*4882a593Smuzhiyun	};
178*4882a593Smuzhiyun
179*4882a593Smuzhiyun	vcc_sdhi0: regulator-vcc-sdhi0 {
180*4882a593Smuzhiyun		compatible = "regulator-fixed";
181*4882a593Smuzhiyun
182*4882a593Smuzhiyun		regulator-name = "SDHI0 Vcc";
183*4882a593Smuzhiyun		regulator-min-microvolt = <3300000>;
184*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
185*4882a593Smuzhiyun
186*4882a593Smuzhiyun		gpio = <&gpio7 17 GPIO_ACTIVE_HIGH>;
187*4882a593Smuzhiyun		enable-active-high;
188*4882a593Smuzhiyun	};
189*4882a593Smuzhiyun
190*4882a593Smuzhiyun	vccq_sdhi0: regulator-vccq-sdhi0 {
191*4882a593Smuzhiyun		compatible = "regulator-gpio";
192*4882a593Smuzhiyun
193*4882a593Smuzhiyun		regulator-name = "SDHI0 VccQ";
194*4882a593Smuzhiyun		regulator-min-microvolt = <1800000>;
195*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
196*4882a593Smuzhiyun
197*4882a593Smuzhiyun		gpios = <&gpio2 12 GPIO_ACTIVE_HIGH>;
198*4882a593Smuzhiyun		gpios-states = <1>;
199*4882a593Smuzhiyun		states = <3300000 1>, <1800000 0>;
200*4882a593Smuzhiyun	};
201*4882a593Smuzhiyun
202*4882a593Smuzhiyun	vcc_sdhi1: regulator-vcc-sdhi1 {
203*4882a593Smuzhiyun		compatible = "regulator-fixed";
204*4882a593Smuzhiyun
205*4882a593Smuzhiyun		regulator-name = "SDHI1 Vcc";
206*4882a593Smuzhiyun		regulator-min-microvolt = <3300000>;
207*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
208*4882a593Smuzhiyun
209*4882a593Smuzhiyun		gpio = <&gpio7 18 GPIO_ACTIVE_HIGH>;
210*4882a593Smuzhiyun		enable-active-high;
211*4882a593Smuzhiyun	};
212*4882a593Smuzhiyun
213*4882a593Smuzhiyun	vccq_sdhi1: regulator-vccq-sdhi1 {
214*4882a593Smuzhiyun		compatible = "regulator-gpio";
215*4882a593Smuzhiyun
216*4882a593Smuzhiyun		regulator-name = "SDHI1 VccQ";
217*4882a593Smuzhiyun		regulator-min-microvolt = <1800000>;
218*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
219*4882a593Smuzhiyun
220*4882a593Smuzhiyun		gpios = <&gpio2 13 GPIO_ACTIVE_HIGH>;
221*4882a593Smuzhiyun		gpios-states = <1>;
222*4882a593Smuzhiyun		states = <3300000 1>, <1800000 0>;
223*4882a593Smuzhiyun	};
224*4882a593Smuzhiyun
225*4882a593Smuzhiyun	vcc_sdhi2: regulator-vcc-sdhi2 {
226*4882a593Smuzhiyun		compatible = "regulator-fixed";
227*4882a593Smuzhiyun
228*4882a593Smuzhiyun		regulator-name = "SDHI2 Vcc";
229*4882a593Smuzhiyun		regulator-min-microvolt = <3300000>;
230*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
231*4882a593Smuzhiyun
232*4882a593Smuzhiyun		gpio = <&gpio7 19 GPIO_ACTIVE_HIGH>;
233*4882a593Smuzhiyun		enable-active-high;
234*4882a593Smuzhiyun	};
235*4882a593Smuzhiyun
236*4882a593Smuzhiyun	vccq_sdhi2: regulator-vccq-sdhi2 {
237*4882a593Smuzhiyun		compatible = "regulator-gpio";
238*4882a593Smuzhiyun
239*4882a593Smuzhiyun		regulator-name = "SDHI2 VccQ";
240*4882a593Smuzhiyun		regulator-min-microvolt = <1800000>;
241*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
242*4882a593Smuzhiyun
243*4882a593Smuzhiyun		gpios = <&gpio2 26 GPIO_ACTIVE_HIGH>;
244*4882a593Smuzhiyun		gpios-states = <1>;
245*4882a593Smuzhiyun		states = <3300000 1>, <1800000 0>;
246*4882a593Smuzhiyun	};
247*4882a593Smuzhiyun
248*4882a593Smuzhiyun	audio_clock: audio_clock {
249*4882a593Smuzhiyun		compatible = "fixed-clock";
250*4882a593Smuzhiyun		#clock-cells = <0>;
251*4882a593Smuzhiyun		clock-frequency = <11289600>;
252*4882a593Smuzhiyun	};
253*4882a593Smuzhiyun
254*4882a593Smuzhiyun	rsnd_ak4643: sound {
255*4882a593Smuzhiyun		compatible = "simple-audio-card";
256*4882a593Smuzhiyun
257*4882a593Smuzhiyun		simple-audio-card,format = "left_j";
258*4882a593Smuzhiyun		simple-audio-card,bitclock-master = <&sndcodec>;
259*4882a593Smuzhiyun		simple-audio-card,frame-master = <&sndcodec>;
260*4882a593Smuzhiyun
261*4882a593Smuzhiyun		sndcpu: simple-audio-card,cpu {
262*4882a593Smuzhiyun			sound-dai = <&rcar_sound>;
263*4882a593Smuzhiyun		};
264*4882a593Smuzhiyun
265*4882a593Smuzhiyun		sndcodec: simple-audio-card,codec {
266*4882a593Smuzhiyun			sound-dai = <&ak4643>;
267*4882a593Smuzhiyun			clocks = <&audio_clock>;
268*4882a593Smuzhiyun		};
269*4882a593Smuzhiyun	};
270*4882a593Smuzhiyun
271*4882a593Smuzhiyun	hdmi-in {
272*4882a593Smuzhiyun		compatible = "hdmi-connector";
273*4882a593Smuzhiyun		type = "a";
274*4882a593Smuzhiyun
275*4882a593Smuzhiyun		port {
276*4882a593Smuzhiyun			hdmi_con_in: endpoint {
277*4882a593Smuzhiyun				remote-endpoint = <&adv7612_in>;
278*4882a593Smuzhiyun			};
279*4882a593Smuzhiyun		};
280*4882a593Smuzhiyun	};
281*4882a593Smuzhiyun
282*4882a593Smuzhiyun	cec_clock: cec-clock {
283*4882a593Smuzhiyun		compatible = "fixed-clock";
284*4882a593Smuzhiyun		#clock-cells = <0>;
285*4882a593Smuzhiyun		clock-frequency = <12000000>;
286*4882a593Smuzhiyun	};
287*4882a593Smuzhiyun
288*4882a593Smuzhiyun	hdmi-out {
289*4882a593Smuzhiyun		compatible = "hdmi-connector";
290*4882a593Smuzhiyun		type = "a";
291*4882a593Smuzhiyun
292*4882a593Smuzhiyun		port {
293*4882a593Smuzhiyun			hdmi_con_out: endpoint {
294*4882a593Smuzhiyun				remote-endpoint = <&adv7511_out>;
295*4882a593Smuzhiyun			};
296*4882a593Smuzhiyun		};
297*4882a593Smuzhiyun	};
298*4882a593Smuzhiyun
299*4882a593Smuzhiyun	x2_clk: x2-clock {
300*4882a593Smuzhiyun		compatible = "fixed-clock";
301*4882a593Smuzhiyun		#clock-cells = <0>;
302*4882a593Smuzhiyun		clock-frequency = <74250000>;
303*4882a593Smuzhiyun	};
304*4882a593Smuzhiyun
305*4882a593Smuzhiyun	x13_clk: x13-clock {
306*4882a593Smuzhiyun		compatible = "fixed-clock";
307*4882a593Smuzhiyun		#clock-cells = <0>;
308*4882a593Smuzhiyun		clock-frequency = <148500000>;
309*4882a593Smuzhiyun	};
310*4882a593Smuzhiyun
311*4882a593Smuzhiyun	gpioi2c1: i2c-9 {
312*4882a593Smuzhiyun		#address-cells = <1>;
313*4882a593Smuzhiyun		#size-cells = <0>;
314*4882a593Smuzhiyun		compatible = "i2c-gpio";
315*4882a593Smuzhiyun		status = "disabled";
316*4882a593Smuzhiyun		scl-gpios = <&gpio7 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
317*4882a593Smuzhiyun		sda-gpios = <&gpio7 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
318*4882a593Smuzhiyun		i2c-gpio,delay-us = <5>;
319*4882a593Smuzhiyun	};
320*4882a593Smuzhiyun
321*4882a593Smuzhiyun	gpioi2c2: i2c-10 {
322*4882a593Smuzhiyun		#address-cells = <1>;
323*4882a593Smuzhiyun		#size-cells = <0>;
324*4882a593Smuzhiyun		compatible = "i2c-gpio";
325*4882a593Smuzhiyun		status = "disabled";
326*4882a593Smuzhiyun		scl-gpios = <&gpio2 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
327*4882a593Smuzhiyun		sda-gpios = <&gpio2 7 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
328*4882a593Smuzhiyun		i2c-gpio,delay-us = <5>;
329*4882a593Smuzhiyun	};
330*4882a593Smuzhiyun
331*4882a593Smuzhiyun	gpioi2c4: i2c-11 {
332*4882a593Smuzhiyun		#address-cells = <1>;
333*4882a593Smuzhiyun		#size-cells = <0>;
334*4882a593Smuzhiyun		compatible = "i2c-gpio";
335*4882a593Smuzhiyun		status = "disabled";
336*4882a593Smuzhiyun		scl-gpios = <&gpio7 13 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
337*4882a593Smuzhiyun		sda-gpios = <&gpio7 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
338*4882a593Smuzhiyun		i2c-gpio,delay-us = <5>;
339*4882a593Smuzhiyun	};
340*4882a593Smuzhiyun
341*4882a593Smuzhiyun	/*
342*4882a593Smuzhiyun	 * I2C1 is routed to EXIO connector B, pins 64 (SCL) + 66 (SDA).
343*4882a593Smuzhiyun	 * A fallback to GPIO is provided.
344*4882a593Smuzhiyun	 */
345*4882a593Smuzhiyun	i2cexio1: i2c-12 {
346*4882a593Smuzhiyun		compatible = "i2c-demux-pinctrl";
347*4882a593Smuzhiyun		i2c-parent = <&i2c1>, <&gpioi2c1>;
348*4882a593Smuzhiyun		i2c-bus-name = "i2c-exio1";
349*4882a593Smuzhiyun		#address-cells = <1>;
350*4882a593Smuzhiyun		#size-cells = <0>;
351*4882a593Smuzhiyun	};
352*4882a593Smuzhiyun
353*4882a593Smuzhiyun	/*
354*4882a593Smuzhiyun	 * A fallback to GPIO is provided for I2C2.
355*4882a593Smuzhiyun	 */
356*4882a593Smuzhiyun	i2chdmi: i2c-13 {
357*4882a593Smuzhiyun		compatible = "i2c-demux-pinctrl";
358*4882a593Smuzhiyun		i2c-parent = <&i2c2>, <&gpioi2c2>;
359*4882a593Smuzhiyun		i2c-bus-name = "i2c-hdmi";
360*4882a593Smuzhiyun		#address-cells = <1>;
361*4882a593Smuzhiyun		#size-cells = <0>;
362*4882a593Smuzhiyun
363*4882a593Smuzhiyun		ak4643: codec@12 {
364*4882a593Smuzhiyun			compatible = "asahi-kasei,ak4643";
365*4882a593Smuzhiyun			#sound-dai-cells = <0>;
366*4882a593Smuzhiyun			reg = <0x12>;
367*4882a593Smuzhiyun		};
368*4882a593Smuzhiyun
369*4882a593Smuzhiyun		composite-in@20 {
370*4882a593Smuzhiyun			compatible = "adi,adv7180";
371*4882a593Smuzhiyun			reg = <0x20>;
372*4882a593Smuzhiyun
373*4882a593Smuzhiyun			port {
374*4882a593Smuzhiyun				adv7180: endpoint {
375*4882a593Smuzhiyun					bus-width = <8>;
376*4882a593Smuzhiyun					remote-endpoint = <&vin1ep>;
377*4882a593Smuzhiyun				};
378*4882a593Smuzhiyun			};
379*4882a593Smuzhiyun		};
380*4882a593Smuzhiyun
381*4882a593Smuzhiyun		hdmi@39 {
382*4882a593Smuzhiyun			compatible = "adi,adv7511w";
383*4882a593Smuzhiyun			reg = <0x39>;
384*4882a593Smuzhiyun			interrupt-parent = <&gpio3>;
385*4882a593Smuzhiyun			interrupts = <29 IRQ_TYPE_LEVEL_LOW>;
386*4882a593Smuzhiyun			clocks = <&cec_clock>;
387*4882a593Smuzhiyun			clock-names = "cec";
388*4882a593Smuzhiyun
389*4882a593Smuzhiyun			adi,input-depth = <8>;
390*4882a593Smuzhiyun			adi,input-colorspace = "rgb";
391*4882a593Smuzhiyun			adi,input-clock = "1x";
392*4882a593Smuzhiyun
393*4882a593Smuzhiyun			ports {
394*4882a593Smuzhiyun				#address-cells = <1>;
395*4882a593Smuzhiyun				#size-cells = <0>;
396*4882a593Smuzhiyun
397*4882a593Smuzhiyun				port@0 {
398*4882a593Smuzhiyun					reg = <0>;
399*4882a593Smuzhiyun					adv7511_in: endpoint {
400*4882a593Smuzhiyun						remote-endpoint = <&du_out_rgb>;
401*4882a593Smuzhiyun					};
402*4882a593Smuzhiyun				};
403*4882a593Smuzhiyun
404*4882a593Smuzhiyun				port@1 {
405*4882a593Smuzhiyun					reg = <1>;
406*4882a593Smuzhiyun					adv7511_out: endpoint {
407*4882a593Smuzhiyun						remote-endpoint = <&hdmi_con_out>;
408*4882a593Smuzhiyun					};
409*4882a593Smuzhiyun				};
410*4882a593Smuzhiyun			};
411*4882a593Smuzhiyun		};
412*4882a593Smuzhiyun
413*4882a593Smuzhiyun		hdmi-in@4c {
414*4882a593Smuzhiyun			compatible = "adi,adv7612";
415*4882a593Smuzhiyun			reg = <0x4c>;
416*4882a593Smuzhiyun			interrupt-parent = <&gpio4>;
417*4882a593Smuzhiyun			interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
418*4882a593Smuzhiyun			default-input = <0>;
419*4882a593Smuzhiyun
420*4882a593Smuzhiyun			ports {
421*4882a593Smuzhiyun				#address-cells = <1>;
422*4882a593Smuzhiyun				#size-cells = <0>;
423*4882a593Smuzhiyun
424*4882a593Smuzhiyun				port@0 {
425*4882a593Smuzhiyun					reg = <0>;
426*4882a593Smuzhiyun					adv7612_in: endpoint {
427*4882a593Smuzhiyun						remote-endpoint = <&hdmi_con_in>;
428*4882a593Smuzhiyun					};
429*4882a593Smuzhiyun				};
430*4882a593Smuzhiyun
431*4882a593Smuzhiyun				port@2 {
432*4882a593Smuzhiyun					reg = <2>;
433*4882a593Smuzhiyun					adv7612_out: endpoint {
434*4882a593Smuzhiyun						remote-endpoint = <&vin0ep2>;
435*4882a593Smuzhiyun					};
436*4882a593Smuzhiyun				};
437*4882a593Smuzhiyun			};
438*4882a593Smuzhiyun		};
439*4882a593Smuzhiyun
440*4882a593Smuzhiyun		eeprom@50 {
441*4882a593Smuzhiyun			compatible = "renesas,r1ex24002", "atmel,24c02";
442*4882a593Smuzhiyun			reg = <0x50>;
443*4882a593Smuzhiyun			pagesize = <16>;
444*4882a593Smuzhiyun		};
445*4882a593Smuzhiyun	};
446*4882a593Smuzhiyun
447*4882a593Smuzhiyun	/*
448*4882a593Smuzhiyun	 * I2C4 is routed to EXIO connector E, pins 37 (SCL) + 39 (SDA).
449*4882a593Smuzhiyun	 * A fallback to GPIO is provided.
450*4882a593Smuzhiyun	 */
451*4882a593Smuzhiyun	i2cexio4: i2c-14 {
452*4882a593Smuzhiyun		compatible = "i2c-demux-pinctrl";
453*4882a593Smuzhiyun		i2c-parent = <&i2c4>, <&gpioi2c4>;
454*4882a593Smuzhiyun		i2c-bus-name = "i2c-exio4";
455*4882a593Smuzhiyun		#address-cells = <1>;
456*4882a593Smuzhiyun		#size-cells = <0>;
457*4882a593Smuzhiyun	};
458*4882a593Smuzhiyun};
459*4882a593Smuzhiyun
460*4882a593Smuzhiyun&du {
461*4882a593Smuzhiyun	pinctrl-0 = <&du_pins>;
462*4882a593Smuzhiyun	pinctrl-names = "default";
463*4882a593Smuzhiyun	status = "okay";
464*4882a593Smuzhiyun
465*4882a593Smuzhiyun	clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
466*4882a593Smuzhiyun		 <&x13_clk>, <&x2_clk>;
467*4882a593Smuzhiyun	clock-names = "du.0", "du.1", "dclkin.0", "dclkin.1";
468*4882a593Smuzhiyun
469*4882a593Smuzhiyun	ports {
470*4882a593Smuzhiyun		port@0 {
471*4882a593Smuzhiyun			endpoint {
472*4882a593Smuzhiyun				remote-endpoint = <&adv7511_in>;
473*4882a593Smuzhiyun			};
474*4882a593Smuzhiyun		};
475*4882a593Smuzhiyun	};
476*4882a593Smuzhiyun};
477*4882a593Smuzhiyun
478*4882a593Smuzhiyun&lvds0 {
479*4882a593Smuzhiyun	ports {
480*4882a593Smuzhiyun		port@1 {
481*4882a593Smuzhiyun			lvds_connector: endpoint {
482*4882a593Smuzhiyun			};
483*4882a593Smuzhiyun		};
484*4882a593Smuzhiyun	};
485*4882a593Smuzhiyun};
486*4882a593Smuzhiyun
487*4882a593Smuzhiyun&extal_clk {
488*4882a593Smuzhiyun	clock-frequency = <20000000>;
489*4882a593Smuzhiyun};
490*4882a593Smuzhiyun
491*4882a593Smuzhiyun&pfc {
492*4882a593Smuzhiyun	pinctrl-0 = <&scif_clk_pins>;
493*4882a593Smuzhiyun	pinctrl-names = "default";
494*4882a593Smuzhiyun
495*4882a593Smuzhiyun	i2c1_pins: i2c1 {
496*4882a593Smuzhiyun		groups = "i2c1";
497*4882a593Smuzhiyun		function = "i2c1";
498*4882a593Smuzhiyun	};
499*4882a593Smuzhiyun
500*4882a593Smuzhiyun	i2c2_pins: i2c2 {
501*4882a593Smuzhiyun		groups = "i2c2";
502*4882a593Smuzhiyun		function = "i2c2";
503*4882a593Smuzhiyun	};
504*4882a593Smuzhiyun
505*4882a593Smuzhiyun	i2c4_pins: i2c4 {
506*4882a593Smuzhiyun		groups = "i2c4_c";
507*4882a593Smuzhiyun		function = "i2c4";
508*4882a593Smuzhiyun	};
509*4882a593Smuzhiyun
510*4882a593Smuzhiyun	du_pins: du {
511*4882a593Smuzhiyun		groups = "du_rgb888", "du_sync", "du_disp", "du_clk_out_0";
512*4882a593Smuzhiyun		function = "du";
513*4882a593Smuzhiyun	};
514*4882a593Smuzhiyun
515*4882a593Smuzhiyun	scif0_pins: scif0 {
516*4882a593Smuzhiyun		groups = "scif0_data_d";
517*4882a593Smuzhiyun		function = "scif0";
518*4882a593Smuzhiyun	};
519*4882a593Smuzhiyun
520*4882a593Smuzhiyun	scif1_pins: scif1 {
521*4882a593Smuzhiyun		groups = "scif1_data_d";
522*4882a593Smuzhiyun		function = "scif1";
523*4882a593Smuzhiyun	};
524*4882a593Smuzhiyun
525*4882a593Smuzhiyun	scif_clk_pins: scif_clk {
526*4882a593Smuzhiyun		groups = "scif_clk";
527*4882a593Smuzhiyun		function = "scif_clk";
528*4882a593Smuzhiyun	};
529*4882a593Smuzhiyun
530*4882a593Smuzhiyun	ether_pins: ether {
531*4882a593Smuzhiyun		groups = "eth_link", "eth_mdio", "eth_rmii";
532*4882a593Smuzhiyun		function = "eth";
533*4882a593Smuzhiyun	};
534*4882a593Smuzhiyun
535*4882a593Smuzhiyun	phy1_pins: phy1 {
536*4882a593Smuzhiyun		groups = "intc_irq0";
537*4882a593Smuzhiyun		function = "intc";
538*4882a593Smuzhiyun	};
539*4882a593Smuzhiyun
540*4882a593Smuzhiyun	pmic_irq_pins: pmicirq {
541*4882a593Smuzhiyun		groups = "intc_irq2";
542*4882a593Smuzhiyun		function = "intc";
543*4882a593Smuzhiyun	};
544*4882a593Smuzhiyun
545*4882a593Smuzhiyun	sdhi0_pins: sd0 {
546*4882a593Smuzhiyun		groups = "sdhi0_data4", "sdhi0_ctrl";
547*4882a593Smuzhiyun		function = "sdhi0";
548*4882a593Smuzhiyun		power-source = <3300>;
549*4882a593Smuzhiyun	};
550*4882a593Smuzhiyun
551*4882a593Smuzhiyun	sdhi0_pins_uhs: sd0_uhs {
552*4882a593Smuzhiyun		groups = "sdhi0_data4", "sdhi0_ctrl";
553*4882a593Smuzhiyun		function = "sdhi0";
554*4882a593Smuzhiyun		power-source = <1800>;
555*4882a593Smuzhiyun	};
556*4882a593Smuzhiyun
557*4882a593Smuzhiyun	sdhi1_pins: sd1 {
558*4882a593Smuzhiyun		groups = "sdhi1_data4", "sdhi1_ctrl";
559*4882a593Smuzhiyun		function = "sdhi1";
560*4882a593Smuzhiyun		power-source = <3300>;
561*4882a593Smuzhiyun	};
562*4882a593Smuzhiyun
563*4882a593Smuzhiyun	sdhi1_pins_uhs: sd1_uhs {
564*4882a593Smuzhiyun		groups = "sdhi1_data4", "sdhi1_ctrl";
565*4882a593Smuzhiyun		function = "sdhi1";
566*4882a593Smuzhiyun		power-source = <1800>;
567*4882a593Smuzhiyun	};
568*4882a593Smuzhiyun
569*4882a593Smuzhiyun	sdhi2_pins: sd2 {
570*4882a593Smuzhiyun		groups = "sdhi2_data4", "sdhi2_ctrl";
571*4882a593Smuzhiyun		function = "sdhi2";
572*4882a593Smuzhiyun		power-source = <3300>;
573*4882a593Smuzhiyun	};
574*4882a593Smuzhiyun
575*4882a593Smuzhiyun	sdhi2_pins_uhs: sd2_uhs {
576*4882a593Smuzhiyun		groups = "sdhi2_data4", "sdhi2_ctrl";
577*4882a593Smuzhiyun		function = "sdhi2";
578*4882a593Smuzhiyun		power-source = <1800>;
579*4882a593Smuzhiyun	};
580*4882a593Smuzhiyun
581*4882a593Smuzhiyun	qspi_pins: qspi {
582*4882a593Smuzhiyun		groups = "qspi_ctrl", "qspi_data4";
583*4882a593Smuzhiyun		function = "qspi";
584*4882a593Smuzhiyun	};
585*4882a593Smuzhiyun
586*4882a593Smuzhiyun	msiof0_pins: msiof0 {
587*4882a593Smuzhiyun		groups = "msiof0_clk", "msiof0_sync", "msiof0_rx",
588*4882a593Smuzhiyun				 "msiof0_tx";
589*4882a593Smuzhiyun		function = "msiof0";
590*4882a593Smuzhiyun	};
591*4882a593Smuzhiyun
592*4882a593Smuzhiyun	usb0_pins: usb0 {
593*4882a593Smuzhiyun		groups = "usb0";
594*4882a593Smuzhiyun		function = "usb0";
595*4882a593Smuzhiyun	};
596*4882a593Smuzhiyun
597*4882a593Smuzhiyun	usb1_pins: usb1 {
598*4882a593Smuzhiyun		groups = "usb1";
599*4882a593Smuzhiyun		function = "usb1";
600*4882a593Smuzhiyun	};
601*4882a593Smuzhiyun
602*4882a593Smuzhiyun	vin0_pins: vin0 {
603*4882a593Smuzhiyun		groups = "vin0_data24", "vin0_sync", "vin0_clkenb", "vin0_clk";
604*4882a593Smuzhiyun		function = "vin0";
605*4882a593Smuzhiyun	};
606*4882a593Smuzhiyun
607*4882a593Smuzhiyun	vin1_pins: vin1 {
608*4882a593Smuzhiyun		groups = "vin1_data8", "vin1_clk";
609*4882a593Smuzhiyun		function = "vin1";
610*4882a593Smuzhiyun	};
611*4882a593Smuzhiyun
612*4882a593Smuzhiyun	sound_pins: sound {
613*4882a593Smuzhiyun		groups = "ssi0129_ctrl", "ssi0_data", "ssi1_data";
614*4882a593Smuzhiyun		function = "ssi";
615*4882a593Smuzhiyun	};
616*4882a593Smuzhiyun
617*4882a593Smuzhiyun	sound_clk_pins: sound_clk {
618*4882a593Smuzhiyun		groups = "audio_clk_a";
619*4882a593Smuzhiyun		function = "audio_clk";
620*4882a593Smuzhiyun	};
621*4882a593Smuzhiyun};
622*4882a593Smuzhiyun
623*4882a593Smuzhiyun&ether {
624*4882a593Smuzhiyun	pinctrl-0 = <&ether_pins &phy1_pins>;
625*4882a593Smuzhiyun	pinctrl-names = "default";
626*4882a593Smuzhiyun
627*4882a593Smuzhiyun	phy-handle = <&phy1>;
628*4882a593Smuzhiyun	renesas,ether-link-active-low;
629*4882a593Smuzhiyun	status = "okay";
630*4882a593Smuzhiyun
631*4882a593Smuzhiyun	phy1: ethernet-phy@1 {
632*4882a593Smuzhiyun		reg = <1>;
633*4882a593Smuzhiyun		interrupt-parent = <&irqc0>;
634*4882a593Smuzhiyun		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
635*4882a593Smuzhiyun		micrel,led-mode = <1>;
636*4882a593Smuzhiyun		reset-gpios = <&gpio5 22 GPIO_ACTIVE_LOW>;
637*4882a593Smuzhiyun	};
638*4882a593Smuzhiyun};
639*4882a593Smuzhiyun
640*4882a593Smuzhiyun&cmt0 {
641*4882a593Smuzhiyun	status = "okay";
642*4882a593Smuzhiyun};
643*4882a593Smuzhiyun
644*4882a593Smuzhiyun&rwdt {
645*4882a593Smuzhiyun	timeout-sec = <60>;
646*4882a593Smuzhiyun	status = "okay";
647*4882a593Smuzhiyun};
648*4882a593Smuzhiyun
649*4882a593Smuzhiyun&sata0 {
650*4882a593Smuzhiyun	status = "okay";
651*4882a593Smuzhiyun};
652*4882a593Smuzhiyun
653*4882a593Smuzhiyun&scif0 {
654*4882a593Smuzhiyun	pinctrl-0 = <&scif0_pins>;
655*4882a593Smuzhiyun	pinctrl-names = "default";
656*4882a593Smuzhiyun
657*4882a593Smuzhiyun	status = "okay";
658*4882a593Smuzhiyun};
659*4882a593Smuzhiyun
660*4882a593Smuzhiyun&scif1 {
661*4882a593Smuzhiyun	pinctrl-0 = <&scif1_pins>;
662*4882a593Smuzhiyun	pinctrl-names = "default";
663*4882a593Smuzhiyun
664*4882a593Smuzhiyun	status = "okay";
665*4882a593Smuzhiyun};
666*4882a593Smuzhiyun
667*4882a593Smuzhiyun&scif_clk {
668*4882a593Smuzhiyun	clock-frequency = <14745600>;
669*4882a593Smuzhiyun};
670*4882a593Smuzhiyun
671*4882a593Smuzhiyun&sdhi0 {
672*4882a593Smuzhiyun	pinctrl-0 = <&sdhi0_pins>;
673*4882a593Smuzhiyun	pinctrl-1 = <&sdhi0_pins_uhs>;
674*4882a593Smuzhiyun	pinctrl-names = "default", "state_uhs";
675*4882a593Smuzhiyun
676*4882a593Smuzhiyun	vmmc-supply = <&vcc_sdhi0>;
677*4882a593Smuzhiyun	vqmmc-supply = <&vccq_sdhi0>;
678*4882a593Smuzhiyun	cd-gpios = <&gpio6 6 GPIO_ACTIVE_LOW>;
679*4882a593Smuzhiyun	wp-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>;
680*4882a593Smuzhiyun	sd-uhs-sdr50;
681*4882a593Smuzhiyun	sd-uhs-sdr104;
682*4882a593Smuzhiyun	status = "okay";
683*4882a593Smuzhiyun};
684*4882a593Smuzhiyun
685*4882a593Smuzhiyun&sdhi1 {
686*4882a593Smuzhiyun	pinctrl-0 = <&sdhi1_pins>;
687*4882a593Smuzhiyun	pinctrl-1 = <&sdhi1_pins_uhs>;
688*4882a593Smuzhiyun	pinctrl-names = "default", "state_uhs";
689*4882a593Smuzhiyun
690*4882a593Smuzhiyun	vmmc-supply = <&vcc_sdhi1>;
691*4882a593Smuzhiyun	vqmmc-supply = <&vccq_sdhi1>;
692*4882a593Smuzhiyun	cd-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>;
693*4882a593Smuzhiyun	wp-gpios = <&gpio6 15 GPIO_ACTIVE_HIGH>;
694*4882a593Smuzhiyun	sd-uhs-sdr50;
695*4882a593Smuzhiyun	status = "okay";
696*4882a593Smuzhiyun};
697*4882a593Smuzhiyun
698*4882a593Smuzhiyun&sdhi2 {
699*4882a593Smuzhiyun	pinctrl-0 = <&sdhi2_pins>;
700*4882a593Smuzhiyun	pinctrl-1 = <&sdhi2_pins_uhs>;
701*4882a593Smuzhiyun	pinctrl-names = "default", "state_uhs";
702*4882a593Smuzhiyun
703*4882a593Smuzhiyun	vmmc-supply = <&vcc_sdhi2>;
704*4882a593Smuzhiyun	vqmmc-supply = <&vccq_sdhi2>;
705*4882a593Smuzhiyun	cd-gpios = <&gpio6 22 GPIO_ACTIVE_LOW>;
706*4882a593Smuzhiyun	sd-uhs-sdr50;
707*4882a593Smuzhiyun	status = "okay";
708*4882a593Smuzhiyun};
709*4882a593Smuzhiyun
710*4882a593Smuzhiyun&qspi {
711*4882a593Smuzhiyun	pinctrl-0 = <&qspi_pins>;
712*4882a593Smuzhiyun	pinctrl-names = "default";
713*4882a593Smuzhiyun
714*4882a593Smuzhiyun	status = "okay";
715*4882a593Smuzhiyun
716*4882a593Smuzhiyun	flash: flash@0 {
717*4882a593Smuzhiyun		compatible = "spansion,s25fl512s", "jedec,spi-nor";
718*4882a593Smuzhiyun		reg = <0>;
719*4882a593Smuzhiyun		spi-max-frequency = <30000000>;
720*4882a593Smuzhiyun		spi-tx-bus-width = <4>;
721*4882a593Smuzhiyun		spi-rx-bus-width = <4>;
722*4882a593Smuzhiyun		spi-cpha;
723*4882a593Smuzhiyun		spi-cpol;
724*4882a593Smuzhiyun		m25p,fast-read;
725*4882a593Smuzhiyun
726*4882a593Smuzhiyun		partitions {
727*4882a593Smuzhiyun			compatible = "fixed-partitions";
728*4882a593Smuzhiyun			#address-cells = <1>;
729*4882a593Smuzhiyun			#size-cells = <1>;
730*4882a593Smuzhiyun
731*4882a593Smuzhiyun			partition@0 {
732*4882a593Smuzhiyun				label = "loader";
733*4882a593Smuzhiyun				reg = <0x00000000 0x00080000>;
734*4882a593Smuzhiyun				read-only;
735*4882a593Smuzhiyun			};
736*4882a593Smuzhiyun			partition@80000 {
737*4882a593Smuzhiyun				label = "user";
738*4882a593Smuzhiyun				reg = <0x00080000 0x00580000>;
739*4882a593Smuzhiyun				read-only;
740*4882a593Smuzhiyun			};
741*4882a593Smuzhiyun			partition@600000 {
742*4882a593Smuzhiyun				label = "flash";
743*4882a593Smuzhiyun				reg = <0x00600000 0x03a00000>;
744*4882a593Smuzhiyun			};
745*4882a593Smuzhiyun		};
746*4882a593Smuzhiyun	};
747*4882a593Smuzhiyun};
748*4882a593Smuzhiyun
749*4882a593Smuzhiyun&msiof0 {
750*4882a593Smuzhiyun	pinctrl-0 = <&msiof0_pins>;
751*4882a593Smuzhiyun	pinctrl-names = "default";
752*4882a593Smuzhiyun
753*4882a593Smuzhiyun	status = "okay";
754*4882a593Smuzhiyun
755*4882a593Smuzhiyun	pmic: pmic@0 {
756*4882a593Smuzhiyun		compatible = "renesas,r2a11302ft";
757*4882a593Smuzhiyun		reg = <0>;
758*4882a593Smuzhiyun		spi-max-frequency = <6000000>;
759*4882a593Smuzhiyun		spi-cpol;
760*4882a593Smuzhiyun		spi-cpha;
761*4882a593Smuzhiyun	};
762*4882a593Smuzhiyun};
763*4882a593Smuzhiyun
764*4882a593Smuzhiyun&i2c1 {
765*4882a593Smuzhiyun	pinctrl-0 = <&i2c1_pins>;
766*4882a593Smuzhiyun	pinctrl-names = "i2c-exio1";
767*4882a593Smuzhiyun};
768*4882a593Smuzhiyun
769*4882a593Smuzhiyun&i2c2 {
770*4882a593Smuzhiyun	pinctrl-0 = <&i2c2_pins>;
771*4882a593Smuzhiyun	pinctrl-names = "i2c-hdmi";
772*4882a593Smuzhiyun
773*4882a593Smuzhiyun	clock-frequency = <100000>;
774*4882a593Smuzhiyun};
775*4882a593Smuzhiyun
776*4882a593Smuzhiyun&i2c4 {
777*4882a593Smuzhiyun	pinctrl-0 = <&i2c4_pins>;
778*4882a593Smuzhiyun	pinctrl-names = "i2c-exio4";
779*4882a593Smuzhiyun};
780*4882a593Smuzhiyun
781*4882a593Smuzhiyun&i2c6 {
782*4882a593Smuzhiyun	pinctrl-names = "default";
783*4882a593Smuzhiyun	pinctrl-0 = <&pmic_irq_pins>;
784*4882a593Smuzhiyun	status = "okay";
785*4882a593Smuzhiyun	clock-frequency = <100000>;
786*4882a593Smuzhiyun
787*4882a593Smuzhiyun	pmic@58 {
788*4882a593Smuzhiyun		compatible = "dlg,da9063";
789*4882a593Smuzhiyun		reg = <0x58>;
790*4882a593Smuzhiyun		interrupt-parent = <&irqc0>;
791*4882a593Smuzhiyun		interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
792*4882a593Smuzhiyun		interrupt-controller;
793*4882a593Smuzhiyun
794*4882a593Smuzhiyun		rtc {
795*4882a593Smuzhiyun			compatible = "dlg,da9063-rtc";
796*4882a593Smuzhiyun		};
797*4882a593Smuzhiyun
798*4882a593Smuzhiyun		wdt {
799*4882a593Smuzhiyun			compatible = "dlg,da9063-watchdog";
800*4882a593Smuzhiyun		};
801*4882a593Smuzhiyun	};
802*4882a593Smuzhiyun
803*4882a593Smuzhiyun	vdd_dvfs: regulator@68 {
804*4882a593Smuzhiyun		compatible = "dlg,da9210";
805*4882a593Smuzhiyun		reg = <0x68>;
806*4882a593Smuzhiyun		interrupt-parent = <&irqc0>;
807*4882a593Smuzhiyun		interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
808*4882a593Smuzhiyun
809*4882a593Smuzhiyun		regulator-min-microvolt = <1000000>;
810*4882a593Smuzhiyun		regulator-max-microvolt = <1000000>;
811*4882a593Smuzhiyun		regulator-boot-on;
812*4882a593Smuzhiyun		regulator-always-on;
813*4882a593Smuzhiyun	};
814*4882a593Smuzhiyun};
815*4882a593Smuzhiyun
816*4882a593Smuzhiyun&pci0 {
817*4882a593Smuzhiyun	status = "okay";
818*4882a593Smuzhiyun	pinctrl-0 = <&usb0_pins>;
819*4882a593Smuzhiyun	pinctrl-names = "default";
820*4882a593Smuzhiyun};
821*4882a593Smuzhiyun
822*4882a593Smuzhiyun&pci1 {
823*4882a593Smuzhiyun	status = "okay";
824*4882a593Smuzhiyun	pinctrl-0 = <&usb1_pins>;
825*4882a593Smuzhiyun	pinctrl-names = "default";
826*4882a593Smuzhiyun};
827*4882a593Smuzhiyun
828*4882a593Smuzhiyun&hsusb {
829*4882a593Smuzhiyun	status = "okay";
830*4882a593Smuzhiyun	pinctrl-0 = <&usb0_pins>;
831*4882a593Smuzhiyun	pinctrl-names = "default";
832*4882a593Smuzhiyun	renesas,enable-gpio = <&gpio5 31 GPIO_ACTIVE_HIGH>;
833*4882a593Smuzhiyun};
834*4882a593Smuzhiyun
835*4882a593Smuzhiyun&usbphy {
836*4882a593Smuzhiyun	status = "okay";
837*4882a593Smuzhiyun};
838*4882a593Smuzhiyun
839*4882a593Smuzhiyun&pcie_bus_clk {
840*4882a593Smuzhiyun	clock-frequency = <100000000>;
841*4882a593Smuzhiyun};
842*4882a593Smuzhiyun
843*4882a593Smuzhiyun&pciec {
844*4882a593Smuzhiyun	status = "okay";
845*4882a593Smuzhiyun};
846*4882a593Smuzhiyun
847*4882a593Smuzhiyun&cpu0 {
848*4882a593Smuzhiyun	cpu0-supply = <&vdd_dvfs>;
849*4882a593Smuzhiyun};
850*4882a593Smuzhiyun
851*4882a593Smuzhiyun/* HDMI video input */
852*4882a593Smuzhiyun&vin0 {
853*4882a593Smuzhiyun	status = "okay";
854*4882a593Smuzhiyun	pinctrl-0 = <&vin0_pins>;
855*4882a593Smuzhiyun	pinctrl-names = "default";
856*4882a593Smuzhiyun
857*4882a593Smuzhiyun	port {
858*4882a593Smuzhiyun		vin0ep2: endpoint {
859*4882a593Smuzhiyun			remote-endpoint = <&adv7612_out>;
860*4882a593Smuzhiyun			bus-width = <24>;
861*4882a593Smuzhiyun			hsync-active = <0>;
862*4882a593Smuzhiyun			vsync-active = <0>;
863*4882a593Smuzhiyun			pclk-sample = <1>;
864*4882a593Smuzhiyun			data-active = <1>;
865*4882a593Smuzhiyun		};
866*4882a593Smuzhiyun	};
867*4882a593Smuzhiyun};
868*4882a593Smuzhiyun
869*4882a593Smuzhiyun/* composite video input */
870*4882a593Smuzhiyun&vin1 {
871*4882a593Smuzhiyun	status = "okay";
872*4882a593Smuzhiyun	pinctrl-0 = <&vin1_pins>;
873*4882a593Smuzhiyun	pinctrl-names = "default";
874*4882a593Smuzhiyun
875*4882a593Smuzhiyun	port {
876*4882a593Smuzhiyun		vin1ep: endpoint {
877*4882a593Smuzhiyun			remote-endpoint = <&adv7180>;
878*4882a593Smuzhiyun			bus-width = <8>;
879*4882a593Smuzhiyun		};
880*4882a593Smuzhiyun	};
881*4882a593Smuzhiyun};
882*4882a593Smuzhiyun
883*4882a593Smuzhiyun&rcar_sound {
884*4882a593Smuzhiyun	pinctrl-0 = <&sound_pins &sound_clk_pins>;
885*4882a593Smuzhiyun	pinctrl-names = "default";
886*4882a593Smuzhiyun
887*4882a593Smuzhiyun	/* Single DAI */
888*4882a593Smuzhiyun	#sound-dai-cells = <0>;
889*4882a593Smuzhiyun
890*4882a593Smuzhiyun	status = "okay";
891*4882a593Smuzhiyun
892*4882a593Smuzhiyun	rcar_sound,dai {
893*4882a593Smuzhiyun		dai0 {
894*4882a593Smuzhiyun			playback = <&ssi0 &src2 &dvc0>;
895*4882a593Smuzhiyun			capture  = <&ssi1 &src3 &dvc1>;
896*4882a593Smuzhiyun		};
897*4882a593Smuzhiyun	};
898*4882a593Smuzhiyun};
899*4882a593Smuzhiyun
900*4882a593Smuzhiyun&ssi1 {
901*4882a593Smuzhiyun	shared-pin;
902*4882a593Smuzhiyun};
903