1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Caninos Labrador Base Board 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (c) 2019-2020 Matheus Castello 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun/dts-v1/; 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun#include "owl-s500-labrador-v2.dtsi" 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun/ { 13*4882a593Smuzhiyun model = "Caninos Labrador Core v2 on Labrador Base-M v1"; 14*4882a593Smuzhiyun compatible = "caninos,labrador-base-m", 15*4882a593Smuzhiyun "caninos,labrador-v2", "actions,s500"; 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun aliases { 18*4882a593Smuzhiyun serial3 = &uart3; 19*4882a593Smuzhiyun }; 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun chosen { 22*4882a593Smuzhiyun stdout-path = "serial3:115200n8"; 23*4882a593Smuzhiyun }; 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun uart3_clk: uart3-clk { 26*4882a593Smuzhiyun compatible = "fixed-clock"; 27*4882a593Smuzhiyun clock-frequency = <921600>; 28*4882a593Smuzhiyun #clock-cells = <0>; 29*4882a593Smuzhiyun }; 30*4882a593Smuzhiyun}; 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun&uart3 { 33*4882a593Smuzhiyun status = "okay"; 34*4882a593Smuzhiyun clocks = <&uart3_clk>; 35*4882a593Smuzhiyun}; 36