1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0-only 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Device Tree Source for OMAP4 clock data 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (C) 2013 Texas Instruments, Inc. 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun&prm_clocks { 8*4882a593Smuzhiyun div_ts_ck: div_ts_ck@1888 { 9*4882a593Smuzhiyun #clock-cells = <0>; 10*4882a593Smuzhiyun compatible = "ti,divider-clock"; 11*4882a593Smuzhiyun clocks = <&l4_wkup_clk_mux_ck>; 12*4882a593Smuzhiyun ti,bit-shift = <24>; 13*4882a593Smuzhiyun reg = <0x1888>; 14*4882a593Smuzhiyun ti,dividers = <8>, <16>, <32>; 15*4882a593Smuzhiyun }; 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun bandgap_ts_fclk: bandgap_ts_fclk@1888 { 18*4882a593Smuzhiyun #clock-cells = <0>; 19*4882a593Smuzhiyun compatible = "ti,gate-clock"; 20*4882a593Smuzhiyun clocks = <&div_ts_ck>; 21*4882a593Smuzhiyun ti,bit-shift = <8>; 22*4882a593Smuzhiyun reg = <0x1888>; 23*4882a593Smuzhiyun }; 24*4882a593Smuzhiyun}; 25