1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0-only 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Copyright (C) 2014 Joachim Eastwood <manabian@gmail.com> 4*4882a593Smuzhiyun * Copyright (C) 2012 Variscite Ltd. - https://www.variscite.com 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun#include "omap4460.dtsi" 7*4882a593Smuzhiyun#include "omap4-mcpdm.dtsi" 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun/ { 10*4882a593Smuzhiyun model = "Variscite VAR-SOM-OM44"; 11*4882a593Smuzhiyun compatible = "variscite,var-som-om44", "ti,omap4460", "ti,omap4"; 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun memory@80000000 { 14*4882a593Smuzhiyun device_type = "memory"; 15*4882a593Smuzhiyun reg = <0x80000000 0x40000000>; /* 1 GB */ 16*4882a593Smuzhiyun }; 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun sound: sound { 19*4882a593Smuzhiyun compatible = "ti,abe-twl6040"; 20*4882a593Smuzhiyun ti,model = "VAR-SOM-OM44"; 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun ti,mclk-freq = <38400000>; 23*4882a593Smuzhiyun ti,mcpdm = <&mcpdm>; 24*4882a593Smuzhiyun ti,twl6040 = <&twl6040>; 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun /* Audio routing */ 27*4882a593Smuzhiyun ti,audio-routing = 28*4882a593Smuzhiyun "Headset Stereophone", "HSOL", 29*4882a593Smuzhiyun "Headset Stereophone", "HSOR", 30*4882a593Smuzhiyun "AFML", "Line In", 31*4882a593Smuzhiyun "AFMR", "Line In"; 32*4882a593Smuzhiyun }; 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun /* HS USB Host PHY on PORT 1 */ 35*4882a593Smuzhiyun hsusb1_phy: hsusb1_phy { 36*4882a593Smuzhiyun compatible = "usb-nop-xceiv"; 37*4882a593Smuzhiyun pinctrl-names = "default"; 38*4882a593Smuzhiyun pinctrl-0 = < 39*4882a593Smuzhiyun &hsusbb1_phy_clk_pins 40*4882a593Smuzhiyun &hsusbb1_phy_rst_pins 41*4882a593Smuzhiyun >; 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun reset-gpios = <&gpio6 17 GPIO_ACTIVE_LOW>; /* gpio 177 */ 44*4882a593Smuzhiyun vcc-supply = <&vbat>; 45*4882a593Smuzhiyun #phy-cells = <0>; 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun clocks = <&auxclk3_ck>; 48*4882a593Smuzhiyun clock-names = "main_clk"; 49*4882a593Smuzhiyun clock-frequency = <19200000>; 50*4882a593Smuzhiyun }; 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun vbat: fixedregulator-vbat { 53*4882a593Smuzhiyun compatible = "regulator-fixed"; 54*4882a593Smuzhiyun regulator-name = "VBAT"; 55*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 56*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 57*4882a593Smuzhiyun regulator-always-on; 58*4882a593Smuzhiyun regulator-boot-on; 59*4882a593Smuzhiyun }; 60*4882a593Smuzhiyun}; 61*4882a593Smuzhiyun 62*4882a593Smuzhiyun&omap4_pmx_core { 63*4882a593Smuzhiyun pinctrl-names = "default"; 64*4882a593Smuzhiyun pinctrl-0 = < 65*4882a593Smuzhiyun &hsusbb1_pins 66*4882a593Smuzhiyun >; 67*4882a593Smuzhiyun 68*4882a593Smuzhiyun twl6040_pins: pinmux_twl6040_pins { 69*4882a593Smuzhiyun pinctrl-single,pins = < 70*4882a593Smuzhiyun OMAP4_IOPAD(0x19c, PIN_OUTPUT | MUX_MODE3) /* fref_clk2_out.gpio_182 */ 71*4882a593Smuzhiyun OMAP4_IOPAD(0x1a0, PIN_INPUT | MUX_MODE0) /* sys_nirq2.sys_nirq2 */ 72*4882a593Smuzhiyun >; 73*4882a593Smuzhiyun }; 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun tsc2004_pins: pinmux_tsc2004_pins { 76*4882a593Smuzhiyun pinctrl-single,pins = < 77*4882a593Smuzhiyun OMAP4_IOPAD(0x090, PIN_INPUT | MUX_MODE3) /* gpmc_ncs4.gpio_101 (irq) */ 78*4882a593Smuzhiyun OMAP4_IOPAD(0x092, PIN_OUTPUT | MUX_MODE3) /* gpmc_ncs5.gpio_102 (rst) */ 79*4882a593Smuzhiyun >; 80*4882a593Smuzhiyun }; 81*4882a593Smuzhiyun 82*4882a593Smuzhiyun uart3_pins: pinmux_uart3_pins { 83*4882a593Smuzhiyun pinctrl-single,pins = < 84*4882a593Smuzhiyun OMAP4_IOPAD(0x140, PIN_INPUT_PULLUP | MUX_MODE0) /* uart3_cts_rctx.uart3_cts_rctx */ 85*4882a593Smuzhiyun OMAP4_IOPAD(0x142, PIN_OUTPUT | MUX_MODE0) /* uart3_rts_sd.uart3_rts_sd */ 86*4882a593Smuzhiyun OMAP4_IOPAD(0x144, PIN_INPUT | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */ 87*4882a593Smuzhiyun OMAP4_IOPAD(0x146, PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */ 88*4882a593Smuzhiyun >; 89*4882a593Smuzhiyun }; 90*4882a593Smuzhiyun 91*4882a593Smuzhiyun hsusbb1_pins: pinmux_hsusbb1_pins { 92*4882a593Smuzhiyun pinctrl-single,pins = < 93*4882a593Smuzhiyun OMAP4_IOPAD(0x0c2, PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_clk.usbb1_ulpiphy_clk */ 94*4882a593Smuzhiyun OMAP4_IOPAD(0x0c4, PIN_OUTPUT | MUX_MODE4) /* usbb1_ulpitll_stp.usbb1_ulpiphy_stp */ 95*4882a593Smuzhiyun OMAP4_IOPAD(0x0c6, PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dir.usbb1_ulpiphy_dir */ 96*4882a593Smuzhiyun OMAP4_IOPAD(0x0c8, PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_nxt.usbb1_ulpiphy_nxt */ 97*4882a593Smuzhiyun OMAP4_IOPAD(0x0ca, PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dat0.usbb1_ulpiphy_dat0 */ 98*4882a593Smuzhiyun OMAP4_IOPAD(0x0cc, PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dat1.usbb1_ulpiphy_dat1 */ 99*4882a593Smuzhiyun OMAP4_IOPAD(0x0ce, PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dat2.usbb1_ulpiphy_dat2 */ 100*4882a593Smuzhiyun OMAP4_IOPAD(0x0d0, PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dat3.usbb1_ulpiphy_dat3 */ 101*4882a593Smuzhiyun OMAP4_IOPAD(0x0d2, PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dat4.usbb1_ulpiphy_dat4 */ 102*4882a593Smuzhiyun OMAP4_IOPAD(0x0d4, PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dat5.usbb1_ulpiphy_dat5 */ 103*4882a593Smuzhiyun OMAP4_IOPAD(0x0d6, PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dat6.usbb1_ulpiphy_dat6 */ 104*4882a593Smuzhiyun OMAP4_IOPAD(0x0d8, PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dat7.usbb1_ulpiphy_dat7 */ 105*4882a593Smuzhiyun >; 106*4882a593Smuzhiyun }; 107*4882a593Smuzhiyun 108*4882a593Smuzhiyun hsusbb1_phy_rst_pins: pinmux_hsusbb1_phy_rst_pins { 109*4882a593Smuzhiyun pinctrl-single,pins = < 110*4882a593Smuzhiyun OMAP4_IOPAD(0x18c, PIN_OUTPUT | MUX_MODE3) /* kpd_row2.gpio_177 */ 111*4882a593Smuzhiyun >; 112*4882a593Smuzhiyun }; 113*4882a593Smuzhiyun 114*4882a593Smuzhiyun i2c1_pins: pinmux_i2c1_pins { 115*4882a593Smuzhiyun pinctrl-single,pins = < 116*4882a593Smuzhiyun OMAP4_IOPAD(0x122, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl */ 117*4882a593Smuzhiyun OMAP4_IOPAD(0x124, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_sda */ 118*4882a593Smuzhiyun >; 119*4882a593Smuzhiyun }; 120*4882a593Smuzhiyun 121*4882a593Smuzhiyun i2c3_pins: pinmux_i2c3_pins { 122*4882a593Smuzhiyun pinctrl-single,pins = < 123*4882a593Smuzhiyun OMAP4_IOPAD(0x12a, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_scl */ 124*4882a593Smuzhiyun OMAP4_IOPAD(0x12c, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_sda */ 125*4882a593Smuzhiyun >; 126*4882a593Smuzhiyun }; 127*4882a593Smuzhiyun 128*4882a593Smuzhiyun mmc1_pins: pinmux_mmc1_pins { 129*4882a593Smuzhiyun pinctrl-single,pins = < 130*4882a593Smuzhiyun OMAP4_IOPAD(0x0e2, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */ 131*4882a593Smuzhiyun OMAP4_IOPAD(0x0e4, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd.sdmmc1_cmd */ 132*4882a593Smuzhiyun OMAP4_IOPAD(0x0e6, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0.sdmmc1_dat0 */ 133*4882a593Smuzhiyun OMAP4_IOPAD(0x0e8, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */ 134*4882a593Smuzhiyun OMAP4_IOPAD(0x0ea, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2.sdmmc1_dat2 */ 135*4882a593Smuzhiyun OMAP4_IOPAD(0x0ec, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */ 136*4882a593Smuzhiyun >; 137*4882a593Smuzhiyun }; 138*4882a593Smuzhiyun}; 139*4882a593Smuzhiyun 140*4882a593Smuzhiyun&omap4_pmx_wkup { 141*4882a593Smuzhiyun pinctrl-names = "default"; 142*4882a593Smuzhiyun pinctrl-0 = < 143*4882a593Smuzhiyun &hsusbb1_hub_rst_pins 144*4882a593Smuzhiyun &lan7500_rst_pins 145*4882a593Smuzhiyun >; 146*4882a593Smuzhiyun 147*4882a593Smuzhiyun hsusbb1_phy_clk_pins: pinmux_hsusbb1_phy_clk_pins { 148*4882a593Smuzhiyun pinctrl-single,pins = < 149*4882a593Smuzhiyun OMAP4_IOPAD(0x058, PIN_OUTPUT | MUX_MODE0) /* fref_clk3_out */ 150*4882a593Smuzhiyun >; 151*4882a593Smuzhiyun }; 152*4882a593Smuzhiyun 153*4882a593Smuzhiyun hsusbb1_hub_rst_pins: pinmux_hsusbb1_hub_rst_pins { 154*4882a593Smuzhiyun pinctrl-single,pins = < 155*4882a593Smuzhiyun OMAP4_IOPAD(0x042, PIN_OUTPUT | MUX_MODE3) /* gpio_wk1 */ 156*4882a593Smuzhiyun >; 157*4882a593Smuzhiyun }; 158*4882a593Smuzhiyun 159*4882a593Smuzhiyun lan7500_rst_pins: pinmux_lan7500_rst_pins { 160*4882a593Smuzhiyun pinctrl-single,pins = < 161*4882a593Smuzhiyun OMAP4_IOPAD(0x040, PIN_OUTPUT | MUX_MODE3) /* gpio_wk0 */ 162*4882a593Smuzhiyun >; 163*4882a593Smuzhiyun }; 164*4882a593Smuzhiyun}; 165*4882a593Smuzhiyun 166*4882a593Smuzhiyun&i2c1 { 167*4882a593Smuzhiyun pinctrl-names = "default"; 168*4882a593Smuzhiyun pinctrl-0 = <&i2c1_pins>; 169*4882a593Smuzhiyun status = "okay"; 170*4882a593Smuzhiyun 171*4882a593Smuzhiyun clock-frequency = <400000>; 172*4882a593Smuzhiyun 173*4882a593Smuzhiyun twl: twl@48 { 174*4882a593Smuzhiyun reg = <0x48>; 175*4882a593Smuzhiyun /* SPI = 0, IRQ# = 7, 4 = active high level-sensitive */ 176*4882a593Smuzhiyun interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; /* IRQ_SYS_1N cascaded to gic */ 177*4882a593Smuzhiyun }; 178*4882a593Smuzhiyun 179*4882a593Smuzhiyun twl6040: twl@4b { 180*4882a593Smuzhiyun compatible = "ti,twl6040"; 181*4882a593Smuzhiyun #clock-cells = <0>; 182*4882a593Smuzhiyun reg = <0x4b>; 183*4882a593Smuzhiyun 184*4882a593Smuzhiyun pinctrl-names = "default"; 185*4882a593Smuzhiyun pinctrl-0 = <&twl6040_pins>; 186*4882a593Smuzhiyun 187*4882a593Smuzhiyun /* SPI = 0, IRQ# = 119, 4 = active high level-sensitive */ 188*4882a593Smuzhiyun interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>; /* IRQ_SYS_2N cascaded to gic */ 189*4882a593Smuzhiyun ti,audpwron-gpio = <&gpio6 22 GPIO_ACTIVE_HIGH>; /* gpio 182 */ 190*4882a593Smuzhiyun 191*4882a593Smuzhiyun vio-supply = <&v1v8>; 192*4882a593Smuzhiyun v2v1-supply = <&v2v1>; 193*4882a593Smuzhiyun enable-active-high; 194*4882a593Smuzhiyun }; 195*4882a593Smuzhiyun}; 196*4882a593Smuzhiyun 197*4882a593Smuzhiyun#include "twl6030.dtsi" 198*4882a593Smuzhiyun#include "twl6030_omap4.dtsi" 199*4882a593Smuzhiyun 200*4882a593Smuzhiyun&vusim { 201*4882a593Smuzhiyun regulator-min-microvolt = <3000000>; 202*4882a593Smuzhiyun regulator-max-microvolt = <3000000>; 203*4882a593Smuzhiyun regulator-always-on; 204*4882a593Smuzhiyun}; 205*4882a593Smuzhiyun 206*4882a593Smuzhiyun&i2c2 { 207*4882a593Smuzhiyun status = "disabled"; 208*4882a593Smuzhiyun}; 209*4882a593Smuzhiyun 210*4882a593Smuzhiyun&i2c3 { 211*4882a593Smuzhiyun pinctrl-names = "default"; 212*4882a593Smuzhiyun pinctrl-0 = <&i2c3_pins>; 213*4882a593Smuzhiyun status = "okay"; 214*4882a593Smuzhiyun 215*4882a593Smuzhiyun clock-frequency = <400000>; 216*4882a593Smuzhiyun 217*4882a593Smuzhiyun touchscreen: tsc2004@48 { 218*4882a593Smuzhiyun compatible = "ti,tsc2004"; 219*4882a593Smuzhiyun reg = <0x48>; 220*4882a593Smuzhiyun pinctrl-names = "default"; 221*4882a593Smuzhiyun pinctrl-0 = <&tsc2004_pins>; 222*4882a593Smuzhiyun interrupt-parent = <&gpio4>; 223*4882a593Smuzhiyun interrupts = <5 IRQ_TYPE_LEVEL_LOW>; /* gpio 101 */ 224*4882a593Smuzhiyun status = "disabled"; 225*4882a593Smuzhiyun }; 226*4882a593Smuzhiyun 227*4882a593Smuzhiyun tmp105@49 { 228*4882a593Smuzhiyun compatible = "ti,tmp105"; 229*4882a593Smuzhiyun reg = <0x49>; 230*4882a593Smuzhiyun }; 231*4882a593Smuzhiyun 232*4882a593Smuzhiyun eeprom@50 { 233*4882a593Smuzhiyun compatible = "microchip,24c32", "atmel,24c32"; 234*4882a593Smuzhiyun reg = <0x50>; 235*4882a593Smuzhiyun }; 236*4882a593Smuzhiyun}; 237*4882a593Smuzhiyun 238*4882a593Smuzhiyun&i2c4 { 239*4882a593Smuzhiyun status = "disabled"; 240*4882a593Smuzhiyun}; 241*4882a593Smuzhiyun 242*4882a593Smuzhiyun&gpmc { 243*4882a593Smuzhiyun status = "disabled"; 244*4882a593Smuzhiyun}; 245*4882a593Smuzhiyun 246*4882a593Smuzhiyun&mcspi1 { 247*4882a593Smuzhiyun status = "disabled"; 248*4882a593Smuzhiyun}; 249*4882a593Smuzhiyun 250*4882a593Smuzhiyun&mcspi2 { 251*4882a593Smuzhiyun status = "disabled"; 252*4882a593Smuzhiyun}; 253*4882a593Smuzhiyun 254*4882a593Smuzhiyun&mcspi3 { 255*4882a593Smuzhiyun status = "disabled"; 256*4882a593Smuzhiyun}; 257*4882a593Smuzhiyun 258*4882a593Smuzhiyun&mcspi4 { 259*4882a593Smuzhiyun status = "disabled"; 260*4882a593Smuzhiyun}; 261*4882a593Smuzhiyun 262*4882a593Smuzhiyun&mmc1 { 263*4882a593Smuzhiyun pinctrl-names = "default"; 264*4882a593Smuzhiyun pinctrl-0 = <&mmc1_pins>; 265*4882a593Smuzhiyun vmmc-supply = <&vmmc>; 266*4882a593Smuzhiyun bus-width = <4>; 267*4882a593Smuzhiyun ti,non-removable; 268*4882a593Smuzhiyun status = "okay"; 269*4882a593Smuzhiyun}; 270*4882a593Smuzhiyun 271*4882a593Smuzhiyun&mmc2 { 272*4882a593Smuzhiyun status = "disabled"; 273*4882a593Smuzhiyun}; 274*4882a593Smuzhiyun 275*4882a593Smuzhiyun&mmc3 { 276*4882a593Smuzhiyun status = "disabled"; 277*4882a593Smuzhiyun}; 278*4882a593Smuzhiyun 279*4882a593Smuzhiyun&mmc4 { 280*4882a593Smuzhiyun status = "disabled"; 281*4882a593Smuzhiyun}; 282*4882a593Smuzhiyun 283*4882a593Smuzhiyun&mmc5 { 284*4882a593Smuzhiyun status = "disabled"; 285*4882a593Smuzhiyun}; 286*4882a593Smuzhiyun 287*4882a593Smuzhiyun&uart1 { 288*4882a593Smuzhiyun status = "disabled"; 289*4882a593Smuzhiyun}; 290*4882a593Smuzhiyun 291*4882a593Smuzhiyun&uart2 { 292*4882a593Smuzhiyun status = "disabled"; 293*4882a593Smuzhiyun}; 294*4882a593Smuzhiyun 295*4882a593Smuzhiyun&uart3 { 296*4882a593Smuzhiyun pinctrl-names = "default"; 297*4882a593Smuzhiyun pinctrl-0 = <&uart3_pins>; 298*4882a593Smuzhiyun status = "okay"; 299*4882a593Smuzhiyun}; 300*4882a593Smuzhiyun 301*4882a593Smuzhiyun&uart4 { 302*4882a593Smuzhiyun status = "disabled"; 303*4882a593Smuzhiyun}; 304*4882a593Smuzhiyun 305*4882a593Smuzhiyun&keypad { 306*4882a593Smuzhiyun status = "disabled"; 307*4882a593Smuzhiyun}; 308*4882a593Smuzhiyun 309*4882a593Smuzhiyun&twl_usb_comparator { 310*4882a593Smuzhiyun usb-supply = <&vusb>; 311*4882a593Smuzhiyun}; 312*4882a593Smuzhiyun 313*4882a593Smuzhiyun&usb_otg_hs { 314*4882a593Smuzhiyun interface-type = <1>; 315*4882a593Smuzhiyun mode = <3>; 316*4882a593Smuzhiyun power = <50>; 317*4882a593Smuzhiyun}; 318*4882a593Smuzhiyun 319*4882a593Smuzhiyun&usbhshost { 320*4882a593Smuzhiyun port1-mode = "ehci-phy"; 321*4882a593Smuzhiyun}; 322*4882a593Smuzhiyun 323*4882a593Smuzhiyun&usbhsehci { 324*4882a593Smuzhiyun phys = <&hsusb1_phy>; 325*4882a593Smuzhiyun}; 326