1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Support for CompuLab CM-T3517 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun/dts-v1/; 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun#include "am3517.dtsi" 8*4882a593Smuzhiyun#include "omap3-cm-t3x.dtsi" 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun/ { 11*4882a593Smuzhiyun model = "CompuLab CM-T3517"; 12*4882a593Smuzhiyun compatible = "compulab,omap3-cm-t3517", "ti,am3517", "ti,omap3"; 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun vmmc: regulator-vmmc { 15*4882a593Smuzhiyun compatible = "regulator-fixed"; 16*4882a593Smuzhiyun regulator-name = "vmmc"; 17*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 18*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 19*4882a593Smuzhiyun }; 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun wl12xx_vmmc2: wl12xx_vmmc2 { 22*4882a593Smuzhiyun compatible = "regulator-fixed"; 23*4882a593Smuzhiyun regulator-name = "vw1271"; 24*4882a593Smuzhiyun pinctrl-names = "default"; 25*4882a593Smuzhiyun pinctrl-0 = < 26*4882a593Smuzhiyun &wl12xx_wkup_pins 27*4882a593Smuzhiyun &wl12xx_core_pins 28*4882a593Smuzhiyun >; 29*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 30*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 31*4882a593Smuzhiyun gpio = <&gpio1 6 GPIO_ACTIVE_HIGH >; /* gpio6 */ 32*4882a593Smuzhiyun startup-delay-us = <20000>; 33*4882a593Smuzhiyun enable-active-high; 34*4882a593Smuzhiyun }; 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun wl12xx_vaux2: wl12xx_vaux2 { 37*4882a593Smuzhiyun compatible = "regulator-fixed"; 38*4882a593Smuzhiyun regulator-name = "vwl1271_vaux2"; 39*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 40*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 41*4882a593Smuzhiyun }; 42*4882a593Smuzhiyun}; 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun&omap3_pmx_wkup { 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun wl12xx_wkup_pins: pinmux_wl12xx_wkup_pins { 47*4882a593Smuzhiyun pinctrl-single,pins = < 48*4882a593Smuzhiyun OMAP3_WKUP_IOPAD(0x2a0e, PIN_OUTPUT | MUX_MODE4) /* sys_boot2.gpio_4 */ 49*4882a593Smuzhiyun OMAP3_WKUP_IOPAD(0x2a12, PIN_OUTPUT | MUX_MODE4) /* sys_boot4.gpio_6 */ 50*4882a593Smuzhiyun >; 51*4882a593Smuzhiyun }; 52*4882a593Smuzhiyun}; 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun&omap3_pmx_core { 55*4882a593Smuzhiyun 56*4882a593Smuzhiyun phy1_reset_pins: pinmux_hsusb1_phy_reset_pins { 57*4882a593Smuzhiyun pinctrl-single,pins = < 58*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE4) /* uart2_tx.gpio_146 */ 59*4882a593Smuzhiyun >; 60*4882a593Smuzhiyun }; 61*4882a593Smuzhiyun 62*4882a593Smuzhiyun phy2_reset_pins: pinmux_hsusb2_phy_reset_pins { 63*4882a593Smuzhiyun pinctrl-single,pins = < 64*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x217a, PIN_OUTPUT | MUX_MODE4) /* uart2_rx.gpio_147 */ 65*4882a593Smuzhiyun >; 66*4882a593Smuzhiyun }; 67*4882a593Smuzhiyun 68*4882a593Smuzhiyun otg_drv_vbus: pinmux_otg_drv_vbus { 69*4882a593Smuzhiyun pinctrl-single,pins = < 70*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x2210, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rmii_50MHz_clk.usb0_drvvbus */ 71*4882a593Smuzhiyun >; 72*4882a593Smuzhiyun }; 73*4882a593Smuzhiyun 74*4882a593Smuzhiyun mmc2_pins: pinmux_mmc2_pins { 75*4882a593Smuzhiyun pinctrl-single,pins = < 76*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk.sdmmc2_clk */ 77*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd.sdmmc2_cmd */ 78*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0.sdmmc2_dat0 */ 79*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1.sdmmc2_dat1 */ 80*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2.sdmmc2_dat2 */ 81*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3.sdmmc2_dat3 */ 82*4882a593Smuzhiyun >; 83*4882a593Smuzhiyun }; 84*4882a593Smuzhiyun 85*4882a593Smuzhiyun wl12xx_core_pins: pinmux_wl12xx_core_pins { 86*4882a593Smuzhiyun pinctrl-single,pins = < 87*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20b8, PIN_OUTPUT | MUX_MODE4) /* gpmc_ncs5.gpio_56 */ 88*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x2176, PIN_INPUT_PULLUP | MUX_MODE4) /* uart2_rts.gpio_145 */ 89*4882a593Smuzhiyun >; 90*4882a593Smuzhiyun }; 91*4882a593Smuzhiyun 92*4882a593Smuzhiyun usb_hub_pins: pinmux_usb_hub_pins { 93*4882a593Smuzhiyun pinctrl-single,pins = < 94*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x2184, PIN_OUTPUT | MUX_MODE4) /* mcbsp4_clkx.gpio_152 - USB HUB RST */ 95*4882a593Smuzhiyun >; 96*4882a593Smuzhiyun }; 97*4882a593Smuzhiyun}; 98*4882a593Smuzhiyun 99*4882a593Smuzhiyun&hsusb1_phy { 100*4882a593Smuzhiyun pinctrl-names = "default"; 101*4882a593Smuzhiyun pinctrl-0 = <&phy1_reset_pins>; 102*4882a593Smuzhiyun reset-gpios = <&gpio5 18 GPIO_ACTIVE_LOW>; 103*4882a593Smuzhiyun}; 104*4882a593Smuzhiyun 105*4882a593Smuzhiyun&hsusb2_phy { 106*4882a593Smuzhiyun pinctrl-names = "default"; 107*4882a593Smuzhiyun pinctrl-0 = <&phy2_reset_pins>; 108*4882a593Smuzhiyun reset-gpios = <&gpio5 19 GPIO_ACTIVE_LOW>; 109*4882a593Smuzhiyun}; 110*4882a593Smuzhiyun 111*4882a593Smuzhiyun&davinci_emac { 112*4882a593Smuzhiyun status = "okay"; 113*4882a593Smuzhiyun}; 114*4882a593Smuzhiyun 115*4882a593Smuzhiyun&davinci_mdio { 116*4882a593Smuzhiyun status = "okay"; 117*4882a593Smuzhiyun}; 118*4882a593Smuzhiyun 119*4882a593Smuzhiyun&am35x_otg_hs { 120*4882a593Smuzhiyun status = "okay"; 121*4882a593Smuzhiyun pinctrl-names = "default"; 122*4882a593Smuzhiyun pinctrl-0 = <&otg_drv_vbus>; 123*4882a593Smuzhiyun}; 124*4882a593Smuzhiyun 125*4882a593Smuzhiyun&mmc1 { 126*4882a593Smuzhiyun vmmc-supply = <&vmmc>; 127*4882a593Smuzhiyun}; 128*4882a593Smuzhiyun 129*4882a593Smuzhiyun&mmc2 { 130*4882a593Smuzhiyun pinctrl-names = "default"; 131*4882a593Smuzhiyun pinctrl-0 = <&mmc2_pins>; 132*4882a593Smuzhiyun vmmc-supply = <&wl12xx_vmmc2>; 133*4882a593Smuzhiyun vqmmc-supply = <&wl12xx_vaux2>; 134*4882a593Smuzhiyun non-removable; 135*4882a593Smuzhiyun bus-width = <4>; 136*4882a593Smuzhiyun cap-power-off-card; 137*4882a593Smuzhiyun 138*4882a593Smuzhiyun #address-cells = <1>; 139*4882a593Smuzhiyun #size-cells = <0>; 140*4882a593Smuzhiyun wlcore: wlcore@2 { 141*4882a593Smuzhiyun compatible = "ti,wl1271"; 142*4882a593Smuzhiyun reg = <2>; 143*4882a593Smuzhiyun interrupt-parent = <&gpio5>; 144*4882a593Smuzhiyun interrupts = <17 IRQ_TYPE_EDGE_RISING>; /* gpio 145 */ 145*4882a593Smuzhiyun ref-clock-frequency = <38400000>; 146*4882a593Smuzhiyun }; 147*4882a593Smuzhiyun}; 148*4882a593Smuzhiyun 149*4882a593Smuzhiyun&dss { 150*4882a593Smuzhiyun status = "okay"; 151*4882a593Smuzhiyun 152*4882a593Smuzhiyun pinctrl-names = "default"; 153*4882a593Smuzhiyun pinctrl-0 = < 154*4882a593Smuzhiyun &dss_dpi_pins_common 155*4882a593Smuzhiyun &dss_dpi_pins_cm_t35x 156*4882a593Smuzhiyun >; 157*4882a593Smuzhiyun}; 158*4882a593Smuzhiyun 159