1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0-only 2*4882a593Smuzhiyun/dts-v1/; 3*4882a593Smuzhiyun 4*4882a593Smuzhiyun#include <dt-bindings/input/input.h> 5*4882a593Smuzhiyun#include "omap443x.dtsi" 6*4882a593Smuzhiyun#include "motorola-cpcap-mapphone.dtsi" 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun/ { 9*4882a593Smuzhiyun chosen { 10*4882a593Smuzhiyun stdout-path = &uart3; 11*4882a593Smuzhiyun }; 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun aliases { 14*4882a593Smuzhiyun display0 = &lcd0; 15*4882a593Smuzhiyun display1 = &hdmi0; 16*4882a593Smuzhiyun }; 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun /* 19*4882a593Smuzhiyun * We seem to have only 1021 MB accessible, 1021 - 1022 is locked, 20*4882a593Smuzhiyun * then 1023 - 1024 seems to contain mbm. 21*4882a593Smuzhiyun */ 22*4882a593Smuzhiyun memory { 23*4882a593Smuzhiyun device_type = "memory"; 24*4882a593Smuzhiyun reg = <0x80000000 0x3fd00000>; /* 1021 MB */ 25*4882a593Smuzhiyun }; 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun /* Poweroff GPIO probably connected to CPCAP */ 28*4882a593Smuzhiyun gpio-poweroff { 29*4882a593Smuzhiyun compatible = "gpio-poweroff"; 30*4882a593Smuzhiyun pinctrl-0 = <&poweroff_gpio>; 31*4882a593Smuzhiyun pinctrl-names = "default"; 32*4882a593Smuzhiyun gpios = <&gpio2 18 GPIO_ACTIVE_LOW>; /* gpio50 */ 33*4882a593Smuzhiyun }; 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun hdmi0: connector { 36*4882a593Smuzhiyun compatible = "hdmi-connector"; 37*4882a593Smuzhiyun pinctrl-0 = <&hdmi_hpd_gpio>; 38*4882a593Smuzhiyun pinctrl-names = "default"; 39*4882a593Smuzhiyun label = "hdmi"; 40*4882a593Smuzhiyun type = "d"; 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun hpd-gpios = <&gpio2 31 GPIO_ACTIVE_HIGH>; /* gpio63 */ 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun port { 45*4882a593Smuzhiyun hdmi_connector_in: endpoint { 46*4882a593Smuzhiyun remote-endpoint = <&hdmi_out>; 47*4882a593Smuzhiyun }; 48*4882a593Smuzhiyun }; 49*4882a593Smuzhiyun }; 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun /* 52*4882a593Smuzhiyun * HDMI 5V regulator probably sourced from battery. Let's keep 53*4882a593Smuzhiyun * keep this as always enabled for HDMI to work until we've 54*4882a593Smuzhiyun * figured what the encoder chip is. 55*4882a593Smuzhiyun */ 56*4882a593Smuzhiyun hdmi_regulator: regulator-hdmi { 57*4882a593Smuzhiyun compatible = "regulator-fixed"; 58*4882a593Smuzhiyun regulator-name = "hdmi"; 59*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 60*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 61*4882a593Smuzhiyun gpio = <&gpio2 27 GPIO_ACTIVE_HIGH>; /* gpio59 */ 62*4882a593Smuzhiyun enable-active-high; 63*4882a593Smuzhiyun regulator-always-on; 64*4882a593Smuzhiyun }; 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun /* FS USB Host PHY on port 1 for mdm6600 */ 67*4882a593Smuzhiyun fsusb1_phy: usb-phy@1 { 68*4882a593Smuzhiyun compatible = "motorola,mapphone-mdm6600"; 69*4882a593Smuzhiyun pinctrl-0 = <&usb_mdm6600_pins>; 70*4882a593Smuzhiyun pinctrl-names = "default"; 71*4882a593Smuzhiyun enable-gpios = <&gpio3 31 GPIO_ACTIVE_LOW>; /* gpio_95 */ 72*4882a593Smuzhiyun power-gpios = <&gpio2 22 GPIO_ACTIVE_HIGH>; /* gpio_54 */ 73*4882a593Smuzhiyun reset-gpios = <&gpio2 17 GPIO_ACTIVE_HIGH>; /* gpio_49 */ 74*4882a593Smuzhiyun /* mode: gpio_148 gpio_149 */ 75*4882a593Smuzhiyun motorola,mode-gpios = <&gpio5 20 GPIO_ACTIVE_HIGH>, 76*4882a593Smuzhiyun <&gpio5 21 GPIO_ACTIVE_HIGH>; 77*4882a593Smuzhiyun /* cmd: gpio_103 gpio_104 gpio_142 */ 78*4882a593Smuzhiyun motorola,cmd-gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>, 79*4882a593Smuzhiyun <&gpio4 8 GPIO_ACTIVE_HIGH>, 80*4882a593Smuzhiyun <&gpio5 14 GPIO_ACTIVE_HIGH>; 81*4882a593Smuzhiyun /* status: gpio_52 gpio_53 gpio_55 */ 82*4882a593Smuzhiyun motorola,status-gpios = <&gpio2 20 GPIO_ACTIVE_HIGH>, 83*4882a593Smuzhiyun <&gpio2 21 GPIO_ACTIVE_HIGH>, 84*4882a593Smuzhiyun <&gpio2 23 GPIO_ACTIVE_HIGH>; 85*4882a593Smuzhiyun #phy-cells = <0>; 86*4882a593Smuzhiyun }; 87*4882a593Smuzhiyun 88*4882a593Smuzhiyun /* HS USB host TLL nop-phy on port 2 for w3glte */ 89*4882a593Smuzhiyun hsusb2_phy: usb-phy@2 { 90*4882a593Smuzhiyun compatible = "usb-nop-xceiv"; 91*4882a593Smuzhiyun #phy-cells = <0>; 92*4882a593Smuzhiyun }; 93*4882a593Smuzhiyun 94*4882a593Smuzhiyun /* LCD regulator from sw5 source */ 95*4882a593Smuzhiyun lcd_regulator: regulator-lcd { 96*4882a593Smuzhiyun compatible = "regulator-fixed"; 97*4882a593Smuzhiyun regulator-name = "lcd"; 98*4882a593Smuzhiyun regulator-min-microvolt = <5050000>; 99*4882a593Smuzhiyun regulator-max-microvolt = <5050000>; 100*4882a593Smuzhiyun gpio = <&gpio4 0 GPIO_ACTIVE_HIGH>; /* gpio96 */ 101*4882a593Smuzhiyun enable-active-high; 102*4882a593Smuzhiyun vin-supply = <&sw5>; 103*4882a593Smuzhiyun }; 104*4882a593Smuzhiyun 105*4882a593Smuzhiyun /* This is probably coming straight from the battery.. */ 106*4882a593Smuzhiyun wl12xx_vmmc: regulator-wl12xx { 107*4882a593Smuzhiyun compatible = "regulator-fixed"; 108*4882a593Smuzhiyun regulator-name = "vwl1271"; 109*4882a593Smuzhiyun regulator-min-microvolt = <1650000>; 110*4882a593Smuzhiyun regulator-max-microvolt = <1650000>; 111*4882a593Smuzhiyun gpio = <&gpio3 30 GPIO_ACTIVE_HIGH>; /* gpio94 */ 112*4882a593Smuzhiyun startup-delay-us = <70000>; 113*4882a593Smuzhiyun enable-active-high; 114*4882a593Smuzhiyun }; 115*4882a593Smuzhiyun 116*4882a593Smuzhiyun gpio_keys { 117*4882a593Smuzhiyun compatible = "gpio-keys"; 118*4882a593Smuzhiyun 119*4882a593Smuzhiyun volume_down { 120*4882a593Smuzhiyun label = "Volume Down"; 121*4882a593Smuzhiyun gpios = <&gpio5 26 GPIO_ACTIVE_LOW>; /* gpio154 */ 122*4882a593Smuzhiyun linux,code = <KEY_VOLUMEDOWN>; 123*4882a593Smuzhiyun linux,can-disable; 124*4882a593Smuzhiyun /* Value above 7.95ms for no GPIO hardware debounce */ 125*4882a593Smuzhiyun debounce-interval = <10>; 126*4882a593Smuzhiyun }; 127*4882a593Smuzhiyun 128*4882a593Smuzhiyun slider { 129*4882a593Smuzhiyun label = "Keypad Slide"; 130*4882a593Smuzhiyun gpios = <&gpio4 26 GPIO_ACTIVE_HIGH>; /* gpio122 */ 131*4882a593Smuzhiyun linux,input-type = <EV_SW>; 132*4882a593Smuzhiyun linux,code = <SW_KEYPAD_SLIDE>; 133*4882a593Smuzhiyun linux,can-disable; 134*4882a593Smuzhiyun /* Value above 7.95ms for no GPIO hardware debounce */ 135*4882a593Smuzhiyun debounce-interval = <10>; 136*4882a593Smuzhiyun }; 137*4882a593Smuzhiyun }; 138*4882a593Smuzhiyun 139*4882a593Smuzhiyun soundcard { 140*4882a593Smuzhiyun compatible = "audio-graph-card"; 141*4882a593Smuzhiyun label = "Droid 4 Audio"; 142*4882a593Smuzhiyun 143*4882a593Smuzhiyun widgets = 144*4882a593Smuzhiyun "Speaker", "Earpiece", 145*4882a593Smuzhiyun "Speaker", "Loudspeaker", 146*4882a593Smuzhiyun "Headphone", "Headphone Jack", 147*4882a593Smuzhiyun "Microphone", "Internal Mic"; 148*4882a593Smuzhiyun 149*4882a593Smuzhiyun routing = 150*4882a593Smuzhiyun "Earpiece", "EP", 151*4882a593Smuzhiyun "Loudspeaker", "SPKR", 152*4882a593Smuzhiyun "Headphone Jack", "HSL", 153*4882a593Smuzhiyun "Headphone Jack", "HSR", 154*4882a593Smuzhiyun "MICR", "Internal Mic"; 155*4882a593Smuzhiyun 156*4882a593Smuzhiyun dais = <&mcbsp2_port>, <&mcbsp3_port>; 157*4882a593Smuzhiyun }; 158*4882a593Smuzhiyun 159*4882a593Smuzhiyun pwm8: dmtimer-pwm-8 { 160*4882a593Smuzhiyun pinctrl-names = "default"; 161*4882a593Smuzhiyun pinctrl-0 = <&vibrator_direction_pin>; 162*4882a593Smuzhiyun 163*4882a593Smuzhiyun compatible = "ti,omap-dmtimer-pwm"; 164*4882a593Smuzhiyun #pwm-cells = <3>; 165*4882a593Smuzhiyun ti,timers = <&timer8>; 166*4882a593Smuzhiyun ti,clock-source = <0x01>; 167*4882a593Smuzhiyun }; 168*4882a593Smuzhiyun 169*4882a593Smuzhiyun pwm9: dmtimer-pwm-9 { 170*4882a593Smuzhiyun pinctrl-names = "default"; 171*4882a593Smuzhiyun pinctrl-0 = <&vibrator_enable_pin>; 172*4882a593Smuzhiyun 173*4882a593Smuzhiyun compatible = "ti,omap-dmtimer-pwm"; 174*4882a593Smuzhiyun #pwm-cells = <3>; 175*4882a593Smuzhiyun ti,timers = <&timer9>; 176*4882a593Smuzhiyun ti,clock-source = <0x01>; 177*4882a593Smuzhiyun }; 178*4882a593Smuzhiyun 179*4882a593Smuzhiyun vibrator { 180*4882a593Smuzhiyun compatible = "pwm-vibrator"; 181*4882a593Smuzhiyun pwms = <&pwm9 0 10000000 0>, <&pwm8 0 10000000 0>; 182*4882a593Smuzhiyun pwm-names = "enable", "direction"; 183*4882a593Smuzhiyun direction-duty-cycle-ns = <10000000>; 184*4882a593Smuzhiyun }; 185*4882a593Smuzhiyun 186*4882a593Smuzhiyun backlight: backlight { 187*4882a593Smuzhiyun compatible = "led-backlight"; 188*4882a593Smuzhiyun 189*4882a593Smuzhiyun leds = <&backlight_led>; 190*4882a593Smuzhiyun brightness-levels = <31 63 95 127 159 191 223 255>; 191*4882a593Smuzhiyun default-brightness-level = <6>; 192*4882a593Smuzhiyun }; 193*4882a593Smuzhiyun}; 194*4882a593Smuzhiyun 195*4882a593Smuzhiyun&dss { 196*4882a593Smuzhiyun status = "okay"; 197*4882a593Smuzhiyun}; 198*4882a593Smuzhiyun 199*4882a593Smuzhiyun&dsi1 { 200*4882a593Smuzhiyun status = "okay"; 201*4882a593Smuzhiyun vdd-supply = <&vcsi>; 202*4882a593Smuzhiyun 203*4882a593Smuzhiyun port { 204*4882a593Smuzhiyun dsi1_out_ep: endpoint { 205*4882a593Smuzhiyun remote-endpoint = <&lcd0_in>; 206*4882a593Smuzhiyun lanes = <0 1 2 3 4 5>; 207*4882a593Smuzhiyun }; 208*4882a593Smuzhiyun }; 209*4882a593Smuzhiyun 210*4882a593Smuzhiyun lcd0: panel@0 { 211*4882a593Smuzhiyun compatible = "motorola,droid4-panel", "panel-dsi-cm"; 212*4882a593Smuzhiyun reg = <0>; 213*4882a593Smuzhiyun label = "lcd0"; 214*4882a593Smuzhiyun vddi-supply = <&lcd_regulator>; 215*4882a593Smuzhiyun reset-gpios = <&gpio4 5 GPIO_ACTIVE_HIGH>; /* gpio101 */ 216*4882a593Smuzhiyun 217*4882a593Smuzhiyun backlight = <&backlight>; 218*4882a593Smuzhiyun 219*4882a593Smuzhiyun width-mm = <50>; 220*4882a593Smuzhiyun height-mm = <89>; 221*4882a593Smuzhiyun rotation = <90>; 222*4882a593Smuzhiyun 223*4882a593Smuzhiyun panel-timing { 224*4882a593Smuzhiyun clock-frequency = <0>; /* Calculated by dsi */ 225*4882a593Smuzhiyun 226*4882a593Smuzhiyun hback-porch = <2>; 227*4882a593Smuzhiyun hactive = <540>; 228*4882a593Smuzhiyun hfront-porch = <0>; 229*4882a593Smuzhiyun hsync-len = <2>; 230*4882a593Smuzhiyun 231*4882a593Smuzhiyun vback-porch = <1>; 232*4882a593Smuzhiyun vactive = <960>; 233*4882a593Smuzhiyun vfront-porch = <0>; 234*4882a593Smuzhiyun vsync-len = <1>; 235*4882a593Smuzhiyun 236*4882a593Smuzhiyun hsync-active = <0>; 237*4882a593Smuzhiyun vsync-active = <0>; 238*4882a593Smuzhiyun de-active = <1>; 239*4882a593Smuzhiyun pixelclk-active = <1>; 240*4882a593Smuzhiyun }; 241*4882a593Smuzhiyun 242*4882a593Smuzhiyun port { 243*4882a593Smuzhiyun lcd0_in: endpoint { 244*4882a593Smuzhiyun remote-endpoint = <&dsi1_out_ep>; 245*4882a593Smuzhiyun }; 246*4882a593Smuzhiyun }; 247*4882a593Smuzhiyun }; 248*4882a593Smuzhiyun}; 249*4882a593Smuzhiyun 250*4882a593Smuzhiyun&hdmi { 251*4882a593Smuzhiyun status = "okay"; 252*4882a593Smuzhiyun pinctrl-0 = <&dss_hdmi_pins>; 253*4882a593Smuzhiyun pinctrl-names = "default"; 254*4882a593Smuzhiyun vdda-supply = <&vdac>; 255*4882a593Smuzhiyun 256*4882a593Smuzhiyun port { 257*4882a593Smuzhiyun hdmi_out: endpoint { 258*4882a593Smuzhiyun remote-endpoint = <&hdmi_connector_in>; 259*4882a593Smuzhiyun lanes = <1 0 3 2 5 4 7 6>; 260*4882a593Smuzhiyun }; 261*4882a593Smuzhiyun }; 262*4882a593Smuzhiyun}; 263*4882a593Smuzhiyun 264*4882a593Smuzhiyun/* Battery NVRAM on 1-wire handled by w1_ds250x driver */ 265*4882a593Smuzhiyun&hdqw1w { 266*4882a593Smuzhiyun pinctrl-0 = <&hdq_pins>; 267*4882a593Smuzhiyun pinctrl-names = "default"; 268*4882a593Smuzhiyun ti,mode = "1w"; 269*4882a593Smuzhiyun}; 270*4882a593Smuzhiyun 271*4882a593Smuzhiyun&i2c1 { 272*4882a593Smuzhiyun tmp105@48 { 273*4882a593Smuzhiyun compatible = "ti,tmp105"; 274*4882a593Smuzhiyun reg = <0x48>; 275*4882a593Smuzhiyun pinctrl-0 = <&tmp105_irq>; 276*4882a593Smuzhiyun pinctrl-names = "default"; 277*4882a593Smuzhiyun /* kpd_row0.gpio_178 */ 278*4882a593Smuzhiyun interrupts-extended = <&gpio6 18 IRQ_TYPE_EDGE_FALLING 279*4882a593Smuzhiyun &omap4_pmx_core 0x14e>; 280*4882a593Smuzhiyun interrupt-names = "irq", "wakeup"; 281*4882a593Smuzhiyun wakeup-source; 282*4882a593Smuzhiyun }; 283*4882a593Smuzhiyun}; 284*4882a593Smuzhiyun 285*4882a593Smuzhiyun&keypad { 286*4882a593Smuzhiyun keypad,num-rows = <8>; 287*4882a593Smuzhiyun keypad,num-columns = <8>; 288*4882a593Smuzhiyun linux,keymap = < 289*4882a593Smuzhiyun 290*4882a593Smuzhiyun /* Row 1 */ 291*4882a593Smuzhiyun MATRIX_KEY(0, 2, KEY_1) 292*4882a593Smuzhiyun MATRIX_KEY(0, 6, KEY_2) 293*4882a593Smuzhiyun MATRIX_KEY(2, 3, KEY_3) 294*4882a593Smuzhiyun MATRIX_KEY(0, 7, KEY_4) 295*4882a593Smuzhiyun MATRIX_KEY(0, 4, KEY_5) 296*4882a593Smuzhiyun MATRIX_KEY(5, 5, KEY_6) 297*4882a593Smuzhiyun MATRIX_KEY(0, 1, KEY_7) 298*4882a593Smuzhiyun MATRIX_KEY(0, 5, KEY_8) 299*4882a593Smuzhiyun MATRIX_KEY(0, 0, KEY_9) 300*4882a593Smuzhiyun MATRIX_KEY(1, 6, KEY_0) 301*4882a593Smuzhiyun 302*4882a593Smuzhiyun /* Row 2 */ 303*4882a593Smuzhiyun MATRIX_KEY(3, 4, KEY_APOSTROPHE) 304*4882a593Smuzhiyun MATRIX_KEY(7, 6, KEY_Q) 305*4882a593Smuzhiyun MATRIX_KEY(7, 7, KEY_W) 306*4882a593Smuzhiyun MATRIX_KEY(7, 2, KEY_E) 307*4882a593Smuzhiyun MATRIX_KEY(1, 0, KEY_R) 308*4882a593Smuzhiyun MATRIX_KEY(4, 4, KEY_T) 309*4882a593Smuzhiyun MATRIX_KEY(1, 2, KEY_Y) 310*4882a593Smuzhiyun MATRIX_KEY(6, 7, KEY_U) 311*4882a593Smuzhiyun MATRIX_KEY(2, 2, KEY_I) 312*4882a593Smuzhiyun MATRIX_KEY(5, 6, KEY_O) 313*4882a593Smuzhiyun MATRIX_KEY(3, 7, KEY_P) 314*4882a593Smuzhiyun MATRIX_KEY(6, 5, KEY_BACKSPACE) 315*4882a593Smuzhiyun 316*4882a593Smuzhiyun /* Row 3 */ 317*4882a593Smuzhiyun MATRIX_KEY(5, 4, KEY_TAB) 318*4882a593Smuzhiyun MATRIX_KEY(5, 7, KEY_A) 319*4882a593Smuzhiyun MATRIX_KEY(2, 7, KEY_S) 320*4882a593Smuzhiyun MATRIX_KEY(7, 0, KEY_D) 321*4882a593Smuzhiyun MATRIX_KEY(2, 6, KEY_F) 322*4882a593Smuzhiyun MATRIX_KEY(6, 2, KEY_G) 323*4882a593Smuzhiyun MATRIX_KEY(6, 6, KEY_H) 324*4882a593Smuzhiyun MATRIX_KEY(1, 4, KEY_J) 325*4882a593Smuzhiyun MATRIX_KEY(3, 1, KEY_K) 326*4882a593Smuzhiyun MATRIX_KEY(2, 1, KEY_L) 327*4882a593Smuzhiyun MATRIX_KEY(4, 6, KEY_ENTER) 328*4882a593Smuzhiyun 329*4882a593Smuzhiyun /* Row 4 */ 330*4882a593Smuzhiyun MATRIX_KEY(3, 6, KEY_LEFTSHIFT) /* KEY_CAPSLOCK */ 331*4882a593Smuzhiyun MATRIX_KEY(6, 1, KEY_Z) 332*4882a593Smuzhiyun MATRIX_KEY(7, 4, KEY_X) 333*4882a593Smuzhiyun MATRIX_KEY(5, 1, KEY_C) 334*4882a593Smuzhiyun MATRIX_KEY(1, 7, KEY_V) 335*4882a593Smuzhiyun MATRIX_KEY(2, 4, KEY_B) 336*4882a593Smuzhiyun MATRIX_KEY(4, 1, KEY_N) 337*4882a593Smuzhiyun MATRIX_KEY(1, 1, KEY_M) 338*4882a593Smuzhiyun MATRIX_KEY(3, 5, KEY_COMMA) 339*4882a593Smuzhiyun MATRIX_KEY(5, 2, KEY_DOT) 340*4882a593Smuzhiyun MATRIX_KEY(6, 3, KEY_UP) 341*4882a593Smuzhiyun MATRIX_KEY(7, 3, KEY_OK) 342*4882a593Smuzhiyun 343*4882a593Smuzhiyun /* Row 5 */ 344*4882a593Smuzhiyun MATRIX_KEY(2, 5, KEY_LEFTCTRL) /* KEY_LEFTSHIFT */ 345*4882a593Smuzhiyun MATRIX_KEY(4, 5, KEY_LEFTALT) /* SYM */ 346*4882a593Smuzhiyun MATRIX_KEY(6, 0, KEY_MINUS) 347*4882a593Smuzhiyun MATRIX_KEY(4, 7, KEY_EQUAL) 348*4882a593Smuzhiyun MATRIX_KEY(1, 5, KEY_SPACE) 349*4882a593Smuzhiyun MATRIX_KEY(3, 2, KEY_SLASH) 350*4882a593Smuzhiyun MATRIX_KEY(4, 3, KEY_LEFT) 351*4882a593Smuzhiyun MATRIX_KEY(5, 3, KEY_DOWN) 352*4882a593Smuzhiyun MATRIX_KEY(3, 3, KEY_RIGHT) 353*4882a593Smuzhiyun 354*4882a593Smuzhiyun /* Side buttons, KEY_VOLUMEDOWN and KEY_PWER are on CPCAP? */ 355*4882a593Smuzhiyun MATRIX_KEY(5, 0, KEY_VOLUMEUP) 356*4882a593Smuzhiyun >; 357*4882a593Smuzhiyun}; 358*4882a593Smuzhiyun 359*4882a593Smuzhiyun&mmc1 { 360*4882a593Smuzhiyun vmmc-supply = <&vwlan2>; 361*4882a593Smuzhiyun bus-width = <4>; 362*4882a593Smuzhiyun cd-gpios = <&gpio6 16 GPIO_ACTIVE_LOW>; /* gpio176 */ 363*4882a593Smuzhiyun}; 364*4882a593Smuzhiyun 365*4882a593Smuzhiyun&mmc2 { 366*4882a593Smuzhiyun vmmc-supply = <&vsdio>; 367*4882a593Smuzhiyun bus-width = <8>; 368*4882a593Smuzhiyun ti,non-removable; 369*4882a593Smuzhiyun}; 370*4882a593Smuzhiyun 371*4882a593Smuzhiyun&mmc3 { 372*4882a593Smuzhiyun pinctrl-names = "default"; 373*4882a593Smuzhiyun pinctrl-0 = <&mmc3_pins>; 374*4882a593Smuzhiyun vmmc-supply = <&wl12xx_vmmc>; 375*4882a593Smuzhiyun /* uart2_tx.sdmmc3_dat1 pad as wakeirq */ 376*4882a593Smuzhiyun interrupts-extended = <&wakeupgen GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH 377*4882a593Smuzhiyun &omap4_pmx_core 0xde>; 378*4882a593Smuzhiyun interrupt-names = "irq", "wakeup"; 379*4882a593Smuzhiyun non-removable; 380*4882a593Smuzhiyun bus-width = <4>; 381*4882a593Smuzhiyun cap-power-off-card; 382*4882a593Smuzhiyun keep-power-in-suspend; 383*4882a593Smuzhiyun 384*4882a593Smuzhiyun #address-cells = <1>; 385*4882a593Smuzhiyun #size-cells = <0>; 386*4882a593Smuzhiyun wlcore: wlcore@2 { 387*4882a593Smuzhiyun compatible = "ti,wl1285", "ti,wl1283"; 388*4882a593Smuzhiyun reg = <2>; 389*4882a593Smuzhiyun /* gpio_100 with gpmc_wait2 pad as wakeirq */ 390*4882a593Smuzhiyun interrupts-extended = <&gpio4 4 IRQ_TYPE_LEVEL_HIGH>, 391*4882a593Smuzhiyun <&omap4_pmx_core 0x4e>; 392*4882a593Smuzhiyun interrupt-names = "irq", "wakeup"; 393*4882a593Smuzhiyun ref-clock-frequency = <26000000>; 394*4882a593Smuzhiyun tcxo-clock-frequency = <26000000>; 395*4882a593Smuzhiyun }; 396*4882a593Smuzhiyun}; 397*4882a593Smuzhiyun 398*4882a593Smuzhiyun&i2c1 { 399*4882a593Smuzhiyun led-controller@38 { 400*4882a593Smuzhiyun compatible = "ti,lm3532"; 401*4882a593Smuzhiyun #address-cells = <1>; 402*4882a593Smuzhiyun #size-cells = <0>; 403*4882a593Smuzhiyun reg = <0x38>; 404*4882a593Smuzhiyun 405*4882a593Smuzhiyun enable-gpios = <&gpio6 12 GPIO_ACTIVE_HIGH>; 406*4882a593Smuzhiyun 407*4882a593Smuzhiyun ramp-up-us = <1024>; 408*4882a593Smuzhiyun ramp-down-us = <8193>; 409*4882a593Smuzhiyun 410*4882a593Smuzhiyun backlight_led: led@0 { 411*4882a593Smuzhiyun reg = <0>; 412*4882a593Smuzhiyun led-sources = <2>; 413*4882a593Smuzhiyun ti,led-mode = <0>; 414*4882a593Smuzhiyun label = ":backlight"; 415*4882a593Smuzhiyun }; 416*4882a593Smuzhiyun 417*4882a593Smuzhiyun led@1 { 418*4882a593Smuzhiyun reg = <1>; 419*4882a593Smuzhiyun led-sources = <1>; 420*4882a593Smuzhiyun ti,led-mode = <0>; 421*4882a593Smuzhiyun label = ":kbd_backlight"; 422*4882a593Smuzhiyun }; 423*4882a593Smuzhiyun }; 424*4882a593Smuzhiyun}; 425*4882a593Smuzhiyun 426*4882a593Smuzhiyun&i2c2 { 427*4882a593Smuzhiyun touchscreen@4a { 428*4882a593Smuzhiyun compatible = "atmel,maxtouch"; 429*4882a593Smuzhiyun reg = <0x4a>; 430*4882a593Smuzhiyun pinctrl-names = "default"; 431*4882a593Smuzhiyun pinctrl-0 = <&touchscreen_pins>; 432*4882a593Smuzhiyun 433*4882a593Smuzhiyun reset-gpios = <&gpio6 13 GPIO_ACTIVE_LOW>; /* gpio173 */ 434*4882a593Smuzhiyun 435*4882a593Smuzhiyun /* gpio_183 with sys_nirq2 pad as wakeup */ 436*4882a593Smuzhiyun interrupts-extended = <&gpio6 23 IRQ_TYPE_LEVEL_LOW>, 437*4882a593Smuzhiyun <&omap4_pmx_core 0x160>; 438*4882a593Smuzhiyun interrupt-names = "irq", "wakeup"; 439*4882a593Smuzhiyun wakeup-source; 440*4882a593Smuzhiyun }; 441*4882a593Smuzhiyun 442*4882a593Smuzhiyun isl29030@44 { 443*4882a593Smuzhiyun compatible = "isil,isl29030"; 444*4882a593Smuzhiyun reg = <0x44>; 445*4882a593Smuzhiyun 446*4882a593Smuzhiyun pinctrl-names = "default"; 447*4882a593Smuzhiyun pinctrl-0 = <&als_proximity_pins>; 448*4882a593Smuzhiyun 449*4882a593Smuzhiyun interrupt-parent = <&gpio6>; 450*4882a593Smuzhiyun interrupts = <17 IRQ_TYPE_LEVEL_LOW>; /* gpio177 */ 451*4882a593Smuzhiyun }; 452*4882a593Smuzhiyun}; 453*4882a593Smuzhiyun 454*4882a593Smuzhiyun&omap4_pmx_core { 455*4882a593Smuzhiyun 456*4882a593Smuzhiyun /* hdmi_hpd.gpio_63 */ 457*4882a593Smuzhiyun hdmi_hpd_gpio: pinmux_hdmi_hpd_pins { 458*4882a593Smuzhiyun pinctrl-single,pins = < 459*4882a593Smuzhiyun OMAP4_IOPAD(0x098, PIN_INPUT | MUX_MODE3) 460*4882a593Smuzhiyun >; 461*4882a593Smuzhiyun }; 462*4882a593Smuzhiyun 463*4882a593Smuzhiyun hdq_pins: pinmux_hdq_pins { 464*4882a593Smuzhiyun pinctrl-single,pins = < 465*4882a593Smuzhiyun /* 0x4a100120 hdq_sio.hdq_sio aa27 */ 466*4882a593Smuzhiyun OMAP4_IOPAD(0x120, PIN_INPUT | MUX_MODE0) 467*4882a593Smuzhiyun >; 468*4882a593Smuzhiyun }; 469*4882a593Smuzhiyun 470*4882a593Smuzhiyun /* hdmi_cec.hdmi_cec, hdmi_scl.hdmi_scl, hdmi_sda.hdmi_sda */ 471*4882a593Smuzhiyun dss_hdmi_pins: pinmux_dss_hdmi_pins { 472*4882a593Smuzhiyun pinctrl-single,pins = < 473*4882a593Smuzhiyun OMAP4_IOPAD(0x09a, PIN_INPUT | MUX_MODE0) 474*4882a593Smuzhiyun OMAP4_IOPAD(0x09c, PIN_INPUT | MUX_MODE0) 475*4882a593Smuzhiyun OMAP4_IOPAD(0x09e, PIN_INPUT | MUX_MODE0) 476*4882a593Smuzhiyun >; 477*4882a593Smuzhiyun }; 478*4882a593Smuzhiyun 479*4882a593Smuzhiyun /* 480*4882a593Smuzhiyun * Android uses PIN_OFF_INPUT_PULLDOWN | PIN_INPUT_PULLUP | MUX_MODE3 481*4882a593Smuzhiyun * for gpio_100, but the internal pull makes wlan flakey on some 482*4882a593Smuzhiyun * devices. Off mode value should be tested if we have off mode working 483*4882a593Smuzhiyun * later on. 484*4882a593Smuzhiyun */ 485*4882a593Smuzhiyun mmc3_pins: pinmux_mmc3_pins { 486*4882a593Smuzhiyun pinctrl-single,pins = < 487*4882a593Smuzhiyun /* 0x4a10008e gpmc_wait2.gpio_100 d23 */ 488*4882a593Smuzhiyun OMAP4_IOPAD(0x08e, PIN_INPUT | MUX_MODE3) 489*4882a593Smuzhiyun 490*4882a593Smuzhiyun /* 0x4a100102 abe_mcbsp1_dx.sdmmc3_dat2 ab25 */ 491*4882a593Smuzhiyun OMAP4_IOPAD(0x102, PIN_INPUT_PULLUP | MUX_MODE1) 492*4882a593Smuzhiyun 493*4882a593Smuzhiyun /* 0x4a100104 abe_mcbsp1_fsx.sdmmc3_dat3 ac27 */ 494*4882a593Smuzhiyun OMAP4_IOPAD(0x104, PIN_INPUT_PULLUP | MUX_MODE1) 495*4882a593Smuzhiyun 496*4882a593Smuzhiyun /* 0x4a100118 uart2_cts.sdmmc3_clk ab26 */ 497*4882a593Smuzhiyun OMAP4_IOPAD(0x118, PIN_INPUT | MUX_MODE1) 498*4882a593Smuzhiyun 499*4882a593Smuzhiyun /* 0x4a10011a uart2_rts.sdmmc3_cmd ab27 */ 500*4882a593Smuzhiyun OMAP4_IOPAD(0x11a, PIN_INPUT_PULLUP | MUX_MODE1) 501*4882a593Smuzhiyun 502*4882a593Smuzhiyun /* 0x4a10011c uart2_rx.sdmmc3_dat0 aa25 */ 503*4882a593Smuzhiyun OMAP4_IOPAD(0x11c, PIN_INPUT_PULLUP | MUX_MODE1) 504*4882a593Smuzhiyun 505*4882a593Smuzhiyun /* 0x4a10011e uart2_tx.sdmmc3_dat1 aa26 */ 506*4882a593Smuzhiyun OMAP4_IOPAD(0x11e, PIN_INPUT_PULLUP | MUX_MODE1) 507*4882a593Smuzhiyun >; 508*4882a593Smuzhiyun }; 509*4882a593Smuzhiyun 510*4882a593Smuzhiyun /* gpmc_ncs0.gpio_50 */ 511*4882a593Smuzhiyun poweroff_gpio: pinmux_poweroff_pins { 512*4882a593Smuzhiyun pinctrl-single,pins = < 513*4882a593Smuzhiyun OMAP4_IOPAD(0x074, PIN_OUTPUT_PULLUP | MUX_MODE3) 514*4882a593Smuzhiyun >; 515*4882a593Smuzhiyun }; 516*4882a593Smuzhiyun 517*4882a593Smuzhiyun /* kpd_row0.gpio_178 */ 518*4882a593Smuzhiyun tmp105_irq: pinmux_tmp105_irq { 519*4882a593Smuzhiyun pinctrl-single,pins = < 520*4882a593Smuzhiyun OMAP4_IOPAD(0x18e, PIN_INPUT_PULLUP | MUX_MODE3) 521*4882a593Smuzhiyun >; 522*4882a593Smuzhiyun }; 523*4882a593Smuzhiyun 524*4882a593Smuzhiyun usb_gpio_mux_sel1: pinmux_usb_gpio_mux_sel1_pins { 525*4882a593Smuzhiyun /* gpio_60 */ 526*4882a593Smuzhiyun pinctrl-single,pins = < 527*4882a593Smuzhiyun OMAP4_IOPAD(0x088, PIN_OUTPUT | MUX_MODE3) 528*4882a593Smuzhiyun >; 529*4882a593Smuzhiyun }; 530*4882a593Smuzhiyun 531*4882a593Smuzhiyun touchscreen_pins: pinmux_touchscreen_pins { 532*4882a593Smuzhiyun pinctrl-single,pins = < 533*4882a593Smuzhiyun OMAP4_IOPAD(0x180, PIN_OUTPUT | MUX_MODE3) 534*4882a593Smuzhiyun OMAP4_IOPAD(0x1a0, PIN_INPUT_PULLUP | MUX_MODE3) 535*4882a593Smuzhiyun >; 536*4882a593Smuzhiyun }; 537*4882a593Smuzhiyun 538*4882a593Smuzhiyun als_proximity_pins: pinmux_als_proximity_pins { 539*4882a593Smuzhiyun pinctrl-single,pins = < 540*4882a593Smuzhiyun OMAP4_IOPAD(0x18c, PIN_INPUT_PULLUP | MUX_MODE3) 541*4882a593Smuzhiyun >; 542*4882a593Smuzhiyun }; 543*4882a593Smuzhiyun 544*4882a593Smuzhiyun usb_mdm6600_pins: pinmux_usb_mdm6600_pins { 545*4882a593Smuzhiyun pinctrl-single,pins = < 546*4882a593Smuzhiyun /* enable 0x4a1000d8 usbb1_ulpitll_dat7.gpio_95 ag16 */ 547*4882a593Smuzhiyun OMAP4_IOPAD(0x0d8, PIN_INPUT | MUX_MODE3) 548*4882a593Smuzhiyun 549*4882a593Smuzhiyun /* power 0x4a10007c gpmc_nwp.gpio_54 c25 */ 550*4882a593Smuzhiyun OMAP4_IOPAD(0x07c, PIN_OUTPUT | MUX_MODE3) 551*4882a593Smuzhiyun 552*4882a593Smuzhiyun /* reset 0x4a100072 gpmc_a25.gpio_49 d20 */ 553*4882a593Smuzhiyun OMAP4_IOPAD(0x072, PIN_OUTPUT | MUX_MODE3) 554*4882a593Smuzhiyun 555*4882a593Smuzhiyun /* mode0/bpwake 0x4a10014e sdmmc5_dat1.gpio_148 af4 */ 556*4882a593Smuzhiyun OMAP4_IOPAD(0x14e, PIN_OUTPUT | MUX_MODE3) 557*4882a593Smuzhiyun 558*4882a593Smuzhiyun /* mode1/apwake 0x4a100150 sdmmc5_dat2.gpio_149 ag3 */ 559*4882a593Smuzhiyun OMAP4_IOPAD(0x150, PIN_OFF_OUTPUT_LOW | PIN_INPUT | MUX_MODE3) 560*4882a593Smuzhiyun 561*4882a593Smuzhiyun /* status0 0x4a10007e gpmc_clk.gpio_55 b22 */ 562*4882a593Smuzhiyun OMAP4_IOPAD(0x07e, PIN_INPUT | MUX_MODE3) 563*4882a593Smuzhiyun 564*4882a593Smuzhiyun /* status1 0x4a10007a gpmc_ncs3.gpio_53 c22 */ 565*4882a593Smuzhiyun OMAP4_IOPAD(0x07a, PIN_INPUT | MUX_MODE3) 566*4882a593Smuzhiyun 567*4882a593Smuzhiyun /* status2 0x4a100078 gpmc_ncs2.gpio_52 d21 */ 568*4882a593Smuzhiyun OMAP4_IOPAD(0x078, PIN_INPUT | MUX_MODE3) 569*4882a593Smuzhiyun 570*4882a593Smuzhiyun /* cmd0 0x4a100094 gpmc_ncs6.gpio_103 c24 */ 571*4882a593Smuzhiyun OMAP4_IOPAD(0x094, PIN_OUTPUT | MUX_MODE3) 572*4882a593Smuzhiyun 573*4882a593Smuzhiyun /* cmd1 0x4a100096 gpmc_ncs7.gpio_104 d24 */ 574*4882a593Smuzhiyun OMAP4_IOPAD(0x096, PIN_OUTPUT | MUX_MODE3) 575*4882a593Smuzhiyun 576*4882a593Smuzhiyun /* cmd2 0x4a100142 uart3_rts_sd.gpio_142 f28 */ 577*4882a593Smuzhiyun OMAP4_IOPAD(0x142, PIN_OUTPUT | MUX_MODE3) 578*4882a593Smuzhiyun >; 579*4882a593Smuzhiyun }; 580*4882a593Smuzhiyun 581*4882a593Smuzhiyun usb_ulpi_pins: pinmux_usb_ulpi_pins { 582*4882a593Smuzhiyun pinctrl-single,pins = < 583*4882a593Smuzhiyun OMAP4_IOPAD(0x196, MUX_MODE7) 584*4882a593Smuzhiyun OMAP4_IOPAD(0x198, MUX_MODE7) 585*4882a593Smuzhiyun OMAP4_IOPAD(0x1b2, PIN_INPUT_PULLUP | MUX_MODE0) 586*4882a593Smuzhiyun OMAP4_IOPAD(0x1b4, PIN_INPUT_PULLUP | MUX_MODE0) 587*4882a593Smuzhiyun OMAP4_IOPAD(0x1b6, PIN_INPUT_PULLUP | MUX_MODE0) 588*4882a593Smuzhiyun OMAP4_IOPAD(0x1b8, PIN_INPUT_PULLUP | MUX_MODE0) 589*4882a593Smuzhiyun OMAP4_IOPAD(0x1ba, PIN_INPUT_PULLUP | MUX_MODE0) 590*4882a593Smuzhiyun OMAP4_IOPAD(0x1bc, PIN_INPUT_PULLUP | MUX_MODE0) 591*4882a593Smuzhiyun OMAP4_IOPAD(0x1be, PIN_INPUT_PULLUP | MUX_MODE0) 592*4882a593Smuzhiyun OMAP4_IOPAD(0x1c0, PIN_INPUT_PULLUP | MUX_MODE0) 593*4882a593Smuzhiyun OMAP4_IOPAD(0x1c2, PIN_INPUT_PULLUP | MUX_MODE0) 594*4882a593Smuzhiyun OMAP4_IOPAD(0x1c4, PIN_INPUT_PULLUP | MUX_MODE0) 595*4882a593Smuzhiyun OMAP4_IOPAD(0x1c6, PIN_INPUT_PULLUP | MUX_MODE0) 596*4882a593Smuzhiyun OMAP4_IOPAD(0x1c8, PIN_INPUT_PULLUP | MUX_MODE0) 597*4882a593Smuzhiyun >; 598*4882a593Smuzhiyun }; 599*4882a593Smuzhiyun 600*4882a593Smuzhiyun /* usb0_otg_dp and usb0_otg_dm */ 601*4882a593Smuzhiyun usb_utmi_pins: pinmux_usb_utmi_pins { 602*4882a593Smuzhiyun pinctrl-single,pins = < 603*4882a593Smuzhiyun OMAP4_IOPAD(0x196, PIN_INPUT | MUX_MODE0) 604*4882a593Smuzhiyun OMAP4_IOPAD(0x198, PIN_INPUT | MUX_MODE0) 605*4882a593Smuzhiyun OMAP4_IOPAD(0x1b2, PIN_INPUT_PULLUP | MUX_MODE7) 606*4882a593Smuzhiyun OMAP4_IOPAD(0x1b4, PIN_INPUT_PULLUP | MUX_MODE7) 607*4882a593Smuzhiyun OMAP4_IOPAD(0x1b6, PIN_INPUT_PULLUP | MUX_MODE7) 608*4882a593Smuzhiyun OMAP4_IOPAD(0x1b8, PIN_INPUT_PULLUP | MUX_MODE7) 609*4882a593Smuzhiyun OMAP4_IOPAD(0x1ba, PIN_INPUT_PULLUP | MUX_MODE7) 610*4882a593Smuzhiyun OMAP4_IOPAD(0x1bc, PIN_INPUT_PULLUP | MUX_MODE7) 611*4882a593Smuzhiyun OMAP4_IOPAD(0x1be, PIN_INPUT_PULLUP | MUX_MODE7) 612*4882a593Smuzhiyun OMAP4_IOPAD(0x1c0, PIN_INPUT_PULLUP | MUX_MODE7) 613*4882a593Smuzhiyun OMAP4_IOPAD(0x1c2, PIN_INPUT_PULLUP | MUX_MODE7) 614*4882a593Smuzhiyun OMAP4_IOPAD(0x1c4, PIN_INPUT_PULLUP | MUX_MODE7) 615*4882a593Smuzhiyun OMAP4_IOPAD(0x1c6, PIN_INPUT_PULLUP | MUX_MODE7) 616*4882a593Smuzhiyun OMAP4_IOPAD(0x1c8, PIN_INPUT_PULLUP | MUX_MODE7) 617*4882a593Smuzhiyun >; 618*4882a593Smuzhiyun }; 619*4882a593Smuzhiyun 620*4882a593Smuzhiyun /* 621*4882a593Smuzhiyun * Note that the v3.0.8 stock userspace dynamically remuxes uart1 622*4882a593Smuzhiyun * rts pin probably for PM purposes to PIN_INPUT_PULLUP | MUX_MODE7 623*4882a593Smuzhiyun * when not used. If needed, we can add rts pin remux later based 624*4882a593Smuzhiyun * on power measurements. 625*4882a593Smuzhiyun */ 626*4882a593Smuzhiyun uart1_pins: pinmux_uart1_pins { 627*4882a593Smuzhiyun pinctrl-single,pins = < 628*4882a593Smuzhiyun /* 0x4a10013c mcspi1_cs2.uart1_cts ag23 */ 629*4882a593Smuzhiyun OMAP4_IOPAD(0x13c, PIN_INPUT_PULLUP | MUX_MODE1) 630*4882a593Smuzhiyun 631*4882a593Smuzhiyun /* 0x4a10013e mcspi1_cs3.uart1_rts ah23 */ 632*4882a593Smuzhiyun OMAP4_IOPAD(0x13e, MUX_MODE1) 633*4882a593Smuzhiyun 634*4882a593Smuzhiyun /* 0x4a100140 uart3_cts_rctx.uart1_tx f27 */ 635*4882a593Smuzhiyun OMAP4_IOPAD(0x140, PIN_OUTPUT | MUX_MODE1) 636*4882a593Smuzhiyun 637*4882a593Smuzhiyun /* 0x4a1001ca dpm_emu14.uart1_rx aa3 */ 638*4882a593Smuzhiyun OMAP4_IOPAD(0x1ca, PIN_INPUT_PULLUP | MUX_MODE2) 639*4882a593Smuzhiyun >; 640*4882a593Smuzhiyun }; 641*4882a593Smuzhiyun 642*4882a593Smuzhiyun /* uart3_tx_irtx and uart3_rx_irrx */ 643*4882a593Smuzhiyun uart3_pins: pinmux_uart3_pins { 644*4882a593Smuzhiyun pinctrl-single,pins = < 645*4882a593Smuzhiyun OMAP4_IOPAD(0x196, MUX_MODE7) 646*4882a593Smuzhiyun OMAP4_IOPAD(0x198, MUX_MODE7) 647*4882a593Smuzhiyun OMAP4_IOPAD(0x1b2, PIN_INPUT_PULLUP | MUX_MODE7) 648*4882a593Smuzhiyun OMAP4_IOPAD(0x1b4, PIN_INPUT_PULLUP | MUX_MODE7) 649*4882a593Smuzhiyun OMAP4_IOPAD(0x1b6, PIN_INPUT_PULLUP | MUX_MODE7) 650*4882a593Smuzhiyun OMAP4_IOPAD(0x1b8, PIN_INPUT_PULLUP | MUX_MODE7) 651*4882a593Smuzhiyun OMAP4_IOPAD(0x1ba, MUX_MODE2) 652*4882a593Smuzhiyun OMAP4_IOPAD(0x1bc, PIN_INPUT | MUX_MODE2) 653*4882a593Smuzhiyun OMAP4_IOPAD(0x1be, PIN_INPUT_PULLUP | MUX_MODE7) 654*4882a593Smuzhiyun OMAP4_IOPAD(0x1c0, PIN_INPUT_PULLUP | MUX_MODE7) 655*4882a593Smuzhiyun OMAP4_IOPAD(0x1c2, PIN_INPUT_PULLUP | MUX_MODE7) 656*4882a593Smuzhiyun OMAP4_IOPAD(0x1c4, PIN_INPUT_PULLUP | MUX_MODE7) 657*4882a593Smuzhiyun OMAP4_IOPAD(0x1c6, PIN_INPUT_PULLUP | MUX_MODE7) 658*4882a593Smuzhiyun OMAP4_IOPAD(0x1c8, PIN_INPUT_PULLUP | MUX_MODE7) 659*4882a593Smuzhiyun >; 660*4882a593Smuzhiyun }; 661*4882a593Smuzhiyun 662*4882a593Smuzhiyun uart4_pins: pinmux_uart4_pins { 663*4882a593Smuzhiyun pinctrl-single,pins = < 664*4882a593Smuzhiyun OMAP4_IOPAD(0x15c, PIN_INPUT | MUX_MODE0) /* uart4_rx */ 665*4882a593Smuzhiyun OMAP4_IOPAD(0x15e, PIN_OUTPUT | MUX_MODE0) /* uart4_tx */ 666*4882a593Smuzhiyun OMAP4_IOPAD(0x110, PIN_INPUT_PULLUP | MUX_MODE5) /* uart4_cts */ 667*4882a593Smuzhiyun OMAP4_IOPAD(0x112, PIN_OUTPUT_PULLUP | MUX_MODE5) /* uart4_rts */ 668*4882a593Smuzhiyun >; 669*4882a593Smuzhiyun }; 670*4882a593Smuzhiyun 671*4882a593Smuzhiyun mcbsp2_pins: pinmux_mcbsp2_pins { 672*4882a593Smuzhiyun pinctrl-single,pins = < 673*4882a593Smuzhiyun OMAP4_IOPAD(0x0f6, PIN_INPUT | MUX_MODE0) /* abe_mcbsp2_clkx */ 674*4882a593Smuzhiyun OMAP4_IOPAD(0x0f8, PIN_INPUT | MUX_MODE0) /* abe_mcbsp2_dr */ 675*4882a593Smuzhiyun OMAP4_IOPAD(0x0fa, PIN_OUTPUT | MUX_MODE0) /* abe_mcbsp2_dx */ 676*4882a593Smuzhiyun OMAP4_IOPAD(0x0fc, PIN_INPUT | MUX_MODE0) /* abe_mcbsp2_fsx */ 677*4882a593Smuzhiyun >; 678*4882a593Smuzhiyun }; 679*4882a593Smuzhiyun 680*4882a593Smuzhiyun mcbsp3_pins: pinmux_mcbsp3_pins { 681*4882a593Smuzhiyun pinctrl-single,pins = < 682*4882a593Smuzhiyun OMAP4_IOPAD(0x106, PIN_INPUT | MUX_MODE1) /* abe_mcbsp3_dr */ 683*4882a593Smuzhiyun OMAP4_IOPAD(0x108, PIN_OUTPUT | MUX_MODE1) /* abe_mcbsp3_dx */ 684*4882a593Smuzhiyun OMAP4_IOPAD(0x10a, PIN_INPUT | MUX_MODE1) /* abe_mcbsp3_clkx */ 685*4882a593Smuzhiyun OMAP4_IOPAD(0x10c, PIN_INPUT | MUX_MODE1) /* abe_mcbsp3_fsx */ 686*4882a593Smuzhiyun >; 687*4882a593Smuzhiyun }; 688*4882a593Smuzhiyun 689*4882a593Smuzhiyun vibrator_direction_pin: pinmux_vibrator_direction_pin { 690*4882a593Smuzhiyun pinctrl-single,pins = < 691*4882a593Smuzhiyun OMAP4_IOPAD(0x1ce, PIN_OUTPUT | MUX_MODE1) /* dmtimer8_pwm_evt (gpio_27) */ 692*4882a593Smuzhiyun >; 693*4882a593Smuzhiyun }; 694*4882a593Smuzhiyun 695*4882a593Smuzhiyun vibrator_enable_pin: pinmux_vibrator_enable_pin { 696*4882a593Smuzhiyun pinctrl-single,pins = < 697*4882a593Smuzhiyun OMAP4_IOPAD(0X1d0, PIN_OUTPUT | MUX_MODE1) /* dmtimer9_pwm_evt (gpio_28) */ 698*4882a593Smuzhiyun >; 699*4882a593Smuzhiyun }; 700*4882a593Smuzhiyun}; 701*4882a593Smuzhiyun 702*4882a593Smuzhiyun&omap4_pmx_wkup { 703*4882a593Smuzhiyun usb_gpio_mux_sel2: pinmux_usb_gpio_mux_sel2_pins { 704*4882a593Smuzhiyun /* gpio_wk0 */ 705*4882a593Smuzhiyun pinctrl-single,pins = < 706*4882a593Smuzhiyun OMAP4_IOPAD(0x040, PIN_OUTPUT_PULLDOWN | MUX_MODE3) 707*4882a593Smuzhiyun >; 708*4882a593Smuzhiyun }; 709*4882a593Smuzhiyun}; 710*4882a593Smuzhiyun 711*4882a593Smuzhiyun/* RNG is used by secure mode and not accessible */ 712*4882a593Smuzhiyun&rng_target { 713*4882a593Smuzhiyun status = "disabled"; 714*4882a593Smuzhiyun}; 715*4882a593Smuzhiyun 716*4882a593Smuzhiyun/* Configure pwm clock source for timers 8 & 9 */ 717*4882a593Smuzhiyun&timer8 { 718*4882a593Smuzhiyun assigned-clocks = <&abe_clkctrl OMAP4_TIMER8_CLKCTRL 24>; 719*4882a593Smuzhiyun assigned-clock-parents = <&sys_clkin_ck>; 720*4882a593Smuzhiyun}; 721*4882a593Smuzhiyun 722*4882a593Smuzhiyun&timer9 { 723*4882a593Smuzhiyun assigned-clocks = <&l4_per_clkctrl OMAP4_TIMER9_CLKCTRL 24>; 724*4882a593Smuzhiyun assigned-clock-parents = <&sys_clkin_ck>; 725*4882a593Smuzhiyun}; 726*4882a593Smuzhiyun 727*4882a593Smuzhiyun/* 728*4882a593Smuzhiyun * The uart1 port is wired to mdm6600 with rts and cts. The modem uses gpio_149 729*4882a593Smuzhiyun * for wake-up events for both the USB PHY and the UART. We can use gpio_149 730*4882a593Smuzhiyun * pad as the shared wakeirq for the UART rather than the RX or CTS pad as we 731*4882a593Smuzhiyun * have gpio_149 trigger before the UART transfer starts. 732*4882a593Smuzhiyun */ 733*4882a593Smuzhiyun&uart1 { 734*4882a593Smuzhiyun pinctrl-names = "default"; 735*4882a593Smuzhiyun pinctrl-0 = <&uart1_pins>; 736*4882a593Smuzhiyun interrupts-extended = <&wakeupgen GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH 737*4882a593Smuzhiyun &omap4_pmx_core 0x110>; 738*4882a593Smuzhiyun uart-has-rtscts; 739*4882a593Smuzhiyun current-speed = <115200>; 740*4882a593Smuzhiyun}; 741*4882a593Smuzhiyun 742*4882a593Smuzhiyun&uart3 { 743*4882a593Smuzhiyun interrupts-extended = <&wakeupgen GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH 744*4882a593Smuzhiyun &omap4_pmx_core 0x17c>; 745*4882a593Smuzhiyun}; 746*4882a593Smuzhiyun 747*4882a593Smuzhiyun&uart4 { 748*4882a593Smuzhiyun pinctrl-names = "default"; 749*4882a593Smuzhiyun pinctrl-0 = <&uart4_pins>; 750*4882a593Smuzhiyun 751*4882a593Smuzhiyun bluetooth { 752*4882a593Smuzhiyun compatible = "ti,wl1285-st"; 753*4882a593Smuzhiyun enable-gpios = <&gpio6 14 GPIO_ACTIVE_HIGH>; /* gpio 174 */ 754*4882a593Smuzhiyun max-speed = <3686400>; 755*4882a593Smuzhiyun }; 756*4882a593Smuzhiyun}; 757*4882a593Smuzhiyun 758*4882a593Smuzhiyun&usbhsohci { 759*4882a593Smuzhiyun phys = <&fsusb1_phy>; 760*4882a593Smuzhiyun phy-names = "usb"; 761*4882a593Smuzhiyun}; 762*4882a593Smuzhiyun 763*4882a593Smuzhiyun&usbhsehci { 764*4882a593Smuzhiyun phys = <&hsusb2_phy>; 765*4882a593Smuzhiyun}; 766*4882a593Smuzhiyun 767*4882a593Smuzhiyun&usbhshost { 768*4882a593Smuzhiyun port1-mode = "ohci-phy-4pin-dpdm"; 769*4882a593Smuzhiyun port2-mode = "ehci-tll"; 770*4882a593Smuzhiyun}; 771*4882a593Smuzhiyun 772*4882a593Smuzhiyun/* Internal UTMI+ PHY used for OTG, CPCAP ULPI PHY for detection and charger */ 773*4882a593Smuzhiyun&usb_otg_hs { 774*4882a593Smuzhiyun interface-type = <1>; 775*4882a593Smuzhiyun mode = <3>; 776*4882a593Smuzhiyun 777*4882a593Smuzhiyun /* 778*4882a593Smuzhiyun * Max 300 mA steps based on similar PMIC MC13783UG.pdf "Table 10-4. 779*4882a593Smuzhiyun * VBUS Regulator Main Characteristics". Binding uses 2 mA units. 780*4882a593Smuzhiyun */ 781*4882a593Smuzhiyun power = <150>; 782*4882a593Smuzhiyun}; 783*4882a593Smuzhiyun 784*4882a593Smuzhiyun&i2c4 { 785*4882a593Smuzhiyun ak8975: magnetometer@c { 786*4882a593Smuzhiyun compatible = "asahi-kasei,ak8975"; 787*4882a593Smuzhiyun reg = <0x0c>; 788*4882a593Smuzhiyun 789*4882a593Smuzhiyun vdd-supply = <&vhvio>; 790*4882a593Smuzhiyun 791*4882a593Smuzhiyun interrupt-parent = <&gpio6>; 792*4882a593Smuzhiyun interrupts = <15 IRQ_TYPE_EDGE_RISING>; /* gpio175 */ 793*4882a593Smuzhiyun 794*4882a593Smuzhiyun rotation-matrix = "-1", "0", "0", 795*4882a593Smuzhiyun "0", "1", "0", 796*4882a593Smuzhiyun "0", "0", "-1"; 797*4882a593Smuzhiyun 798*4882a593Smuzhiyun }; 799*4882a593Smuzhiyun 800*4882a593Smuzhiyun lis3dh: accelerometer@18 { 801*4882a593Smuzhiyun compatible = "st,lis3dh-accel"; 802*4882a593Smuzhiyun reg = <0x18>; 803*4882a593Smuzhiyun 804*4882a593Smuzhiyun vdd-supply = <&vhvio>; 805*4882a593Smuzhiyun 806*4882a593Smuzhiyun interrupt-parent = <&gpio2>; 807*4882a593Smuzhiyun interrupts = <2 IRQ_TYPE_EDGE_BOTH>; /* gpio34 */ 808*4882a593Smuzhiyun 809*4882a593Smuzhiyun rotation-matrix = "0", "-1", "0", 810*4882a593Smuzhiyun "1", "0", "0", 811*4882a593Smuzhiyun "0", "0", "1"; 812*4882a593Smuzhiyun }; 813*4882a593Smuzhiyun}; 814*4882a593Smuzhiyun 815*4882a593Smuzhiyun&mcbsp2 { 816*4882a593Smuzhiyun #sound-dai-cells = <0>; 817*4882a593Smuzhiyun pinctrl-names = "default"; 818*4882a593Smuzhiyun pinctrl-0 = <&mcbsp2_pins>; 819*4882a593Smuzhiyun status = "okay"; 820*4882a593Smuzhiyun 821*4882a593Smuzhiyun mcbsp2_port: port { 822*4882a593Smuzhiyun cpu_dai2: endpoint { 823*4882a593Smuzhiyun dai-format = "i2s"; 824*4882a593Smuzhiyun remote-endpoint = <&cpcap_audio_codec0>; 825*4882a593Smuzhiyun frame-master = <&cpcap_audio_codec0>; 826*4882a593Smuzhiyun bitclock-master = <&cpcap_audio_codec0>; 827*4882a593Smuzhiyun }; 828*4882a593Smuzhiyun }; 829*4882a593Smuzhiyun}; 830*4882a593Smuzhiyun 831*4882a593Smuzhiyun&mcbsp3 { 832*4882a593Smuzhiyun #sound-dai-cells = <0>; 833*4882a593Smuzhiyun pinctrl-names = "default"; 834*4882a593Smuzhiyun pinctrl-0 = <&mcbsp3_pins>; 835*4882a593Smuzhiyun status = "okay"; 836*4882a593Smuzhiyun 837*4882a593Smuzhiyun mcbsp3_port: port { 838*4882a593Smuzhiyun cpu_dai3: endpoint { 839*4882a593Smuzhiyun dai-format = "dsp_a"; 840*4882a593Smuzhiyun frame-master = <&cpcap_audio_codec1>; 841*4882a593Smuzhiyun bitclock-master = <&cpcap_audio_codec1>; 842*4882a593Smuzhiyun remote-endpoint = <&cpcap_audio_codec1>; 843*4882a593Smuzhiyun }; 844*4882a593Smuzhiyun }; 845*4882a593Smuzhiyun}; 846*4882a593Smuzhiyun 847*4882a593Smuzhiyun&cpcap_audio_codec0 { 848*4882a593Smuzhiyun remote-endpoint = <&cpu_dai2>; 849*4882a593Smuzhiyun}; 850*4882a593Smuzhiyun 851*4882a593Smuzhiyun&cpcap_audio_codec1 { 852*4882a593Smuzhiyun remote-endpoint = <&cpu_dai3>; 853*4882a593Smuzhiyun}; 854