xref: /OK3568_Linux_fs/kernel/scripts/dtc/include-prefixes/arm/lpc3250-ea3250.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Embedded Artists LPC3250 board
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright 2012 Roland Stigge <stigge@antcom.de>
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun/dts-v1/;
9*4882a593Smuzhiyun#include "lpc32xx.dtsi"
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun/ {
12*4882a593Smuzhiyun	model = "Embedded Artists LPC3250 board based on NXP LPC3250";
13*4882a593Smuzhiyun	compatible = "ea,ea3250", "nxp,lpc3250";
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun	memory@80000000 {
16*4882a593Smuzhiyun		device_type = "memory";
17*4882a593Smuzhiyun		reg = <0x80000000 0x4000000>;
18*4882a593Smuzhiyun	};
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun	gpio-keys {
21*4882a593Smuzhiyun		compatible = "gpio-keys";
22*4882a593Smuzhiyun		autorepeat;
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun		button {
25*4882a593Smuzhiyun			label = "Interrupt Key";
26*4882a593Smuzhiyun			linux,code = <103>;
27*4882a593Smuzhiyun			gpios = <&gpio 4 1 0>; /* GPI_P3 1 */
28*4882a593Smuzhiyun		};
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun		key1 {
31*4882a593Smuzhiyun			label = "KEY1";
32*4882a593Smuzhiyun			linux,code = <1>;
33*4882a593Smuzhiyun			gpios = <&pca9532 0 0>;
34*4882a593Smuzhiyun		};
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun		key2 {
37*4882a593Smuzhiyun			label = "KEY2";
38*4882a593Smuzhiyun			linux,code = <2>;
39*4882a593Smuzhiyun			gpios = <&pca9532 1 0>;
40*4882a593Smuzhiyun		};
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun		key3 {
43*4882a593Smuzhiyun			label = "KEY3";
44*4882a593Smuzhiyun			linux,code = <3>;
45*4882a593Smuzhiyun			gpios = <&pca9532 2 0>;
46*4882a593Smuzhiyun		};
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun		key4 {
49*4882a593Smuzhiyun			label = "KEY4";
50*4882a593Smuzhiyun			linux,code = <4>;
51*4882a593Smuzhiyun			gpios = <&pca9532 3 0>;
52*4882a593Smuzhiyun		};
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun		joy0 {
55*4882a593Smuzhiyun			label = "Joystick Key 0";
56*4882a593Smuzhiyun			linux,code = <10>;
57*4882a593Smuzhiyun			gpios = <&gpio 2 0 0>; /* P2.0 */
58*4882a593Smuzhiyun		};
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun		joy1 {
61*4882a593Smuzhiyun			label = "Joystick Key 1";
62*4882a593Smuzhiyun			linux,code = <11>;
63*4882a593Smuzhiyun			gpios = <&gpio 2 1 0>; /* P2.1 */
64*4882a593Smuzhiyun		};
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun		joy2 {
67*4882a593Smuzhiyun			label = "Joystick Key 2";
68*4882a593Smuzhiyun			linux,code = <12>;
69*4882a593Smuzhiyun			gpios = <&gpio 2 2 0>; /* P2.2 */
70*4882a593Smuzhiyun		};
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun		joy3 {
73*4882a593Smuzhiyun			label = "Joystick Key 3";
74*4882a593Smuzhiyun			linux,code = <13>;
75*4882a593Smuzhiyun			gpios = <&gpio 2 3 0>; /* P2.3 */
76*4882a593Smuzhiyun		};
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun		joy4 {
79*4882a593Smuzhiyun			label = "Joystick Key 4";
80*4882a593Smuzhiyun			linux,code = <14>;
81*4882a593Smuzhiyun			gpios = <&gpio 2 4 0>; /* P2.4 */
82*4882a593Smuzhiyun		};
83*4882a593Smuzhiyun	};
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun	leds {
86*4882a593Smuzhiyun		compatible = "gpio-leds";
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun		/* LEDs on OEM Board */
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun		led1 {
91*4882a593Smuzhiyun			gpios = <&gpio 5 14 1>; /* GPO_P3 14, GPIO 93, active low */
92*4882a593Smuzhiyun			linux,default-trigger = "timer";
93*4882a593Smuzhiyun			default-state = "off";
94*4882a593Smuzhiyun		};
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun		led2 {
97*4882a593Smuzhiyun			gpios = <&gpio 2 10 1>; /* P2.10, active low */
98*4882a593Smuzhiyun			default-state = "off";
99*4882a593Smuzhiyun		};
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun		led3 {
102*4882a593Smuzhiyun			gpios = <&gpio 2 11 1>; /* P2.11, active low */
103*4882a593Smuzhiyun			default-state = "off";
104*4882a593Smuzhiyun		};
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun		led4 {
107*4882a593Smuzhiyun			gpios = <&gpio 2 12 1>; /* P2.12, active low */
108*4882a593Smuzhiyun			default-state = "off";
109*4882a593Smuzhiyun		};
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun		/* LEDs on Base Board */
112*4882a593Smuzhiyun
113*4882a593Smuzhiyun		lede1 {
114*4882a593Smuzhiyun			gpios = <&pca9532 8 0>;
115*4882a593Smuzhiyun			default-state = "off";
116*4882a593Smuzhiyun		};
117*4882a593Smuzhiyun		lede2 {
118*4882a593Smuzhiyun			gpios = <&pca9532 9 0>;
119*4882a593Smuzhiyun			default-state = "off";
120*4882a593Smuzhiyun		};
121*4882a593Smuzhiyun		lede3 {
122*4882a593Smuzhiyun			gpios = <&pca9532 10 0>;
123*4882a593Smuzhiyun			default-state = "off";
124*4882a593Smuzhiyun		};
125*4882a593Smuzhiyun		lede4 {
126*4882a593Smuzhiyun			gpios = <&pca9532 11 0>;
127*4882a593Smuzhiyun			default-state = "off";
128*4882a593Smuzhiyun		};
129*4882a593Smuzhiyun		lede5 {
130*4882a593Smuzhiyun			gpios = <&pca9532 12 0>;
131*4882a593Smuzhiyun			default-state = "off";
132*4882a593Smuzhiyun		};
133*4882a593Smuzhiyun		lede6 {
134*4882a593Smuzhiyun			gpios = <&pca9532 13 0>;
135*4882a593Smuzhiyun			default-state = "off";
136*4882a593Smuzhiyun		};
137*4882a593Smuzhiyun		lede7 {
138*4882a593Smuzhiyun			gpios = <&pca9532 14 0>;
139*4882a593Smuzhiyun			default-state = "off";
140*4882a593Smuzhiyun		};
141*4882a593Smuzhiyun		lede8 {
142*4882a593Smuzhiyun			gpios = <&pca9532 15 0>;
143*4882a593Smuzhiyun			default-state = "off";
144*4882a593Smuzhiyun		};
145*4882a593Smuzhiyun	};
146*4882a593Smuzhiyun};
147*4882a593Smuzhiyun
148*4882a593Smuzhiyun/* 3-axis accelerometer X,Y,Z (or AD-IN instead of Z) */
149*4882a593Smuzhiyun&adc {
150*4882a593Smuzhiyun	status = "okay";
151*4882a593Smuzhiyun};
152*4882a593Smuzhiyun
153*4882a593Smuzhiyun&i2c1 {
154*4882a593Smuzhiyun	clock-frequency = <100000>;
155*4882a593Smuzhiyun
156*4882a593Smuzhiyun	uda1380: uda1380@18 {
157*4882a593Smuzhiyun		compatible = "nxp,uda1380";
158*4882a593Smuzhiyun		reg = <0x18>;
159*4882a593Smuzhiyun		power-gpio = <&gpio 3 10 0>;
160*4882a593Smuzhiyun		reset-gpio = <&gpio 3 2 0>;
161*4882a593Smuzhiyun		dac-clk = "wspll";
162*4882a593Smuzhiyun	};
163*4882a593Smuzhiyun
164*4882a593Smuzhiyun	eeprom@50 {
165*4882a593Smuzhiyun		compatible = "atmel,24c256";
166*4882a593Smuzhiyun		reg = <0x50>;
167*4882a593Smuzhiyun	};
168*4882a593Smuzhiyun
169*4882a593Smuzhiyun	eeprom@57 {
170*4882a593Smuzhiyun		compatible = "atmel,24c64";
171*4882a593Smuzhiyun		reg = <0x57>;
172*4882a593Smuzhiyun	};
173*4882a593Smuzhiyun
174*4882a593Smuzhiyun	pca9532: pca9532@60 {
175*4882a593Smuzhiyun		compatible = "nxp,pca9532";
176*4882a593Smuzhiyun		gpio-controller;
177*4882a593Smuzhiyun		#gpio-cells = <2>;
178*4882a593Smuzhiyun		reg = <0x60>;
179*4882a593Smuzhiyun	};
180*4882a593Smuzhiyun};
181*4882a593Smuzhiyun
182*4882a593Smuzhiyun&i2c2 {
183*4882a593Smuzhiyun	clock-frequency = <100000>;
184*4882a593Smuzhiyun};
185*4882a593Smuzhiyun
186*4882a593Smuzhiyun&i2cusb {
187*4882a593Smuzhiyun	clock-frequency = <100000>;
188*4882a593Smuzhiyun
189*4882a593Smuzhiyun	isp1301: usb-transceiver@2d {
190*4882a593Smuzhiyun		compatible = "nxp,isp1301";
191*4882a593Smuzhiyun		reg = <0x2d>;
192*4882a593Smuzhiyun	};
193*4882a593Smuzhiyun};
194*4882a593Smuzhiyun
195*4882a593Smuzhiyun&mac {
196*4882a593Smuzhiyun	phy-mode = "rmii";
197*4882a593Smuzhiyun	use-iram;
198*4882a593Smuzhiyun	status = "okay";
199*4882a593Smuzhiyun};
200*4882a593Smuzhiyun
201*4882a593Smuzhiyun/* Here, choose exactly one from: ohci, usbd */
202*4882a593Smuzhiyun&ohci /* &usbd */ {
203*4882a593Smuzhiyun	transceiver = <&isp1301>;
204*4882a593Smuzhiyun	status = "okay";
205*4882a593Smuzhiyun};
206*4882a593Smuzhiyun
207*4882a593Smuzhiyun&sd {
208*4882a593Smuzhiyun	wp-gpios = <&pca9532 5 0>;
209*4882a593Smuzhiyun	cd-gpios = <&pca9532 4 0>;
210*4882a593Smuzhiyun	cd-inverted;
211*4882a593Smuzhiyun	bus-width = <4>;
212*4882a593Smuzhiyun	status = "okay";
213*4882a593Smuzhiyun};
214*4882a593Smuzhiyun
215*4882a593Smuzhiyun/* 128MB Flash via SLC NAND controller */
216*4882a593Smuzhiyun&slc {
217*4882a593Smuzhiyun	status = "okay";
218*4882a593Smuzhiyun
219*4882a593Smuzhiyun	nxp,wdr-clks = <14>;
220*4882a593Smuzhiyun	nxp,wwidth = <260000000>;
221*4882a593Smuzhiyun	nxp,whold = <104000000>;
222*4882a593Smuzhiyun	nxp,wsetup = <200000000>;
223*4882a593Smuzhiyun	nxp,rdr-clks = <14>;
224*4882a593Smuzhiyun	nxp,rwidth = <34666666>;
225*4882a593Smuzhiyun	nxp,rhold = <104000000>;
226*4882a593Smuzhiyun	nxp,rsetup = <200000000>;
227*4882a593Smuzhiyun	nand-on-flash-bbt;
228*4882a593Smuzhiyun	gpios = <&gpio 5 19 1>; /* GPO_P3 19, active low */
229*4882a593Smuzhiyun
230*4882a593Smuzhiyun	partitions {
231*4882a593Smuzhiyun		compatible = "fixed-partitions";
232*4882a593Smuzhiyun		#address-cells = <1>;
233*4882a593Smuzhiyun		#size-cells = <1>;
234*4882a593Smuzhiyun
235*4882a593Smuzhiyun		mtd0@0 {
236*4882a593Smuzhiyun			label = "ea3250-boot";
237*4882a593Smuzhiyun			reg = <0x00000000 0x00080000>;
238*4882a593Smuzhiyun			read-only;
239*4882a593Smuzhiyun		};
240*4882a593Smuzhiyun
241*4882a593Smuzhiyun		mtd1@80000 {
242*4882a593Smuzhiyun			label = "ea3250-uboot";
243*4882a593Smuzhiyun			reg = <0x00080000 0x000c0000>;
244*4882a593Smuzhiyun			read-only;
245*4882a593Smuzhiyun		};
246*4882a593Smuzhiyun
247*4882a593Smuzhiyun		mtd2@140000 {
248*4882a593Smuzhiyun			label = "ea3250-kernel";
249*4882a593Smuzhiyun			reg = <0x00140000 0x00400000>;
250*4882a593Smuzhiyun		};
251*4882a593Smuzhiyun
252*4882a593Smuzhiyun		mtd3@540000 {
253*4882a593Smuzhiyun			label = "ea3250-rootfs";
254*4882a593Smuzhiyun			reg = <0x00540000 0x07ac0000>;
255*4882a593Smuzhiyun		};
256*4882a593Smuzhiyun	};
257*4882a593Smuzhiyun};
258*4882a593Smuzhiyun
259*4882a593Smuzhiyun&uart1 {
260*4882a593Smuzhiyun	status = "okay";
261*4882a593Smuzhiyun};
262*4882a593Smuzhiyun
263*4882a593Smuzhiyun&uart3 {
264*4882a593Smuzhiyun	status = "okay";
265*4882a593Smuzhiyun};
266*4882a593Smuzhiyun
267*4882a593Smuzhiyun&uart5 {
268*4882a593Smuzhiyun	status = "okay";
269*4882a593Smuzhiyun};
270*4882a593Smuzhiyun
271*4882a593Smuzhiyun&uart6 {
272*4882a593Smuzhiyun	status = "okay";
273*4882a593Smuzhiyun};
274