1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0-only 2*4882a593Smuzhiyun 3*4882a593Smuzhiyun/ { 4*4882a593Smuzhiyun gpio_keys { 5*4882a593Smuzhiyun compatible = "gpio-keys"; 6*4882a593Smuzhiyun pinctrl-names = "default"; 7*4882a593Smuzhiyun pinctrl-0 = <&gpio_key_pins &gpio_key_pins_wkup>; 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun sysboot2 { 10*4882a593Smuzhiyun label = "sysboot2"; 11*4882a593Smuzhiyun gpios = <&gpio1 2 GPIO_ACTIVE_LOW>; /* gpio2 */ 12*4882a593Smuzhiyun linux,code = <BTN_0>; 13*4882a593Smuzhiyun wakeup-source; 14*4882a593Smuzhiyun }; 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun sysboot5 { 17*4882a593Smuzhiyun label = "sysboot5"; 18*4882a593Smuzhiyun gpios = <&gpio1 7 GPIO_ACTIVE_LOW>; /* gpio7 */ 19*4882a593Smuzhiyun linux,code = <BTN_1>; 20*4882a593Smuzhiyun wakeup-source; 21*4882a593Smuzhiyun }; 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun gpio1 { 24*4882a593Smuzhiyun label = "gpio1"; 25*4882a593Smuzhiyun gpios = <&gpio6 21 GPIO_ACTIVE_LOW>; /* gpio181 */ 26*4882a593Smuzhiyun linux,code = <BTN_2>; 27*4882a593Smuzhiyun wakeup-source; 28*4882a593Smuzhiyun }; 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun gpio2 { 31*4882a593Smuzhiyun label = "gpio2"; 32*4882a593Smuzhiyun gpios = <&gpio6 18 GPIO_ACTIVE_LOW>; /* gpio178 */ 33*4882a593Smuzhiyun linux,code = <BTN_3>; 34*4882a593Smuzhiyun wakeup-source; 35*4882a593Smuzhiyun }; 36*4882a593Smuzhiyun }; 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun sound { 39*4882a593Smuzhiyun compatible = "ti,omap-twl4030"; 40*4882a593Smuzhiyun ti,model = "omap3logic"; 41*4882a593Smuzhiyun ti,mcbsp = <&mcbsp2>; 42*4882a593Smuzhiyun }; 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun leds { 45*4882a593Smuzhiyun compatible = "gpio-leds"; 46*4882a593Smuzhiyun pinctrl-names = "default"; 47*4882a593Smuzhiyun pinctrl-0 = <&led_pins>; 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun led1 { 50*4882a593Smuzhiyun label = "led1"; 51*4882a593Smuzhiyun gpios = <&gpio6 20 GPIO_ACTIVE_HIGH>; /* gpio180 */ 52*4882a593Smuzhiyun linux,default-trigger = "cpu0"; 53*4882a593Smuzhiyun }; 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun led2 { 56*4882a593Smuzhiyun label = "led2"; 57*4882a593Smuzhiyun gpios = <&gpio6 19 GPIO_ACTIVE_HIGH>; /* gpio179 */ 58*4882a593Smuzhiyun linux,default-trigger = "none"; 59*4882a593Smuzhiyun }; 60*4882a593Smuzhiyun }; 61*4882a593Smuzhiyun 62*4882a593Smuzhiyun pwm10: dmtimer-pwm { 63*4882a593Smuzhiyun compatible = "ti,omap-dmtimer-pwm"; 64*4882a593Smuzhiyun pinctrl-names = "default"; 65*4882a593Smuzhiyun pinctrl-0 = <&pwm_pins>; 66*4882a593Smuzhiyun ti,timers = <&timer10>; 67*4882a593Smuzhiyun #pwm-cells = <3>; 68*4882a593Smuzhiyun ti,clock-source = <0x01>; 69*4882a593Smuzhiyun }; 70*4882a593Smuzhiyun 71*4882a593Smuzhiyun}; 72*4882a593Smuzhiyun 73*4882a593Smuzhiyun&vaux1 { 74*4882a593Smuzhiyun regulator-min-microvolt = <3000000>; 75*4882a593Smuzhiyun regulator-max-microvolt = <3000000>; 76*4882a593Smuzhiyun}; 77*4882a593Smuzhiyun 78*4882a593Smuzhiyun&vaux4 { 79*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 80*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 81*4882a593Smuzhiyun}; 82*4882a593Smuzhiyun 83*4882a593Smuzhiyun&mcbsp2 { 84*4882a593Smuzhiyun pinctrl-names = "default"; 85*4882a593Smuzhiyun pinctrl-0 = <&mcbsp2_pins>; 86*4882a593Smuzhiyun status = "okay"; 87*4882a593Smuzhiyun}; 88*4882a593Smuzhiyun 89*4882a593Smuzhiyun&charger { 90*4882a593Smuzhiyun ti,bb-uvolt = <3200000>; 91*4882a593Smuzhiyun ti,bb-uamp = <150>; 92*4882a593Smuzhiyun}; 93*4882a593Smuzhiyun 94*4882a593Smuzhiyun&gpmc { 95*4882a593Smuzhiyun ranges = <0 0 0x30000000 0x1000000 /* CS0: 16MB for NAND */ 96*4882a593Smuzhiyun 1 0 0x2c000000 0x1000000>; /* CS1: 16MB for LAN9221 */ 97*4882a593Smuzhiyun 98*4882a593Smuzhiyun ethernet@gpmc { 99*4882a593Smuzhiyun pinctrl-names = "default"; 100*4882a593Smuzhiyun pinctrl-0 = <&lan9221_pins>; 101*4882a593Smuzhiyun interrupt-parent = <&gpio5>; 102*4882a593Smuzhiyun interrupts = <1 IRQ_TYPE_LEVEL_LOW>; /* gpio129 */ 103*4882a593Smuzhiyun reg = <1 0 0xff>; 104*4882a593Smuzhiyun }; 105*4882a593Smuzhiyun}; 106*4882a593Smuzhiyun 107*4882a593Smuzhiyun&hdqw1w { 108*4882a593Smuzhiyun pinctrl-names = "default"; 109*4882a593Smuzhiyun pinctrl-0 = <&hdq_pins>; 110*4882a593Smuzhiyun}; 111*4882a593Smuzhiyun 112*4882a593Smuzhiyun 113*4882a593Smuzhiyun&vpll2 { 114*4882a593Smuzhiyun regulator-always-on; 115*4882a593Smuzhiyun}; 116*4882a593Smuzhiyun 117*4882a593Smuzhiyun&dss { 118*4882a593Smuzhiyun status = "okay"; 119*4882a593Smuzhiyun vdds_dsi-supply = <&vpll2>; 120*4882a593Smuzhiyun vdda_video-supply = <&vpll2>; 121*4882a593Smuzhiyun pinctrl-names = "default"; 122*4882a593Smuzhiyun pinctrl-0 = <&dss_dpi_pins1>; 123*4882a593Smuzhiyun port { 124*4882a593Smuzhiyun dpi_out: endpoint { 125*4882a593Smuzhiyun remote-endpoint = <&lcd_in>; 126*4882a593Smuzhiyun data-lines = <16>; 127*4882a593Smuzhiyun }; 128*4882a593Smuzhiyun }; 129*4882a593Smuzhiyun}; 130*4882a593Smuzhiyun 131*4882a593Smuzhiyun/ { 132*4882a593Smuzhiyun aliases { 133*4882a593Smuzhiyun display0 = &lcd0; 134*4882a593Smuzhiyun }; 135*4882a593Smuzhiyun 136*4882a593Smuzhiyun lcd0: display { 137*4882a593Smuzhiyun /* This isn't the exact LCD, but the timings meet spec */ 138*4882a593Smuzhiyun compatible = "newhaven,nhd-4.3-480272ef-atxl"; 139*4882a593Smuzhiyun label = "15"; 140*4882a593Smuzhiyun pinctrl-names = "default"; 141*4882a593Smuzhiyun pinctrl-0 = <&panel_pwr_pins>; 142*4882a593Smuzhiyun backlight = <&bl>; 143*4882a593Smuzhiyun enable-gpios = <&gpio5 27 GPIO_ACTIVE_HIGH>; 144*4882a593Smuzhiyun port { 145*4882a593Smuzhiyun lcd_in: endpoint { 146*4882a593Smuzhiyun remote-endpoint = <&dpi_out>; 147*4882a593Smuzhiyun }; 148*4882a593Smuzhiyun }; 149*4882a593Smuzhiyun }; 150*4882a593Smuzhiyun 151*4882a593Smuzhiyun bl: backlight { 152*4882a593Smuzhiyun compatible = "pwm-backlight"; 153*4882a593Smuzhiyun pinctrl-names = "default"; 154*4882a593Smuzhiyun pinctrl-0 = <&backlight_pins>; 155*4882a593Smuzhiyun pwms = <&pwm10 0 5000000 0>; 156*4882a593Smuzhiyun brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>; 157*4882a593Smuzhiyun default-brightness-level = <7>; 158*4882a593Smuzhiyun enable-gpios = <&gpio5 26 GPIO_ACTIVE_HIGH>; /* gpio_154 */ 159*4882a593Smuzhiyun }; 160*4882a593Smuzhiyun}; 161*4882a593Smuzhiyun 162*4882a593Smuzhiyun&mmc1 { 163*4882a593Smuzhiyun interrupts-extended = <&intc 83 &omap3_pmx_core 0x11a>; 164*4882a593Smuzhiyun pinctrl-names = "default"; 165*4882a593Smuzhiyun pinctrl-0 = <&mmc1_pins &mmc1_cd>; 166*4882a593Smuzhiyun cd-gpios = <&gpio4 31 GPIO_ACTIVE_LOW>; /* gpio127 */ 167*4882a593Smuzhiyun vmmc-supply = <&vmmc1>; 168*4882a593Smuzhiyun bus-width = <4>; 169*4882a593Smuzhiyun cap-power-off-card; 170*4882a593Smuzhiyun}; 171*4882a593Smuzhiyun 172*4882a593Smuzhiyun&omap3_pmx_core { 173*4882a593Smuzhiyun gpio_key_pins: pinmux_gpio_key_pins { 174*4882a593Smuzhiyun pinctrl-single,pins = < 175*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x21d6, PIN_INPUT_PULLUP | MUX_MODE4) /* mcspi2_clk.gpio_178 */ 176*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x21dc, PIN_INPUT_PULLUP | MUX_MODE4) /* mcspi2_cs0.gpio_181 */ 177*4882a593Smuzhiyun >; 178*4882a593Smuzhiyun }; 179*4882a593Smuzhiyun 180*4882a593Smuzhiyun hdq_pins: hdq_pins { 181*4882a593Smuzhiyun pinctrl-single,pins = < 182*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x21c6, PIN_INPUT_PULLUP | MUX_MODE0) /* hdq_sio */ 183*4882a593Smuzhiyun >; 184*4882a593Smuzhiyun }; 185*4882a593Smuzhiyun 186*4882a593Smuzhiyun pwm_pins: pinmux_pwm_pins { 187*4882a593Smuzhiyun pinctrl-single,pins = < 188*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20B8, PIN_OUTPUT | PIN_OFF_OUTPUT_LOW | MUX_MODE3) /* gpmc_ncs5.gpt_10_pwm_evt */ 189*4882a593Smuzhiyun >; 190*4882a593Smuzhiyun }; 191*4882a593Smuzhiyun 192*4882a593Smuzhiyun led_pins: pinmux_led_pins { 193*4882a593Smuzhiyun pinctrl-single,pins = < 194*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x21d8, PIN_OUTPUT | MUX_MODE4) /* gpio_179 */ 195*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x21da, PIN_OUTPUT | MUX_MODE4) /* gpio_180 */ 196*4882a593Smuzhiyun >; 197*4882a593Smuzhiyun }; 198*4882a593Smuzhiyun 199*4882a593Smuzhiyun mmc1_pins: pinmux_mmc1_pins { 200*4882a593Smuzhiyun pinctrl-single,pins = < 201*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x2144, PIN_OUTPUT | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */ 202*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT | MUX_MODE0) /* sdmmc1_cmd.sdmmc1_cmd */ 203*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT | MUX_MODE0) /* sdmmc1_dat0.sdmmc1_dat0 */ 204*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */ 205*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT | MUX_MODE0) /* sdmmc1_dat2.sdmmc1_dat2 */ 206*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT | MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */ 207*4882a593Smuzhiyun >; 208*4882a593Smuzhiyun }; 209*4882a593Smuzhiyun 210*4882a593Smuzhiyun tsc2004_pins: pinmux_tsc2004_pins { 211*4882a593Smuzhiyun pinctrl-single,pins = < 212*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x2186, PIN_INPUT | MUX_MODE4) /* mcbsp4_dr.gpio_153 */ 213*4882a593Smuzhiyun >; 214*4882a593Smuzhiyun }; 215*4882a593Smuzhiyun 216*4882a593Smuzhiyun backlight_pins: pinmux_backlight_pins { 217*4882a593Smuzhiyun pinctrl-single,pins = < 218*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x2188, PIN_OUTPUT | PIN_OFF_OUTPUT_LOW | MUX_MODE4) /* mcbsp4_dx.gpio_154 */ 219*4882a593Smuzhiyun >; 220*4882a593Smuzhiyun }; 221*4882a593Smuzhiyun 222*4882a593Smuzhiyun isp_pins: pinmux_isp_pins { 223*4882a593Smuzhiyun pinctrl-single,pins = < 224*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x210c, PIN_INPUT | MUX_MODE0) /* cam_hs.cam_hs */ 225*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x210e, PIN_INPUT | MUX_MODE0) /* cam_vs.cam_vs */ 226*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x2110, PIN_INPUT | MUX_MODE0) /* cam_xclka.cam_xclka */ 227*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x2112, PIN_INPUT | MUX_MODE0) /* cam_pclk.cam_pclk */ 228*4882a593Smuzhiyun 229*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x2116, PIN_INPUT | MUX_MODE0) /* cam_d0.cam_d0 */ 230*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x2118, PIN_INPUT | MUX_MODE0) /* cam_d1.cam_d1 */ 231*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x211a, PIN_INPUT | MUX_MODE0) /* cam_d2.cam_d2 */ 232*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x211c, PIN_INPUT | MUX_MODE0) /* cam_d3.cam_d3 */ 233*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x211e, PIN_INPUT | MUX_MODE0) /* cam_d4.cam_d4 */ 234*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x2120, PIN_INPUT | MUX_MODE0) /* cam_d5.cam_d5 */ 235*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x2122, PIN_INPUT | MUX_MODE0) /* cam_d6.cam_d6 */ 236*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x2124, PIN_INPUT | MUX_MODE0) /* cam_d7.cam_d7 */ 237*4882a593Smuzhiyun >; 238*4882a593Smuzhiyun }; 239*4882a593Smuzhiyun 240*4882a593Smuzhiyun panel_pwr_pins: pinmux_panel_pwr_pins { 241*4882a593Smuzhiyun pinctrl-single,pins = < 242*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x218a, PIN_OUTPUT | PIN_OFF_OUTPUT_LOW | MUX_MODE4) /* mcbsp4_fs.gpio_155 */ 243*4882a593Smuzhiyun >; 244*4882a593Smuzhiyun }; 245*4882a593Smuzhiyun 246*4882a593Smuzhiyun dss_dpi_pins1: pinmux_dss_dpi_pins1 { 247*4882a593Smuzhiyun pinctrl-single,pins = < 248*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_pclk.dss_pclk */ 249*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_hsync.dss_hsync */ 250*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_vsync.dss_vsync */ 251*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_acbias.dss_acbias */ 252*4882a593Smuzhiyun 253*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data6.dss_data6 */ 254*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20ea, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data7.dss_data7 */ 255*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20ec, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data8.dss_data8 */ 256*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20ee, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data9.dss_data9 */ 257*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data10.dss_data10 */ 258*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data11.dss_data11 */ 259*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data12.dss_data12 */ 260*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data13.dss_data13 */ 261*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20f8, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data14.dss_data14 */ 262*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20fa, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data15.dss_data15 */ 263*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data16.dss_data16 */ 264*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data17.dss_data17 */ 265*4882a593Smuzhiyun 266*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x2100, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE3) /* dss_data18.dss_data0 */ 267*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x2102, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE3) /* dss_data19.dss_data1 */ 268*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x2104, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE3) /* dss_data20.dss_data2 */ 269*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x2106, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE3) /* dss_data21.dss_data3 */ 270*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE3) /* dss_data22.dss_data4 */ 271*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE3) /* dss_data23.dss_data5 */ 272*4882a593Smuzhiyun >; 273*4882a593Smuzhiyun }; 274*4882a593Smuzhiyun}; 275*4882a593Smuzhiyun 276*4882a593Smuzhiyun&omap3_pmx_wkup { 277*4882a593Smuzhiyun gpio_key_pins_wkup: pinmux_gpio_key_pins_wkup { 278*4882a593Smuzhiyun pinctrl-single,pins = < 279*4882a593Smuzhiyun OMAP3_WKUP_IOPAD(0x2a0a, PIN_INPUT_PULLUP | MUX_MODE4) /* sys_boot0.gpio_2 */ 280*4882a593Smuzhiyun OMAP3_WKUP_IOPAD(0x2a14, PIN_INPUT_PULLUP | MUX_MODE4) /* sys_boot5.gpio_7 */ 281*4882a593Smuzhiyun >; 282*4882a593Smuzhiyun }; 283*4882a593Smuzhiyun 284*4882a593Smuzhiyun lan9221_pins: pinmux_lan9221_pins { 285*4882a593Smuzhiyun pinctrl-single,pins = < 286*4882a593Smuzhiyun OMAP3_WKUP_IOPAD(0x2a5a, PIN_INPUT | MUX_MODE4) /* reserved.gpio_129 */ 287*4882a593Smuzhiyun >; 288*4882a593Smuzhiyun }; 289*4882a593Smuzhiyun 290*4882a593Smuzhiyun mmc1_cd: pinmux_mmc1_cd { 291*4882a593Smuzhiyun pinctrl-single,pins = < 292*4882a593Smuzhiyun OMAP3_WKUP_IOPAD(0x2a54, PIN_INPUT_PULLUP | MUX_MODE4) /* reserved.gpio_127 */ 293*4882a593Smuzhiyun >; 294*4882a593Smuzhiyun }; 295*4882a593Smuzhiyun}; 296*4882a593Smuzhiyun 297*4882a593Smuzhiyun&i2c2 { 298*4882a593Smuzhiyun mt9p031@48 { 299*4882a593Smuzhiyun compatible = "aptina,mt9p031"; 300*4882a593Smuzhiyun reg = <0x48>; 301*4882a593Smuzhiyun clocks = <&isp 0>; 302*4882a593Smuzhiyun vaa-supply = <&vaux4>; 303*4882a593Smuzhiyun vdd-supply = <&vaux4>; 304*4882a593Smuzhiyun vdd_io-supply = <&vaux4>; 305*4882a593Smuzhiyun port { 306*4882a593Smuzhiyun mt9p031_out: endpoint { 307*4882a593Smuzhiyun input-clock-frequency = <24000000>; 308*4882a593Smuzhiyun pixel-clock-frequency = <72000000>; 309*4882a593Smuzhiyun remote-endpoint = <&ccdc_ep>; 310*4882a593Smuzhiyun }; 311*4882a593Smuzhiyun }; 312*4882a593Smuzhiyun }; 313*4882a593Smuzhiyun}; 314*4882a593Smuzhiyun 315*4882a593Smuzhiyun&i2c3 { 316*4882a593Smuzhiyun touchscreen: tsc2004@48 { 317*4882a593Smuzhiyun compatible = "ti,tsc2004"; 318*4882a593Smuzhiyun reg = <0x48>; 319*4882a593Smuzhiyun vio-supply = <&vaux1>; 320*4882a593Smuzhiyun pinctrl-names = "default"; 321*4882a593Smuzhiyun pinctrl-0 = <&tsc2004_pins>; 322*4882a593Smuzhiyun interrupts-extended = <&gpio5 25 IRQ_TYPE_EDGE_RISING>; /* gpio 153 */ 323*4882a593Smuzhiyun 324*4882a593Smuzhiyun touchscreen-fuzz-x = <4>; 325*4882a593Smuzhiyun touchscreen-fuzz-y = <7>; 326*4882a593Smuzhiyun touchscreen-fuzz-pressure = <2>; 327*4882a593Smuzhiyun touchscreen-size-x = <4096>; 328*4882a593Smuzhiyun touchscreen-size-y = <4096>; 329*4882a593Smuzhiyun touchscreen-max-pressure = <2048>; 330*4882a593Smuzhiyun 331*4882a593Smuzhiyun ti,x-plate-ohms = <280>; 332*4882a593Smuzhiyun ti,esd-recovery-timeout-ms = <8000>; 333*4882a593Smuzhiyun }; 334*4882a593Smuzhiyun}; 335*4882a593Smuzhiyun 336*4882a593Smuzhiyun&mcspi1 { 337*4882a593Smuzhiyun at25@0 { 338*4882a593Smuzhiyun compatible = "atmel,at25"; 339*4882a593Smuzhiyun reg = <0>; 340*4882a593Smuzhiyun spi-max-frequency = <5000000>; 341*4882a593Smuzhiyun spi-cpha; 342*4882a593Smuzhiyun spi-cpol; 343*4882a593Smuzhiyun 344*4882a593Smuzhiyun pagesize = <64>; 345*4882a593Smuzhiyun size = <32768>; 346*4882a593Smuzhiyun address-width = <16>; 347*4882a593Smuzhiyun }; 348*4882a593Smuzhiyun}; 349*4882a593Smuzhiyun 350*4882a593Smuzhiyun&isp { 351*4882a593Smuzhiyun pinctrl-names = "default"; 352*4882a593Smuzhiyun pinctrl-0 = <&isp_pins>; 353*4882a593Smuzhiyun ports { 354*4882a593Smuzhiyun port@0 { 355*4882a593Smuzhiyun reg = <0>; 356*4882a593Smuzhiyun ccdc_ep: endpoint { 357*4882a593Smuzhiyun remote-endpoint = <&mt9p031_out>; 358*4882a593Smuzhiyun bus-width = <8>; 359*4882a593Smuzhiyun hsync-active = <1>; 360*4882a593Smuzhiyun vsync-active = <1>; 361*4882a593Smuzhiyun pclk-sample = <0>; 362*4882a593Smuzhiyun }; 363*4882a593Smuzhiyun }; 364*4882a593Smuzhiyun }; 365*4882a593Smuzhiyun}; 366*4882a593Smuzhiyun 367*4882a593Smuzhiyun&uart1 { 368*4882a593Smuzhiyun interrupts-extended = <&intc 72 &omap3_pmx_core OMAP3_UART1_RX>; 369*4882a593Smuzhiyun}; 370*4882a593Smuzhiyun 371*4882a593Smuzhiyun/* Wired to the tps65950 on the SOM, only the USB connector is on the devkit */ 372*4882a593Smuzhiyun&usb_otg_hs { 373*4882a593Smuzhiyun pinctrl-names = "default"; 374*4882a593Smuzhiyun pinctrl-0 = <&hsusb_otg_pins>; 375*4882a593Smuzhiyun interface-type = <0>; 376*4882a593Smuzhiyun usb-phy = <&usb2_phy>; 377*4882a593Smuzhiyun phys = <&usb2_phy>; 378*4882a593Smuzhiyun phy-names = "usb2-phy"; 379*4882a593Smuzhiyun mode = <3>; 380*4882a593Smuzhiyun power = <50>; 381*4882a593Smuzhiyun}; 382