xref: /OK3568_Linux_fs/kernel/scripts/dtc/include-prefixes/arm/kirkwood-rd88f6192.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Marvell RD88F6192 Board descrition
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Andrew Lunn <andrew@lunn.ch>
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * This file contains the definitions that are common between the three
8*4882a593Smuzhiyun * variants of the Marvell Kirkwood Development Board.
9*4882a593Smuzhiyun */
10*4882a593Smuzhiyun/dts-v1/;
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun#include "kirkwood.dtsi"
13*4882a593Smuzhiyun#include "kirkwood-6192.dtsi"
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun/ {
16*4882a593Smuzhiyun	model = "Marvell RD88F6192 reference design";
17*4882a593Smuzhiyun	compatible = "marvell,rd88f6192", "marvell,kirkwood-88f6192", "marvell,kirkwood";
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun	memory {
20*4882a593Smuzhiyun		device_type = "memory";
21*4882a593Smuzhiyun		reg = <0x00000000 0x20000000>;
22*4882a593Smuzhiyun	};
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun	chosen {
25*4882a593Smuzhiyun		bootargs = "console=ttyS0,115200n8";
26*4882a593Smuzhiyun		stdout-path = &uart0;
27*4882a593Smuzhiyun	};
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun	ocp@f1000000 {
30*4882a593Smuzhiyun		pinctrl: pin-controller@10000 {
31*4882a593Smuzhiyun			pinctrl-0 = <&pmx_usb_power>;
32*4882a593Smuzhiyun			pinctrl-names = "default";
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun                        pmx_usb_power: pmx-usb-power {
35*4882a593Smuzhiyun                                marvell,pins = "mpp10";
36*4882a593Smuzhiyun                                marvell,function = "gpo";
37*4882a593Smuzhiyun                        };
38*4882a593Smuzhiyun		};
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun		serial@12000 {
41*4882a593Smuzhiyun			status = "okay";
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun		};
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun		spi@10600 {
46*4882a593Smuzhiyun			status = "okay";
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun			m25p128@0 {
49*4882a593Smuzhiyun				#address-cells = <1>;
50*4882a593Smuzhiyun				#size-cells = <1>;
51*4882a593Smuzhiyun				compatible = "st,m25p128", "jedec,spi-nor";
52*4882a593Smuzhiyun				reg = <0>;
53*4882a593Smuzhiyun				spi-max-frequency = <20000000>;
54*4882a593Smuzhiyun				mode = <0>;
55*4882a593Smuzhiyun			};
56*4882a593Smuzhiyun		};
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun		sata@80000 {
59*4882a593Smuzhiyun			status = "okay";
60*4882a593Smuzhiyun			nr-ports = <2>;
61*4882a593Smuzhiyun		};
62*4882a593Smuzhiyun	};
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun	regulators {
65*4882a593Smuzhiyun                compatible = "simple-bus";
66*4882a593Smuzhiyun                #address-cells = <1>;
67*4882a593Smuzhiyun                #size-cells = <0>;
68*4882a593Smuzhiyun                pinctrl-0 = <&pmx_usb_power>;
69*4882a593Smuzhiyun                pinctrl-names = "default";
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun                usb_power: regulator@0 {
72*4882a593Smuzhiyun                        compatible = "regulator-fixed";
73*4882a593Smuzhiyun                        reg = <0>;
74*4882a593Smuzhiyun                        regulator-name = "USB VBUS";
75*4882a593Smuzhiyun                        regulator-min-microvolt = <5000000>;
76*4882a593Smuzhiyun                        regulator-max-microvolt = <5000000>;
77*4882a593Smuzhiyun                        enable-active-high;
78*4882a593Smuzhiyun                        regulator-always-on;
79*4882a593Smuzhiyun                        regulator-boot-on;
80*4882a593Smuzhiyun                        gpio = <&gpio0 10 GPIO_ACTIVE_HIGH>;
81*4882a593Smuzhiyun                };
82*4882a593Smuzhiyun	};
83*4882a593Smuzhiyun};
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun&mdio {
86*4882a593Smuzhiyun        status = "okay";
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun        ethphy0: ethernet-phy@8 {
89*4882a593Smuzhiyun                reg = <8>;
90*4882a593Smuzhiyun        };
91*4882a593Smuzhiyun};
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun&eth0 {
94*4882a593Smuzhiyun        status = "okay";
95*4882a593Smuzhiyun        ethernet0-port@0 {
96*4882a593Smuzhiyun                phy-handle = <&ethphy0>;
97*4882a593Smuzhiyun        };
98*4882a593Smuzhiyun};
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun&pciec {
101*4882a593Smuzhiyun        status = "okay";
102*4882a593Smuzhiyun};
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun&pcie0 {
105*4882a593Smuzhiyun	status = "okay";
106*4882a593Smuzhiyun};
107