1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Copyright (C) 2019 PHYTEC Messtechnik GmbH 4*4882a593Smuzhiyun * Author: Stefan Riedmueller <s.riedmueller@phytec.de> 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun#include "imx6ul-phytec-segin.dtsi" 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun/ { 10*4882a593Smuzhiyun model = "PHYTEC phyBOARD-Segin i.MX6 ULL"; 11*4882a593Smuzhiyun compatible = "phytec,imx6ull-pbacd-10", "phytec,imx6ull-pcl063","fsl,imx6ull"; 12*4882a593Smuzhiyun}; 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun&iomuxc { 15*4882a593Smuzhiyun /delete-node/ flexcan1engrp; 16*4882a593Smuzhiyun /delete-node/ rtcintgrp; 17*4882a593Smuzhiyun /delete-node/ stmpegrp; 18*4882a593Smuzhiyun}; 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun&iomuxc_snvs { 21*4882a593Smuzhiyun princtrl_flexcan1_en: flexcan1engrp { 22*4882a593Smuzhiyun fsl,pins = < 23*4882a593Smuzhiyun MX6ULL_PAD_SNVS_TAMPER2__GPIO5_IO02 0x17059 24*4882a593Smuzhiyun >; 25*4882a593Smuzhiyun }; 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun pinctrl_rtc_int: rtcintgrp { 28*4882a593Smuzhiyun fsl,pins = < 29*4882a593Smuzhiyun MX6ULL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x17059 30*4882a593Smuzhiyun >; 31*4882a593Smuzhiyun }; 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun pinctrl_stmpe: stmpegrp { 34*4882a593Smuzhiyun fsl,pins = < 35*4882a593Smuzhiyun MX6ULL_PAD_SNVS_TAMPER3__GPIO5_IO03 0x17059 36*4882a593Smuzhiyun >; 37*4882a593Smuzhiyun }; 38*4882a593Smuzhiyun}; 39