1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0) 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Device tree for the Tolino Shine 3 ebook reader 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Name on mainboard is: 37NB-E60K00+4A4 6*4882a593Smuzhiyun * Serials start with: E60K02 (a number also seen in 7*4882a593Smuzhiyun * vendor kernel sources) 8*4882a593Smuzhiyun * 9*4882a593Smuzhiyun * This mainboard seems to be equipped with different SoCs. 10*4882a593Smuzhiyun * In the Toline Shine 3 ebook reader it is a i.MX6SL 11*4882a593Smuzhiyun * 12*4882a593Smuzhiyun * Copyright 2019 Andreas Kemnade 13*4882a593Smuzhiyun * based on works 14*4882a593Smuzhiyun * Copyright 2016 Freescale Semiconductor, Inc. 15*4882a593Smuzhiyun */ 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun/dts-v1/; 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun#include <dt-bindings/input/input.h> 20*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h> 21*4882a593Smuzhiyun#include "imx6sl.dtsi" 22*4882a593Smuzhiyun#include "e60k02.dtsi" 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun/ { 25*4882a593Smuzhiyun model = "Tolino Shine 3"; 26*4882a593Smuzhiyun compatible = "kobo,tolino-shine3", "fsl,imx6sl"; 27*4882a593Smuzhiyun}; 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun&gpio_keys { 30*4882a593Smuzhiyun pinctrl-names = "default"; 31*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_gpio_keys>; 32*4882a593Smuzhiyun}; 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun&i2c1 { 35*4882a593Smuzhiyun pinctrl-names = "default","sleep"; 36*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_i2c1>; 37*4882a593Smuzhiyun pinctrl-1 = <&pinctrl_i2c1_sleep>; 38*4882a593Smuzhiyun}; 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun&i2c2 { 41*4882a593Smuzhiyun pinctrl-names = "default","sleep"; 42*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_i2c2>; 43*4882a593Smuzhiyun pinctrl-1 = <&pinctrl_i2c2_sleep>; 44*4882a593Smuzhiyun}; 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun&i2c3 { 47*4882a593Smuzhiyun pinctrl-names = "default"; 48*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_i2c3>; 49*4882a593Smuzhiyun}; 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun&iomuxc { 52*4882a593Smuzhiyun pinctrl-names = "default"; 53*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_hog>; 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun pinctrl_gpio_keys: gpio-keysgrp { 56*4882a593Smuzhiyun fsl,pins = < 57*4882a593Smuzhiyun MX6SL_PAD_SD1_DAT1__GPIO5_IO08 0x17059 /* PWR_SW */ 58*4882a593Smuzhiyun MX6SL_PAD_SD1_DAT4__GPIO5_IO12 0x17059 /* HALL_EN */ 59*4882a593Smuzhiyun >; 60*4882a593Smuzhiyun }; 61*4882a593Smuzhiyun 62*4882a593Smuzhiyun pinctrl_hog: hoggrp { 63*4882a593Smuzhiyun fsl,pins = < 64*4882a593Smuzhiyun MX6SL_PAD_LCD_DAT0__GPIO2_IO20 0x79 65*4882a593Smuzhiyun MX6SL_PAD_LCD_DAT1__GPIO2_IO21 0x79 66*4882a593Smuzhiyun MX6SL_PAD_LCD_DAT2__GPIO2_IO22 0x79 67*4882a593Smuzhiyun MX6SL_PAD_LCD_DAT3__GPIO2_IO23 0x79 68*4882a593Smuzhiyun MX6SL_PAD_LCD_DAT4__GPIO2_IO24 0x79 69*4882a593Smuzhiyun MX6SL_PAD_LCD_DAT5__GPIO2_IO25 0x79 70*4882a593Smuzhiyun MX6SL_PAD_LCD_DAT6__GPIO2_IO26 0x79 71*4882a593Smuzhiyun MX6SL_PAD_LCD_DAT7__GPIO2_IO27 0x79 72*4882a593Smuzhiyun MX6SL_PAD_LCD_DAT8__GPIO2_IO28 0x79 73*4882a593Smuzhiyun MX6SL_PAD_LCD_DAT9__GPIO2_IO29 0x79 74*4882a593Smuzhiyun MX6SL_PAD_LCD_DAT10__GPIO2_IO30 0x79 75*4882a593Smuzhiyun MX6SL_PAD_LCD_DAT11__GPIO2_IO31 0x79 76*4882a593Smuzhiyun MX6SL_PAD_LCD_DAT12__GPIO3_IO00 0x79 77*4882a593Smuzhiyun MX6SL_PAD_LCD_DAT13__GPIO3_IO01 0x79 78*4882a593Smuzhiyun MX6SL_PAD_LCD_DAT14__GPIO3_IO02 0x79 79*4882a593Smuzhiyun MX6SL_PAD_LCD_DAT15__GPIO3_IO03 0x79 80*4882a593Smuzhiyun MX6SL_PAD_LCD_DAT16__GPIO3_IO04 0x79 81*4882a593Smuzhiyun MX6SL_PAD_LCD_DAT17__GPIO3_IO05 0x79 82*4882a593Smuzhiyun MX6SL_PAD_LCD_DAT18__GPIO3_IO06 0x79 83*4882a593Smuzhiyun MX6SL_PAD_LCD_DAT19__GPIO3_IO07 0x79 84*4882a593Smuzhiyun MX6SL_PAD_LCD_DAT20__GPIO3_IO08 0x79 85*4882a593Smuzhiyun MX6SL_PAD_LCD_DAT21__GPIO3_IO09 0x79 86*4882a593Smuzhiyun MX6SL_PAD_LCD_DAT22__GPIO3_IO10 0x79 87*4882a593Smuzhiyun MX6SL_PAD_LCD_DAT23__GPIO3_IO11 0x79 88*4882a593Smuzhiyun MX6SL_PAD_LCD_CLK__GPIO2_IO15 0x79 89*4882a593Smuzhiyun MX6SL_PAD_LCD_ENABLE__GPIO2_IO16 0x79 90*4882a593Smuzhiyun MX6SL_PAD_LCD_HSYNC__GPIO2_IO17 0x79 91*4882a593Smuzhiyun MX6SL_PAD_LCD_VSYNC__GPIO2_IO18 0x79 92*4882a593Smuzhiyun MX6SL_PAD_LCD_RESET__GPIO2_IO19 0x79 93*4882a593Smuzhiyun MX6SL_PAD_KEY_COL3__GPIO3_IO30 0x79 94*4882a593Smuzhiyun MX6SL_PAD_KEY_ROW7__GPIO4_IO07 0x79 95*4882a593Smuzhiyun MX6SL_PAD_ECSPI2_MOSI__GPIO4_IO13 0x79 96*4882a593Smuzhiyun MX6SL_PAD_KEY_COL5__GPIO4_IO02 0x79 97*4882a593Smuzhiyun MX6SL_PAD_KEY_ROW6__GPIO4_IO05 0x79 98*4882a593Smuzhiyun >; 99*4882a593Smuzhiyun }; 100*4882a593Smuzhiyun 101*4882a593Smuzhiyun pinctrl_i2c1: i2c1grp { 102*4882a593Smuzhiyun fsl,pins = < 103*4882a593Smuzhiyun MX6SL_PAD_I2C1_SCL__I2C1_SCL 0x4001f8b1 104*4882a593Smuzhiyun MX6SL_PAD_I2C1_SDA__I2C1_SDA 0x4001f8b1 105*4882a593Smuzhiyun >; 106*4882a593Smuzhiyun }; 107*4882a593Smuzhiyun 108*4882a593Smuzhiyun pinctrl_i2c1_sleep: i2c1grp-sleep { 109*4882a593Smuzhiyun fsl,pins = < 110*4882a593Smuzhiyun MX6SL_PAD_I2C1_SCL__I2C1_SCL 0x400108b1 111*4882a593Smuzhiyun MX6SL_PAD_I2C1_SDA__I2C1_SDA 0x400108b1 112*4882a593Smuzhiyun >; 113*4882a593Smuzhiyun }; 114*4882a593Smuzhiyun 115*4882a593Smuzhiyun pinctrl_i2c2: i2c2grp { 116*4882a593Smuzhiyun fsl,pins = < 117*4882a593Smuzhiyun MX6SL_PAD_I2C2_SCL__I2C2_SCL 0x4001f8b1 118*4882a593Smuzhiyun MX6SL_PAD_I2C2_SDA__I2C2_SDA 0x4001f8b1 119*4882a593Smuzhiyun >; 120*4882a593Smuzhiyun }; 121*4882a593Smuzhiyun 122*4882a593Smuzhiyun pinctrl_i2c2_sleep: i2c2grp-sleep { 123*4882a593Smuzhiyun fsl,pins = < 124*4882a593Smuzhiyun MX6SL_PAD_I2C2_SCL__I2C2_SCL 0x400108b1 125*4882a593Smuzhiyun MX6SL_PAD_I2C2_SDA__I2C2_SDA 0x400108b1 126*4882a593Smuzhiyun >; 127*4882a593Smuzhiyun }; 128*4882a593Smuzhiyun 129*4882a593Smuzhiyun pinctrl_i2c3: i2c3grp { 130*4882a593Smuzhiyun fsl,pins = < 131*4882a593Smuzhiyun MX6SL_PAD_REF_CLK_24M__I2C3_SCL 0x4001f8b1 132*4882a593Smuzhiyun MX6SL_PAD_REF_CLK_32K__I2C3_SDA 0x4001f8b1 133*4882a593Smuzhiyun >; 134*4882a593Smuzhiyun }; 135*4882a593Smuzhiyun 136*4882a593Smuzhiyun pinctrl_led: ledgrp { 137*4882a593Smuzhiyun fsl,pins = < 138*4882a593Smuzhiyun MX6SL_PAD_SD1_DAT6__GPIO5_IO07 0x17059 139*4882a593Smuzhiyun >; 140*4882a593Smuzhiyun }; 141*4882a593Smuzhiyun 142*4882a593Smuzhiyun pinctrl_lm3630a_bl_gpio: lm3630a-bl-gpiogrp { 143*4882a593Smuzhiyun fsl,pins = < 144*4882a593Smuzhiyun MX6SL_PAD_EPDC_PWRCTRL3__GPIO2_IO10 0x10059 /* HWEN */ 145*4882a593Smuzhiyun >; 146*4882a593Smuzhiyun }; 147*4882a593Smuzhiyun 148*4882a593Smuzhiyun pinctrl_ricoh_gpio: ricoh_gpiogrp { 149*4882a593Smuzhiyun fsl,pins = < 150*4882a593Smuzhiyun MX6SL_PAD_SD1_CLK__GPIO5_IO15 0x1b8b1 /* ricoh619 chg */ 151*4882a593Smuzhiyun MX6SL_PAD_SD1_DAT0__GPIO5_IO11 0x1b8b1 /* ricoh619 irq */ 152*4882a593Smuzhiyun MX6SL_PAD_KEY_COL2__GPIO3_IO28 0x1b8b1 /* ricoh619 bat_low_int */ 153*4882a593Smuzhiyun >; 154*4882a593Smuzhiyun }; 155*4882a593Smuzhiyun 156*4882a593Smuzhiyun pinctrl_uart1: uart1grp { 157*4882a593Smuzhiyun fsl,pins = < 158*4882a593Smuzhiyun MX6SL_PAD_UART1_TXD__UART1_TX_DATA 0x1b0b1 159*4882a593Smuzhiyun MX6SL_PAD_UART1_RXD__UART1_TX_DATA 0x1b0b1 160*4882a593Smuzhiyun >; 161*4882a593Smuzhiyun }; 162*4882a593Smuzhiyun 163*4882a593Smuzhiyun pinctrl_usbotg1: usbotg1grp { 164*4882a593Smuzhiyun fsl,pins = < 165*4882a593Smuzhiyun MX6SL_PAD_EPDC_PWRCOM__USB_OTG1_ID 0x17059 166*4882a593Smuzhiyun >; 167*4882a593Smuzhiyun }; 168*4882a593Smuzhiyun 169*4882a593Smuzhiyun pinctrl_usdhc2: usdhc2grp { 170*4882a593Smuzhiyun fsl,pins = < 171*4882a593Smuzhiyun MX6SL_PAD_SD2_CMD__SD2_CMD 0x17059 172*4882a593Smuzhiyun MX6SL_PAD_SD2_CLK__SD2_CLK 0x13059 173*4882a593Smuzhiyun MX6SL_PAD_SD2_DAT0__SD2_DATA0 0x17059 174*4882a593Smuzhiyun MX6SL_PAD_SD2_DAT1__SD2_DATA1 0x17059 175*4882a593Smuzhiyun MX6SL_PAD_SD2_DAT2__SD2_DATA2 0x17059 176*4882a593Smuzhiyun MX6SL_PAD_SD2_DAT3__SD2_DATA3 0x17059 177*4882a593Smuzhiyun >; 178*4882a593Smuzhiyun }; 179*4882a593Smuzhiyun 180*4882a593Smuzhiyun pinctrl_usdhc2_100mhz: usdhc2grp-100mhz { 181*4882a593Smuzhiyun fsl,pins = < 182*4882a593Smuzhiyun MX6SL_PAD_SD2_CMD__SD2_CMD 0x170b9 183*4882a593Smuzhiyun MX6SL_PAD_SD2_CLK__SD2_CLK 0x130b9 184*4882a593Smuzhiyun MX6SL_PAD_SD2_DAT0__SD2_DATA0 0x170b9 185*4882a593Smuzhiyun MX6SL_PAD_SD2_DAT1__SD2_DATA1 0x170b9 186*4882a593Smuzhiyun MX6SL_PAD_SD2_DAT2__SD2_DATA2 0x170b9 187*4882a593Smuzhiyun MX6SL_PAD_SD2_DAT3__SD2_DATA3 0x170b9 188*4882a593Smuzhiyun >; 189*4882a593Smuzhiyun }; 190*4882a593Smuzhiyun 191*4882a593Smuzhiyun pinctrl_usdhc2_200mhz: usdhc2grp-200mhz { 192*4882a593Smuzhiyun fsl,pins = < 193*4882a593Smuzhiyun MX6SL_PAD_SD2_CMD__SD2_CMD 0x170f9 194*4882a593Smuzhiyun MX6SL_PAD_SD2_CLK__SD2_CLK 0x130f9 195*4882a593Smuzhiyun MX6SL_PAD_SD2_DAT0__SD2_DATA0 0x170f9 196*4882a593Smuzhiyun MX6SL_PAD_SD2_DAT1__SD2_DATA1 0x170f9 197*4882a593Smuzhiyun MX6SL_PAD_SD2_DAT2__SD2_DATA2 0x170f9 198*4882a593Smuzhiyun MX6SL_PAD_SD2_DAT3__SD2_DATA3 0x170f9 199*4882a593Smuzhiyun >; 200*4882a593Smuzhiyun }; 201*4882a593Smuzhiyun 202*4882a593Smuzhiyun pinctrl_usdhc2_sleep: usdhc2grp-sleep { 203*4882a593Smuzhiyun fsl,pins = < 204*4882a593Smuzhiyun MX6SL_PAD_SD2_CMD__GPIO5_IO04 0x100f9 205*4882a593Smuzhiyun MX6SL_PAD_SD2_CLK__GPIO5_IO05 0x100f9 206*4882a593Smuzhiyun MX6SL_PAD_SD2_DAT0__GPIO5_IO01 0x100f9 207*4882a593Smuzhiyun MX6SL_PAD_SD2_DAT1__GPIO4_IO30 0x100f9 208*4882a593Smuzhiyun MX6SL_PAD_SD2_DAT2__GPIO5_IO03 0x100f9 209*4882a593Smuzhiyun MX6SL_PAD_SD2_DAT3__GPIO4_IO28 0x100f9 210*4882a593Smuzhiyun >; 211*4882a593Smuzhiyun }; 212*4882a593Smuzhiyun 213*4882a593Smuzhiyun pinctrl_usdhc3: usdhc3grp { 214*4882a593Smuzhiyun fsl,pins = < 215*4882a593Smuzhiyun MX6SL_PAD_SD3_CMD__SD3_CMD 0x11059 216*4882a593Smuzhiyun MX6SL_PAD_SD3_CLK__SD3_CLK 0x11059 217*4882a593Smuzhiyun MX6SL_PAD_SD3_DAT0__SD3_DATA0 0x11059 218*4882a593Smuzhiyun MX6SL_PAD_SD3_DAT1__SD3_DATA1 0x11059 219*4882a593Smuzhiyun MX6SL_PAD_SD3_DAT2__SD3_DATA2 0x11059 220*4882a593Smuzhiyun MX6SL_PAD_SD3_DAT3__SD3_DATA3 0x11059 221*4882a593Smuzhiyun >; 222*4882a593Smuzhiyun }; 223*4882a593Smuzhiyun 224*4882a593Smuzhiyun pinctrl_usdhc3_100mhz: usdhc3grp-100mhz { 225*4882a593Smuzhiyun fsl,pins = < 226*4882a593Smuzhiyun MX6SL_PAD_SD3_CMD__SD3_CMD 0x170b9 227*4882a593Smuzhiyun MX6SL_PAD_SD3_CLK__SD3_CLK 0x170b9 228*4882a593Smuzhiyun MX6SL_PAD_SD3_DAT0__SD3_DATA0 0x170b9 229*4882a593Smuzhiyun MX6SL_PAD_SD3_DAT1__SD3_DATA1 0x170b9 230*4882a593Smuzhiyun MX6SL_PAD_SD3_DAT2__SD3_DATA2 0x170b9 231*4882a593Smuzhiyun MX6SL_PAD_SD3_DAT3__SD3_DATA3 0x170b9 232*4882a593Smuzhiyun >; 233*4882a593Smuzhiyun }; 234*4882a593Smuzhiyun 235*4882a593Smuzhiyun pinctrl_usdhc3_200mhz: usdhc3grp-200mhz { 236*4882a593Smuzhiyun fsl,pins = < 237*4882a593Smuzhiyun MX6SL_PAD_SD3_CMD__SD3_CMD 0x170f9 238*4882a593Smuzhiyun MX6SL_PAD_SD3_CLK__SD3_CLK 0x170f9 239*4882a593Smuzhiyun MX6SL_PAD_SD3_DAT0__SD3_DATA0 0x170f9 240*4882a593Smuzhiyun MX6SL_PAD_SD3_DAT1__SD3_DATA1 0x170f9 241*4882a593Smuzhiyun MX6SL_PAD_SD3_DAT2__SD3_DATA2 0x170f9 242*4882a593Smuzhiyun MX6SL_PAD_SD3_DAT3__SD3_DATA3 0x170f9 243*4882a593Smuzhiyun >; 244*4882a593Smuzhiyun }; 245*4882a593Smuzhiyun 246*4882a593Smuzhiyun pinctrl_usdhc3_sleep: usdhc3grp-sleep { 247*4882a593Smuzhiyun fsl,pins = < 248*4882a593Smuzhiyun MX6SL_PAD_SD3_CMD__GPIO5_IO21 0x100c1 249*4882a593Smuzhiyun MX6SL_PAD_SD3_CLK__GPIO5_IO18 0x100c1 250*4882a593Smuzhiyun MX6SL_PAD_SD3_DAT0__GPIO5_IO19 0x100c1 251*4882a593Smuzhiyun MX6SL_PAD_SD3_DAT1__GPIO5_IO20 0x100c1 252*4882a593Smuzhiyun MX6SL_PAD_SD3_DAT2__GPIO5_IO16 0x100c1 253*4882a593Smuzhiyun MX6SL_PAD_SD3_DAT3__GPIO5_IO17 0x100c1 254*4882a593Smuzhiyun >; 255*4882a593Smuzhiyun }; 256*4882a593Smuzhiyun 257*4882a593Smuzhiyun pinctrl_wifi_power: wifi-powergrp { 258*4882a593Smuzhiyun fsl,pins = < 259*4882a593Smuzhiyun MX6SL_PAD_SD2_DAT6__GPIO4_IO29 0x10059 /* WIFI_3V3_ON */ 260*4882a593Smuzhiyun >; 261*4882a593Smuzhiyun }; 262*4882a593Smuzhiyun 263*4882a593Smuzhiyun pinctrl_wifi_reset: wifi-resetgrp { 264*4882a593Smuzhiyun fsl,pins = < 265*4882a593Smuzhiyun MX6SL_PAD_SD2_DAT7__GPIO5_IO00 0x10059 /* WIFI_RST */ 266*4882a593Smuzhiyun >; 267*4882a593Smuzhiyun }; 268*4882a593Smuzhiyun}; 269*4882a593Smuzhiyun 270*4882a593Smuzhiyun&leds { 271*4882a593Smuzhiyun pinctrl-names = "default"; 272*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_led>; 273*4882a593Smuzhiyun}; 274*4882a593Smuzhiyun 275*4882a593Smuzhiyun&lm3630a { 276*4882a593Smuzhiyun pinctrl-names = "default"; 277*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_lm3630a_bl_gpio>; 278*4882a593Smuzhiyun}; 279*4882a593Smuzhiyun 280*4882a593Smuzhiyun®_wifi { 281*4882a593Smuzhiyun pinctrl-names = "default"; 282*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_wifi_power>; 283*4882a593Smuzhiyun}; 284*4882a593Smuzhiyun 285*4882a593Smuzhiyun®_vdd1p1 { 286*4882a593Smuzhiyun vin-supply = <&dcdc2_reg>; 287*4882a593Smuzhiyun}; 288*4882a593Smuzhiyun 289*4882a593Smuzhiyun®_vdd2p5 { 290*4882a593Smuzhiyun vin-supply = <&dcdc2_reg>; 291*4882a593Smuzhiyun}; 292*4882a593Smuzhiyun 293*4882a593Smuzhiyun&ricoh619 { 294*4882a593Smuzhiyun pinctrl-names = "default"; 295*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_ricoh_gpio>; 296*4882a593Smuzhiyun}; 297*4882a593Smuzhiyun 298*4882a593Smuzhiyun&uart1 { 299*4882a593Smuzhiyun pinctrl-names = "default"; 300*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_uart1>; 301*4882a593Smuzhiyun}; 302*4882a593Smuzhiyun 303*4882a593Smuzhiyun&usdhc2 { 304*4882a593Smuzhiyun pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep"; 305*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_usdhc2>; 306*4882a593Smuzhiyun pinctrl-1 = <&pinctrl_usdhc2_100mhz>; 307*4882a593Smuzhiyun pinctrl-2 = <&pinctrl_usdhc2_200mhz>; 308*4882a593Smuzhiyun pinctrl-3 = <&pinctrl_usdhc2_sleep>; 309*4882a593Smuzhiyun}; 310*4882a593Smuzhiyun 311*4882a593Smuzhiyun&usdhc3 { 312*4882a593Smuzhiyun pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep"; 313*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_usdhc3>; 314*4882a593Smuzhiyun pinctrl-1 = <&pinctrl_usdhc3_100mhz>; 315*4882a593Smuzhiyun pinctrl-2 = <&pinctrl_usdhc3_200mhz>; 316*4882a593Smuzhiyun pinctrl-3 = <&pinctrl_usdhc3_sleep>; 317*4882a593Smuzhiyun}; 318*4882a593Smuzhiyun 319*4882a593Smuzhiyun&wifi_pwrseq { 320*4882a593Smuzhiyun pinctrl-names = "default"; 321*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_wifi_reset>; 322*4882a593Smuzhiyun}; 323