xref: /OK3568_Linux_fs/kernel/scripts/dtc/include-prefixes/arm/imx6qdl-sr-som-brcm.dtsi (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun/*
2*4882a593Smuzhiyun * Copyright (C) 2013,2014 Russell King
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * This file is dual-licensed: you can use it either under the terms
5*4882a593Smuzhiyun * of the GPL or the X11 license, at your option. Note that this dual
6*4882a593Smuzhiyun * licensing only applies to this file, and not this project as a
7*4882a593Smuzhiyun * whole.
8*4882a593Smuzhiyun *
9*4882a593Smuzhiyun *  a) This file is free software; you can redistribute it and/or
10*4882a593Smuzhiyun *     modify it under the terms of the GNU General Public License
11*4882a593Smuzhiyun *     version 2 as published by the Free Software Foundation.
12*4882a593Smuzhiyun *
13*4882a593Smuzhiyun *     This file is distributed in the hope that it will be useful,
14*4882a593Smuzhiyun *     but WITHOUT ANY WARRANTY; without even the implied warranty of
15*4882a593Smuzhiyun *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16*4882a593Smuzhiyun *     GNU General Public License for more details.
17*4882a593Smuzhiyun *
18*4882a593Smuzhiyun * Or, alternatively,
19*4882a593Smuzhiyun *
20*4882a593Smuzhiyun *  b) Permission is hereby granted, free of charge, to any person
21*4882a593Smuzhiyun *     obtaining a copy of this software and associated documentation
22*4882a593Smuzhiyun *     files (the "Software"), to deal in the Software without
23*4882a593Smuzhiyun *     restriction, including without limitation the rights to use,
24*4882a593Smuzhiyun *     copy, modify, merge, publish, distribute, sublicense, and/or
25*4882a593Smuzhiyun *     sell copies of the Software, and to permit persons to whom the
26*4882a593Smuzhiyun *     Software is furnished to do so, subject to the following
27*4882a593Smuzhiyun *     conditions:
28*4882a593Smuzhiyun *
29*4882a593Smuzhiyun *     The above copyright notice and this permission notice shall be
30*4882a593Smuzhiyun *     included in all copies or substantial portions of the Software.
31*4882a593Smuzhiyun *
32*4882a593Smuzhiyun *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
33*4882a593Smuzhiyun *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
34*4882a593Smuzhiyun *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
35*4882a593Smuzhiyun *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
36*4882a593Smuzhiyun *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
37*4882a593Smuzhiyun *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
38*4882a593Smuzhiyun *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
39*4882a593Smuzhiyun *     OTHER DEALINGS IN THE SOFTWARE.
40*4882a593Smuzhiyun */
41*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h>
42*4882a593Smuzhiyun/ {
43*4882a593Smuzhiyun	clk_brcm: brcm-clock {
44*4882a593Smuzhiyun		compatible = "gpio-gate-clock";
45*4882a593Smuzhiyun		#clock-cells = <0>;
46*4882a593Smuzhiyun		pinctrl-names = "default";
47*4882a593Smuzhiyun		pinctrl-0 = <&pinctrl_microsom_brcm_osc>;
48*4882a593Smuzhiyun		enable-gpios = <&gpio5 5 GPIO_ACTIVE_HIGH>;
49*4882a593Smuzhiyun	};
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun	reg_brcm: brcm-reg {
52*4882a593Smuzhiyun		compatible = "regulator-fixed";
53*4882a593Smuzhiyun		enable-active-high;
54*4882a593Smuzhiyun		gpio = <&gpio3 19 0>;
55*4882a593Smuzhiyun		pinctrl-names = "default";
56*4882a593Smuzhiyun		pinctrl-0 = <&pinctrl_microsom_brcm_reg>;
57*4882a593Smuzhiyun		regulator-name = "brcm_reg";
58*4882a593Smuzhiyun		regulator-min-microvolt = <3300000>;
59*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
60*4882a593Smuzhiyun		startup-delay-us = <200000>;
61*4882a593Smuzhiyun	};
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun	usdhc1_pwrseq: usdhc1_pwrseq {
64*4882a593Smuzhiyun		compatible = "mmc-pwrseq-simple";
65*4882a593Smuzhiyun		reset-gpios = <&gpio5 26 GPIO_ACTIVE_LOW>,
66*4882a593Smuzhiyun			      <&gpio6 0 GPIO_ACTIVE_LOW>;
67*4882a593Smuzhiyun		clocks = <&clk_brcm>;
68*4882a593Smuzhiyun		clock-names = "ext_clock";
69*4882a593Smuzhiyun	};
70*4882a593Smuzhiyun};
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun&iomuxc {
73*4882a593Smuzhiyun	microsom {
74*4882a593Smuzhiyun		pinctrl_microsom_brcm_bt: microsom-brcm-bt {
75*4882a593Smuzhiyun			fsl,pins = <
76*4882a593Smuzhiyun				MX6QDL_PAD_CSI0_DAT14__GPIO6_IO00	0x40013070
77*4882a593Smuzhiyun				MX6QDL_PAD_CSI0_DAT15__GPIO6_IO01	0x40013070
78*4882a593Smuzhiyun				MX6QDL_PAD_CSI0_DAT18__GPIO6_IO04	0x40013070
79*4882a593Smuzhiyun			>;
80*4882a593Smuzhiyun		};
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun		pinctrl_microsom_brcm_osc: microsom-brcm-osc {
83*4882a593Smuzhiyun			fsl,pins = <
84*4882a593Smuzhiyun				MX6QDL_PAD_DISP0_DAT11__GPIO5_IO05	0x40013070
85*4882a593Smuzhiyun			>;
86*4882a593Smuzhiyun		};
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun		pinctrl_microsom_brcm_reg: microsom-brcm-reg {
89*4882a593Smuzhiyun			fsl,pins = <
90*4882a593Smuzhiyun				MX6QDL_PAD_EIM_D19__GPIO3_IO19		0x40013070
91*4882a593Smuzhiyun			>;
92*4882a593Smuzhiyun		};
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun		pinctrl_microsom_brcm_wifi: microsom-brcm-wifi {
95*4882a593Smuzhiyun			fsl,pins = <
96*4882a593Smuzhiyun				MX6QDL_PAD_GPIO_8__XTALOSC_REF_CLK_32K	0x1b0b0
97*4882a593Smuzhiyun				MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20	0x40013070
98*4882a593Smuzhiyun				MX6QDL_PAD_CSI0_DAT8__GPIO5_IO26	0x40013070
99*4882a593Smuzhiyun				MX6QDL_PAD_CSI0_DAT9__GPIO5_IO27	0x40013070
100*4882a593Smuzhiyun			>;
101*4882a593Smuzhiyun		};
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun		pinctrl_microsom_uart4: microsom-uart4 {
104*4882a593Smuzhiyun			fsl,pins = <
105*4882a593Smuzhiyun				MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA 0x1b0b1
106*4882a593Smuzhiyun				MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA 0x1b0b1
107*4882a593Smuzhiyun				MX6QDL_PAD_CSI0_DAT16__UART4_RTS_B 0x1b0b1
108*4882a593Smuzhiyun				MX6QDL_PAD_CSI0_DAT17__UART4_CTS_B 0x1b0b1
109*4882a593Smuzhiyun			>;
110*4882a593Smuzhiyun		};
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun		pinctrl_microsom_usdhc1: microsom-usdhc1 {
113*4882a593Smuzhiyun			fsl,pins = <
114*4882a593Smuzhiyun				MX6QDL_PAD_SD1_CMD__SD1_CMD    0x17059
115*4882a593Smuzhiyun				MX6QDL_PAD_SD1_CLK__SD1_CLK    0x10059
116*4882a593Smuzhiyun				MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17059
117*4882a593Smuzhiyun				MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17059
118*4882a593Smuzhiyun				MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17059
119*4882a593Smuzhiyun				MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17059
120*4882a593Smuzhiyun			>;
121*4882a593Smuzhiyun		};
122*4882a593Smuzhiyun	};
123*4882a593Smuzhiyun};
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun/* UART4 - Connected to optional BRCM Wifi/BT/FM */
126*4882a593Smuzhiyun&uart4 {
127*4882a593Smuzhiyun	pinctrl-names = "default";
128*4882a593Smuzhiyun	pinctrl-0 = <&pinctrl_microsom_brcm_bt &pinctrl_microsom_uart4>;
129*4882a593Smuzhiyun	uart-has-rtscts;
130*4882a593Smuzhiyun	status = "okay";
131*4882a593Smuzhiyun};
132*4882a593Smuzhiyun
133*4882a593Smuzhiyun/* USDHC1 - Connected to optional BRCM Wifi/BT/FM */
134*4882a593Smuzhiyun&usdhc1 {
135*4882a593Smuzhiyun	pinctrl-names = "default";
136*4882a593Smuzhiyun	pinctrl-0 = <&pinctrl_microsom_brcm_wifi &pinctrl_microsom_usdhc1>;
137*4882a593Smuzhiyun	bus-width = <4>;
138*4882a593Smuzhiyun	mmc-pwrseq = <&usdhc1_pwrseq>;
139*4882a593Smuzhiyun	keep-power-in-suspend;
140*4882a593Smuzhiyun	no-1-8-v;
141*4882a593Smuzhiyun	non-removable;
142*4882a593Smuzhiyun	vmmc-supply = <&reg_brcm>;
143*4882a593Smuzhiyun	status = "okay";
144*4882a593Smuzhiyun};
145