xref: /OK3568_Linux_fs/kernel/scripts/dtc/include-prefixes/arm/imx6dl-colibri-eval-v3.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0+ OR MIT
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Copyright 2014-2020 Toradex
4*4882a593Smuzhiyun * Copyright 2012 Freescale Semiconductor, Inc.
5*4882a593Smuzhiyun * Copyright 2011 Linaro Ltd.
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun/dts-v1/;
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun#include <dt-bindings/input/input.h>
11*4882a593Smuzhiyun#include <dt-bindings/interrupt-controller/irq.h>
12*4882a593Smuzhiyun#include "imx6dl.dtsi"
13*4882a593Smuzhiyun#include "imx6qdl-colibri.dtsi"
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun/ {
16*4882a593Smuzhiyun	model = "Toradex Colibri iMX6DL/S on Colibri Evaluation Board V3";
17*4882a593Smuzhiyun	compatible = "toradex,colibri_imx6dl-eval-v3", "toradex,colibri_imx6dl",
18*4882a593Smuzhiyun		     "fsl,imx6dl";
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun	/* Will be filled by the bootloader */
21*4882a593Smuzhiyun	memory@10000000 {
22*4882a593Smuzhiyun		device_type = "memory";
23*4882a593Smuzhiyun		reg = <0x10000000 0>;
24*4882a593Smuzhiyun	};
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun	aliases {
27*4882a593Smuzhiyun		i2c0 = &i2c2;
28*4882a593Smuzhiyun		i2c1 = &i2c3;
29*4882a593Smuzhiyun	};
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun	aliases {
32*4882a593Smuzhiyun		rtc0 = &rtc_i2c;
33*4882a593Smuzhiyun		rtc1 = &snvs_rtc;
34*4882a593Smuzhiyun	};
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun	chosen {
37*4882a593Smuzhiyun		stdout-path = "serial0:115200n8";
38*4882a593Smuzhiyun	};
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun	/* Fixed crystal dedicated to mcp251x */
41*4882a593Smuzhiyun	clk16m: clock-16m {
42*4882a593Smuzhiyun		compatible = "fixed-clock";
43*4882a593Smuzhiyun		#clock-cells = <0>;
44*4882a593Smuzhiyun		clock-frequency = <16000000>;
45*4882a593Smuzhiyun		clock-output-names = "clk16m";
46*4882a593Smuzhiyun	};
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun	gpio-keys {
49*4882a593Smuzhiyun		compatible = "gpio-keys";
50*4882a593Smuzhiyun		pinctrl-names = "default";
51*4882a593Smuzhiyun		pinctrl-0 = <&pinctrl_gpio_keys>;
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun		wakeup {
54*4882a593Smuzhiyun			label = "Wake-Up";
55*4882a593Smuzhiyun			gpios = <&gpio2 22 GPIO_ACTIVE_HIGH>; /* SODIMM 45 */
56*4882a593Smuzhiyun			linux,code = <KEY_WAKEUP>;
57*4882a593Smuzhiyun			debounce-interval = <10>;
58*4882a593Smuzhiyun			wakeup-source;
59*4882a593Smuzhiyun		};
60*4882a593Smuzhiyun	};
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun	lcd_display: disp0 {
63*4882a593Smuzhiyun		compatible = "fsl,imx-parallel-display";
64*4882a593Smuzhiyun		#address-cells = <1>;
65*4882a593Smuzhiyun		#size-cells = <0>;
66*4882a593Smuzhiyun		interface-pix-fmt = "bgr666";
67*4882a593Smuzhiyun		pinctrl-names = "default";
68*4882a593Smuzhiyun		pinctrl-0 = <&pinctrl_ipu1_lcdif>;
69*4882a593Smuzhiyun		status = "okay";
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun		port@0 {
72*4882a593Smuzhiyun			reg = <0>;
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun			lcd_display_in: endpoint {
75*4882a593Smuzhiyun				remote-endpoint = <&ipu1_di0_disp0>;
76*4882a593Smuzhiyun			};
77*4882a593Smuzhiyun		};
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun		port@1 {
80*4882a593Smuzhiyun			reg = <1>;
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun			lcd_display_out: endpoint {
83*4882a593Smuzhiyun				remote-endpoint = <&lcd_panel_in>;
84*4882a593Smuzhiyun			};
85*4882a593Smuzhiyun		};
86*4882a593Smuzhiyun	};
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun	panel: panel {
89*4882a593Smuzhiyun		/*
90*4882a593Smuzhiyun		 * edt,et057090dhu: EDT 5.7" LCD TFT
91*4882a593Smuzhiyun		 * edt,et070080dh6: EDT 7.0" LCD TFT
92*4882a593Smuzhiyun		 */
93*4882a593Smuzhiyun		compatible = "edt,et057090dhu";
94*4882a593Smuzhiyun		backlight = <&backlight>;
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun		port {
97*4882a593Smuzhiyun			lcd_panel_in: endpoint {
98*4882a593Smuzhiyun				remote-endpoint = <&lcd_display_out>;
99*4882a593Smuzhiyun			};
100*4882a593Smuzhiyun		};
101*4882a593Smuzhiyun	};
102*4882a593Smuzhiyun};
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun&backlight {
105*4882a593Smuzhiyun	brightness-levels = <0 127 191 223 239 247 251 255>;
106*4882a593Smuzhiyun	default-brightness-level = <1>;
107*4882a593Smuzhiyun	status = "okay";
108*4882a593Smuzhiyun};
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun/* Colibri SSP */
111*4882a593Smuzhiyun&ecspi4 {
112*4882a593Smuzhiyun	status = "okay";
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun	mcp251x0: mcp251x@0 {
115*4882a593Smuzhiyun		compatible = "microchip,mcp2515";
116*4882a593Smuzhiyun		reg = <0>;
117*4882a593Smuzhiyun		clocks = <&clk16m>;
118*4882a593Smuzhiyun		interrupt-parent = <&gpio3>;
119*4882a593Smuzhiyun		interrupts = <27 0x2>;
120*4882a593Smuzhiyun		spi-max-frequency = <10000000>;
121*4882a593Smuzhiyun		status = "okay";
122*4882a593Smuzhiyun	};
123*4882a593Smuzhiyun};
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun&hdmi {
126*4882a593Smuzhiyun	status = "okay";
127*4882a593Smuzhiyun};
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun/*
130*4882a593Smuzhiyun * Colibri I2C: I2C3_SDA/SCL on SODIMM 194/196 (e.g. RTC on carrier board)
131*4882a593Smuzhiyun */
132*4882a593Smuzhiyun&i2c3 {
133*4882a593Smuzhiyun	status = "okay";
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun	/*
136*4882a593Smuzhiyun	 * Touchscreen is using SODIMM 28/30, also used for PWM<B>, PWM<C>,
137*4882a593Smuzhiyun	 * aka pwm2, pwm3. so if you enable touchscreen, disable the pwms
138*4882a593Smuzhiyun	 */
139*4882a593Smuzhiyun	touchscreen@4a {
140*4882a593Smuzhiyun		compatible = "atmel,maxtouch";
141*4882a593Smuzhiyun		pinctrl-names = "default";
142*4882a593Smuzhiyun		pinctrl-0 = <&pinctrl_pcap_1>;
143*4882a593Smuzhiyun		reg = <0x4a>;
144*4882a593Smuzhiyun		interrupt-parent = <&gpio1>;
145*4882a593Smuzhiyun		interrupts = <9 IRQ_TYPE_EDGE_FALLING>;		/* SODIMM 28 */
146*4882a593Smuzhiyun		reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;	/* SODIMM 30 */
147*4882a593Smuzhiyun		status = "disabled";
148*4882a593Smuzhiyun	};
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun	/* M41T0M6 real time clock on carrier board */
151*4882a593Smuzhiyun	rtc_i2c: rtc@68 {
152*4882a593Smuzhiyun		compatible = "st,m41t0";
153*4882a593Smuzhiyun		reg = <0x68>;
154*4882a593Smuzhiyun	};
155*4882a593Smuzhiyun};
156*4882a593Smuzhiyun
157*4882a593Smuzhiyun&iomuxc {
158*4882a593Smuzhiyun	pinctrl-names = "default";
159*4882a593Smuzhiyun	pinctrl-0 = <
160*4882a593Smuzhiyun		&pinctrl_weim_gpio_1 &pinctrl_weim_gpio_2
161*4882a593Smuzhiyun		&pinctrl_weim_gpio_3 &pinctrl_weim_gpio_4
162*4882a593Smuzhiyun		&pinctrl_weim_gpio_5 &pinctrl_weim_gpio_6
163*4882a593Smuzhiyun		&pinctrl_usbh_oc_1 &pinctrl_usbc_id_1
164*4882a593Smuzhiyun	>;
165*4882a593Smuzhiyun
166*4882a593Smuzhiyun	pinctrl_pcap_1: pcap1grp {
167*4882a593Smuzhiyun		fsl,pins = <
168*4882a593Smuzhiyun			MX6QDL_PAD_GPIO_9__GPIO1_IO09	0x1b0b0 /* SODIMM 28 */
169*4882a593Smuzhiyun			MX6QDL_PAD_SD4_DAT2__GPIO2_IO10	0x1b0b0 /* SODIMM 30 */
170*4882a593Smuzhiyun		>;
171*4882a593Smuzhiyun	};
172*4882a593Smuzhiyun
173*4882a593Smuzhiyun	pinctrl_mxt_ts: mxttsgrp {
174*4882a593Smuzhiyun		fsl,pins = <
175*4882a593Smuzhiyun			MX6QDL_PAD_EIM_CS1__GPIO2_IO24	0x130b0 /* SODIMM 107 */
176*4882a593Smuzhiyun			MX6QDL_PAD_SD2_DAT1__GPIO1_IO14	0x130b0 /* SODIMM 106 */
177*4882a593Smuzhiyun		>;
178*4882a593Smuzhiyun	};
179*4882a593Smuzhiyun};
180*4882a593Smuzhiyun
181*4882a593Smuzhiyun&ipu1_di0_disp0 {
182*4882a593Smuzhiyun	remote-endpoint = <&lcd_display_in>;
183*4882a593Smuzhiyun};
184*4882a593Smuzhiyun
185*4882a593Smuzhiyun&pwm1 {
186*4882a593Smuzhiyun	status = "okay";
187*4882a593Smuzhiyun};
188*4882a593Smuzhiyun
189*4882a593Smuzhiyun&pwm2 {
190*4882a593Smuzhiyun	status = "okay";
191*4882a593Smuzhiyun};
192*4882a593Smuzhiyun
193*4882a593Smuzhiyun&pwm3 {
194*4882a593Smuzhiyun	status = "okay";
195*4882a593Smuzhiyun};
196*4882a593Smuzhiyun
197*4882a593Smuzhiyun&pwm4 {
198*4882a593Smuzhiyun	status = "okay";
199*4882a593Smuzhiyun};
200*4882a593Smuzhiyun
201*4882a593Smuzhiyun&reg_usb_host_vbus {
202*4882a593Smuzhiyun	status = "okay";
203*4882a593Smuzhiyun};
204*4882a593Smuzhiyun
205*4882a593Smuzhiyun&uart1 {
206*4882a593Smuzhiyun	status = "okay";
207*4882a593Smuzhiyun};
208*4882a593Smuzhiyun
209*4882a593Smuzhiyun&uart2 {
210*4882a593Smuzhiyun	status = "okay";
211*4882a593Smuzhiyun};
212*4882a593Smuzhiyun
213*4882a593Smuzhiyun&uart3 {
214*4882a593Smuzhiyun	status = "okay";
215*4882a593Smuzhiyun};
216*4882a593Smuzhiyun
217*4882a593Smuzhiyun&usbh1 {
218*4882a593Smuzhiyun	vbus-supply = <&reg_usb_host_vbus>;
219*4882a593Smuzhiyun	status = "okay";
220*4882a593Smuzhiyun};
221*4882a593Smuzhiyun
222*4882a593Smuzhiyun&usbotg {
223*4882a593Smuzhiyun	status = "okay";
224*4882a593Smuzhiyun};
225*4882a593Smuzhiyun
226*4882a593Smuzhiyun/* Colibri MMC */
227*4882a593Smuzhiyun&usdhc1 {
228*4882a593Smuzhiyun	status = "okay";
229*4882a593Smuzhiyun};
230*4882a593Smuzhiyun
231*4882a593Smuzhiyun&weim {
232*4882a593Smuzhiyun	status = "okay";
233*4882a593Smuzhiyun
234*4882a593Smuzhiyun	/* weim memory map: 32MB on CS0, CS1, CS2 and CS3 */
235*4882a593Smuzhiyun	ranges = <0 0 0x08000000 0x02000000
236*4882a593Smuzhiyun		  1 0 0x0a000000 0x02000000
237*4882a593Smuzhiyun		  2 0 0x0c000000 0x02000000
238*4882a593Smuzhiyun		  3 0 0x0e000000 0x02000000>;
239*4882a593Smuzhiyun
240*4882a593Smuzhiyun	/* SRAM on Colibri nEXT_CS0 */
241*4882a593Smuzhiyun	sram@0,0 {
242*4882a593Smuzhiyun		compatible = "cypress,cy7c1019dv33-10zsxi", "mtd-ram";
243*4882a593Smuzhiyun		reg = <0 0 0x00010000>;
244*4882a593Smuzhiyun		#address-cells = <1>;
245*4882a593Smuzhiyun		#size-cells = <1>;
246*4882a593Smuzhiyun		bank-width = <2>;
247*4882a593Smuzhiyun		fsl,weim-cs-timing = <0x00010081 0x00000000 0x04000000
248*4882a593Smuzhiyun				      0x00000000 0x04000040 0x00000000>;
249*4882a593Smuzhiyun	};
250*4882a593Smuzhiyun
251*4882a593Smuzhiyun	/* SRAM on Colibri nEXT_CS1 */
252*4882a593Smuzhiyun	sram@1,0 {
253*4882a593Smuzhiyun		compatible = "cypress,cy7c1019dv33-10zsxi", "mtd-ram";
254*4882a593Smuzhiyun		reg = <1 0 0x00010000>;
255*4882a593Smuzhiyun		#address-cells = <1>;
256*4882a593Smuzhiyun		#size-cells = <1>;
257*4882a593Smuzhiyun		bank-width = <2>;
258*4882a593Smuzhiyun		fsl,weim-cs-timing = <0x00010081 0x00000000 0x04000000
259*4882a593Smuzhiyun				      0x00000000 0x04000040 0x00000000>;
260*4882a593Smuzhiyun	};
261*4882a593Smuzhiyun};
262