1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Copyright 2013 Eukréa Electromatique <denis@eukrea.com>
4*4882a593Smuzhiyun */
5*4882a593Smuzhiyun
6*4882a593Smuzhiyun#include "imx25-eukrea-mbimxsd25-baseboard.dts"
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun/ {
9*4882a593Smuzhiyun	model = "Eukrea MBIMXSD25 with the CMO-QVGA Display";
10*4882a593Smuzhiyun	compatible = "eukrea,mbimxsd25-baseboard-cmo-qvga", "eukrea,mbimxsd25-baseboard", "eukrea,cpuimx25", "fsl,imx25";
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun	cmo_qvga: display {
13*4882a593Smuzhiyun		model = "CMO-QVGA";
14*4882a593Smuzhiyun		bits-per-pixel = <16>;
15*4882a593Smuzhiyun		fsl,pcr = <0xcad08b80>;
16*4882a593Smuzhiyun		bus-width = <18>;
17*4882a593Smuzhiyun		display-timings {
18*4882a593Smuzhiyun			native-mode = <&qvga_timings>;
19*4882a593Smuzhiyun			qvga_timings: 320x240 {
20*4882a593Smuzhiyun				clock-frequency = <6500000>;
21*4882a593Smuzhiyun				hactive = <320>;
22*4882a593Smuzhiyun				vactive = <240>;
23*4882a593Smuzhiyun				hback-porch = <30>;
24*4882a593Smuzhiyun				hfront-porch = <38>;
25*4882a593Smuzhiyun				vback-porch = <20>;
26*4882a593Smuzhiyun				vfront-porch = <3>;
27*4882a593Smuzhiyun				hsync-len = <15>;
28*4882a593Smuzhiyun				vsync-len = <4>;
29*4882a593Smuzhiyun			};
30*4882a593Smuzhiyun		};
31*4882a593Smuzhiyun	};
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun	regulators {
34*4882a593Smuzhiyun		compatible = "simple-bus";
35*4882a593Smuzhiyun		#address-cells = <1>;
36*4882a593Smuzhiyun		#size-cells = <0>;
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun		reg_lcd_3v3: regulator@0 {
39*4882a593Smuzhiyun			compatible = "regulator-fixed";
40*4882a593Smuzhiyun			reg = <0>;
41*4882a593Smuzhiyun			pinctrl-names = "default";
42*4882a593Smuzhiyun			pinctrl-0 = <&pinctrl_reg_lcd_3v3>;
43*4882a593Smuzhiyun			regulator-name = "lcd-3v3";
44*4882a593Smuzhiyun			regulator-min-microvolt = <3300000>;
45*4882a593Smuzhiyun			regulator-max-microvolt = <3300000>;
46*4882a593Smuzhiyun			gpio = <&gpio1 26 GPIO_ACTIVE_HIGH>;
47*4882a593Smuzhiyun			enable-active-high;
48*4882a593Smuzhiyun		};
49*4882a593Smuzhiyun	};
50*4882a593Smuzhiyun};
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun&iomuxc {
53*4882a593Smuzhiyun	imx25-eukrea-mbimxsd25-baseboard-cmo-qvga {
54*4882a593Smuzhiyun		pinctrl_reg_lcd_3v3: reg_lcd_3v3 {
55*4882a593Smuzhiyun			fsl,pins = <MX25_PAD_PWM__GPIO_1_26 0x80000000>;
56*4882a593Smuzhiyun		};
57*4882a593Smuzhiyun	};
58*4882a593Smuzhiyun};
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun&lcdc {
61*4882a593Smuzhiyun	display = <&cmo_qvga>;
62*4882a593Smuzhiyun	fsl,lpccr = <0x00a903ff>;
63*4882a593Smuzhiyun	lcd-supply = <&reg_lcd_3v3>;
64*4882a593Smuzhiyun	status = "okay";
65*4882a593Smuzhiyun};
66