1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Hardkernel Odroid XU3-Lite board device tree source 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (c) 2015 Krzysztof Kozlowski 6*4882a593Smuzhiyun * Copyright (c) 2014 Collabora Ltd. 7*4882a593Smuzhiyun * Copyright (c) 2013 Samsung Electronics Co., Ltd. 8*4882a593Smuzhiyun * http://www.samsung.com 9*4882a593Smuzhiyun */ 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun/dts-v1/; 12*4882a593Smuzhiyun#include "exynos5422-odroidxu3-common.dtsi" 13*4882a593Smuzhiyun#include "exynos5422-odroidxu3-audio.dtsi" 14*4882a593Smuzhiyun#include "exynos54xx-odroidxu-leds.dtsi" 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun/ { 17*4882a593Smuzhiyun model = "Hardkernel Odroid XU3 Lite"; 18*4882a593Smuzhiyun compatible = "hardkernel,odroid-xu3-lite", "samsung,exynos5800", "samsung,exynos5"; 19*4882a593Smuzhiyun}; 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun&arm_a7_pmu { 22*4882a593Smuzhiyun status = "disabled"; 23*4882a593Smuzhiyun}; 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun&arm_a15_pmu { 26*4882a593Smuzhiyun status = "disabled"; 27*4882a593Smuzhiyun}; 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun&chipid { 30*4882a593Smuzhiyun samsung,asv-bin = <2>; 31*4882a593Smuzhiyun}; 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun/* 34*4882a593Smuzhiyun * Odroid XU3-Lite board uses SoC revision with lower maximum frequencies 35*4882a593Smuzhiyun * than Odroid XU3/XU4 boards: 1.8 GHz for A15 cores & 1.3 GHz for A7 cores. 36*4882a593Smuzhiyun * Therefore we need to update OPPs tables and thermal maps accordingly. 37*4882a593Smuzhiyun */ 38*4882a593Smuzhiyun&cluster_a15_opp_table { 39*4882a593Smuzhiyun /delete-node/opp-2000000000; 40*4882a593Smuzhiyun /delete-node/opp-1900000000; 41*4882a593Smuzhiyun}; 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun&cluster_a7_opp_table { 44*4882a593Smuzhiyun /delete-node/opp-1400000000; 45*4882a593Smuzhiyun}; 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun&cpu0_cooling_map4 { 48*4882a593Smuzhiyun cooling-device = <&cpu0 3 7>, 49*4882a593Smuzhiyun <&cpu1 3 7>, 50*4882a593Smuzhiyun <&cpu2 3 7>, 51*4882a593Smuzhiyun <&cpu3 3 7>, 52*4882a593Smuzhiyun <&cpu4 3 12>, 53*4882a593Smuzhiyun <&cpu5 3 12>, 54*4882a593Smuzhiyun <&cpu6 3 12>, 55*4882a593Smuzhiyun <&cpu7 3 12>; 56*4882a593Smuzhiyun}; 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun&cpu1_cooling_map4 { 59*4882a593Smuzhiyun cooling-device = <&cpu0 3 7>, 60*4882a593Smuzhiyun <&cpu1 3 7>, 61*4882a593Smuzhiyun <&cpu2 3 7>, 62*4882a593Smuzhiyun <&cpu3 3 7>, 63*4882a593Smuzhiyun <&cpu4 3 12>, 64*4882a593Smuzhiyun <&cpu5 3 12>, 65*4882a593Smuzhiyun <&cpu6 3 12>, 66*4882a593Smuzhiyun <&cpu7 3 12>; 67*4882a593Smuzhiyun}; 68*4882a593Smuzhiyun 69*4882a593Smuzhiyun&cpu2_cooling_map4 { 70*4882a593Smuzhiyun cooling-device = <&cpu0 3 7>, 71*4882a593Smuzhiyun <&cpu1 3 7>, 72*4882a593Smuzhiyun <&cpu2 3 7>, 73*4882a593Smuzhiyun <&cpu3 3 7>, 74*4882a593Smuzhiyun <&cpu4 3 12>, 75*4882a593Smuzhiyun <&cpu5 3 12>, 76*4882a593Smuzhiyun <&cpu6 3 12>, 77*4882a593Smuzhiyun <&cpu7 3 12>; 78*4882a593Smuzhiyun}; 79*4882a593Smuzhiyun 80*4882a593Smuzhiyun&cpu3_cooling_map4 { 81*4882a593Smuzhiyun cooling-device = <&cpu0 3 7>, 82*4882a593Smuzhiyun <&cpu1 3 7>, 83*4882a593Smuzhiyun <&cpu2 3 7>, 84*4882a593Smuzhiyun <&cpu3 3 7>, 85*4882a593Smuzhiyun <&cpu4 3 12>, 86*4882a593Smuzhiyun <&cpu5 3 12>, 87*4882a593Smuzhiyun <&cpu6 3 12>, 88*4882a593Smuzhiyun <&cpu7 3 12>; 89*4882a593Smuzhiyun}; 90*4882a593Smuzhiyun 91*4882a593Smuzhiyun&pwm { 92*4882a593Smuzhiyun /* 93*4882a593Smuzhiyun * PWM 0 -- fan 94*4882a593Smuzhiyun * PWM 1 -- Green LED 95*4882a593Smuzhiyun * PWM 2 -- Blue LED 96*4882a593Smuzhiyun * PWM 3 -- on MIPI connector for backlight 97*4882a593Smuzhiyun */ 98*4882a593Smuzhiyun pinctrl-0 = <&pwm0_out &pwm1_out &pwm2_out &pwm3_out>; 99*4882a593Smuzhiyun pinctrl-names = "default"; 100*4882a593Smuzhiyun status = "okay"; 101*4882a593Smuzhiyun}; 102*4882a593Smuzhiyun 103*4882a593Smuzhiyun&usbdrd_dwc3_1 { 104*4882a593Smuzhiyun dr_mode = "peripheral"; 105*4882a593Smuzhiyun}; 106