1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Hardkernel Odroid XU board device tree source 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (c) 2013 Samsung Electronics Co., Ltd. 6*4882a593Smuzhiyun * http://www.samsung.com 7*4882a593Smuzhiyun * Copyright (c) 2016 Krzysztof Kozlowski 8*4882a593Smuzhiyun */ 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun/dts-v1/; 11*4882a593Smuzhiyun#include "exynos5410.dtsi" 12*4882a593Smuzhiyun#include <dt-bindings/clock/maxim,max77802.h> 13*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h> 14*4882a593Smuzhiyun#include <dt-bindings/interrupt-controller/irq.h> 15*4882a593Smuzhiyun#include <dt-bindings/sound/samsung-i2s.h> 16*4882a593Smuzhiyun#include "exynos54xx-odroidxu-leds.dtsi" 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun/ { 19*4882a593Smuzhiyun model = "Hardkernel Odroid XU"; 20*4882a593Smuzhiyun compatible = "hardkernel,odroid-xu", "samsung,exynos5410", "samsung,exynos5"; 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun memory@40000000 { 23*4882a593Smuzhiyun device_type = "memory"; 24*4882a593Smuzhiyun reg = <0x40000000 0x7ea00000>; 25*4882a593Smuzhiyun }; 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun chosen { 28*4882a593Smuzhiyun stdout-path = "serial2:115200n8"; 29*4882a593Smuzhiyun }; 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun emmc_pwrseq: pwrseq { 32*4882a593Smuzhiyun pinctrl-0 = <&emmc_nrst_pin>; 33*4882a593Smuzhiyun pinctrl-names = "default"; 34*4882a593Smuzhiyun compatible = "mmc-pwrseq-emmc"; 35*4882a593Smuzhiyun reset-gpios = <&gpd1 0 GPIO_ACTIVE_LOW>; 36*4882a593Smuzhiyun }; 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun fan0: pwm-fan { 39*4882a593Smuzhiyun compatible = "pwm-fan"; 40*4882a593Smuzhiyun pwms = <&pwm 0 20972 0>; 41*4882a593Smuzhiyun #cooling-cells = <2>; 42*4882a593Smuzhiyun cooling-levels = <0 130 170 230>; 43*4882a593Smuzhiyun }; 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun fin_pll: xxti { 46*4882a593Smuzhiyun compatible = "fixed-clock"; 47*4882a593Smuzhiyun clock-frequency = <24000000>; 48*4882a593Smuzhiyun clock-output-names = "fin_pll"; 49*4882a593Smuzhiyun #clock-cells = <0>; 50*4882a593Smuzhiyun }; 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun firmware@2073000 { 53*4882a593Smuzhiyun compatible = "samsung,secure-firmware"; 54*4882a593Smuzhiyun reg = <0x02073000 0x1000>; 55*4882a593Smuzhiyun }; 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun sound: sound { 58*4882a593Smuzhiyun compatible = "simple-audio-card"; 59*4882a593Smuzhiyun 60*4882a593Smuzhiyun simple-audio-card,name = "Odroid-XU"; 61*4882a593Smuzhiyun simple-audio-card,widgets = 62*4882a593Smuzhiyun "Headphone", "Headphone Jack", 63*4882a593Smuzhiyun "Speakers", "Speakers"; 64*4882a593Smuzhiyun simple-audio-card,routing = 65*4882a593Smuzhiyun "Headphone Jack", "HPL", 66*4882a593Smuzhiyun "Headphone Jack", "HPR", 67*4882a593Smuzhiyun "Headphone Jack", "MICBIAS", 68*4882a593Smuzhiyun "IN1", "Headphone Jack", 69*4882a593Smuzhiyun "Speakers", "SPKL", 70*4882a593Smuzhiyun "Speakers", "SPKR"; 71*4882a593Smuzhiyun 72*4882a593Smuzhiyun simple-audio-card,format = "i2s"; 73*4882a593Smuzhiyun simple-audio-card,bitclock-master = <&link0_codec>; 74*4882a593Smuzhiyun simple-audio-card,frame-master = <&link0_codec>; 75*4882a593Smuzhiyun 76*4882a593Smuzhiyun simple-audio-card,cpu { 77*4882a593Smuzhiyun sound-dai = <&audi2s0 0>; 78*4882a593Smuzhiyun system-clock-frequency = <19200000>; 79*4882a593Smuzhiyun }; 80*4882a593Smuzhiyun 81*4882a593Smuzhiyun link0_codec: simple-audio-card,codec { 82*4882a593Smuzhiyun sound-dai = <&max98090>; 83*4882a593Smuzhiyun clocks = <&audi2s0 CLK_I2S_CDCLK>; 84*4882a593Smuzhiyun }; 85*4882a593Smuzhiyun }; 86*4882a593Smuzhiyun}; 87*4882a593Smuzhiyun 88*4882a593Smuzhiyun&adc { 89*4882a593Smuzhiyun vdd-supply = <&ldo10_reg>; 90*4882a593Smuzhiyun status = "okay"; 91*4882a593Smuzhiyun}; 92*4882a593Smuzhiyun 93*4882a593Smuzhiyun&audi2s0 { 94*4882a593Smuzhiyun status = "okay"; 95*4882a593Smuzhiyun}; 96*4882a593Smuzhiyun 97*4882a593Smuzhiyun&clock { 98*4882a593Smuzhiyun clocks = <&fin_pll>; 99*4882a593Smuzhiyun assigned-clocks = <&clock CLK_FOUT_EPLL>; 100*4882a593Smuzhiyun assigned-clock-rates = <192000000>; 101*4882a593Smuzhiyun}; 102*4882a593Smuzhiyun 103*4882a593Smuzhiyun&clock_audss { 104*4882a593Smuzhiyun assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>, 105*4882a593Smuzhiyun <&clock_audss EXYNOS_MOUT_I2S>, 106*4882a593Smuzhiyun <&clock_audss EXYNOS_DOUT_SRP>, 107*4882a593Smuzhiyun <&clock_audss EXYNOS_DOUT_AUD_BUS>; 108*4882a593Smuzhiyun 109*4882a593Smuzhiyun assigned-clock-parents = <&clock CLK_FOUT_EPLL>, 110*4882a593Smuzhiyun <&clock_audss EXYNOS_MOUT_AUDSS>; 111*4882a593Smuzhiyun 112*4882a593Smuzhiyun assigned-clock-rates = <0>, 113*4882a593Smuzhiyun <0>, 114*4882a593Smuzhiyun <96000000>, 115*4882a593Smuzhiyun <19200000>; 116*4882a593Smuzhiyun}; 117*4882a593Smuzhiyun 118*4882a593Smuzhiyun&cpu0_thermal { 119*4882a593Smuzhiyun thermal-sensors = <&tmu_cpu0 0>; 120*4882a593Smuzhiyun polling-delay-passive = <0>; 121*4882a593Smuzhiyun polling-delay = <0>; 122*4882a593Smuzhiyun 123*4882a593Smuzhiyun trips { 124*4882a593Smuzhiyun cpu_alert0: cpu-alert-0 { 125*4882a593Smuzhiyun temperature = <50000>; /* millicelsius */ 126*4882a593Smuzhiyun hysteresis = <5000>; /* millicelsius */ 127*4882a593Smuzhiyun type = "active"; 128*4882a593Smuzhiyun }; 129*4882a593Smuzhiyun cpu_alert1: cpu-alert-1 { 130*4882a593Smuzhiyun temperature = <60000>; /* millicelsius */ 131*4882a593Smuzhiyun hysteresis = <5000>; /* millicelsius */ 132*4882a593Smuzhiyun type = "active"; 133*4882a593Smuzhiyun }; 134*4882a593Smuzhiyun cpu_alert2: cpu-alert-2 { 135*4882a593Smuzhiyun temperature = <70000>; /* millicelsius */ 136*4882a593Smuzhiyun hysteresis = <5000>; /* millicelsius */ 137*4882a593Smuzhiyun type = "active"; 138*4882a593Smuzhiyun }; 139*4882a593Smuzhiyun cpu_crit0: cpu-crit-0 { 140*4882a593Smuzhiyun temperature = <120000>; /* millicelsius */ 141*4882a593Smuzhiyun hysteresis = <0>; /* millicelsius */ 142*4882a593Smuzhiyun type = "critical"; 143*4882a593Smuzhiyun }; 144*4882a593Smuzhiyun }; 145*4882a593Smuzhiyun 146*4882a593Smuzhiyun cooling-maps { 147*4882a593Smuzhiyun map0 { 148*4882a593Smuzhiyun trip = <&cpu_alert0>; 149*4882a593Smuzhiyun cooling-device = <&fan0 0 1>; 150*4882a593Smuzhiyun }; 151*4882a593Smuzhiyun map1 { 152*4882a593Smuzhiyun trip = <&cpu_alert1>; 153*4882a593Smuzhiyun cooling-device = <&fan0 1 2>; 154*4882a593Smuzhiyun }; 155*4882a593Smuzhiyun map2 { 156*4882a593Smuzhiyun trip = <&cpu_alert2>; 157*4882a593Smuzhiyun cooling-device = <&fan0 2 3>; 158*4882a593Smuzhiyun }; 159*4882a593Smuzhiyun }; 160*4882a593Smuzhiyun}; 161*4882a593Smuzhiyun 162*4882a593Smuzhiyun&hsi2c_4 { 163*4882a593Smuzhiyun samsung,i2c-sda-delay = <100>; 164*4882a593Smuzhiyun samsung,i2c-max-bus-freq = <400000>; 165*4882a593Smuzhiyun status = "okay"; 166*4882a593Smuzhiyun 167*4882a593Smuzhiyun usb3503: usb-hub@8 { 168*4882a593Smuzhiyun compatible = "smsc,usb3503"; 169*4882a593Smuzhiyun reg = <0x08>; 170*4882a593Smuzhiyun 171*4882a593Smuzhiyun intn-gpios = <&gpx0 7 GPIO_ACTIVE_HIGH>; 172*4882a593Smuzhiyun connect-gpios = <&gpx0 6 GPIO_ACTIVE_HIGH>; 173*4882a593Smuzhiyun reset-gpios = <&gpx1 4 GPIO_ACTIVE_LOW>; 174*4882a593Smuzhiyun initial-mode = <1>; 175*4882a593Smuzhiyun 176*4882a593Smuzhiyun clock-names = "refclk"; 177*4882a593Smuzhiyun clocks = <&pmu_system_controller 0>; 178*4882a593Smuzhiyun refclk-frequency = <24000000>; 179*4882a593Smuzhiyun }; 180*4882a593Smuzhiyun 181*4882a593Smuzhiyun max77802: pmic@9 { 182*4882a593Smuzhiyun compatible = "maxim,max77802"; 183*4882a593Smuzhiyun reg = <0x9>; 184*4882a593Smuzhiyun interrupt-parent = <&gpx0>; 185*4882a593Smuzhiyun interrupts = <4 IRQ_TYPE_NONE>; 186*4882a593Smuzhiyun pinctrl-names = "default"; 187*4882a593Smuzhiyun pinctrl-0 = <&max77802_irq>, <&pmic_dvs_1>, <&pmic_dvs_2>, 188*4882a593Smuzhiyun <&pmic_dvs_3>; 189*4882a593Smuzhiyun #clock-cells = <1>; 190*4882a593Smuzhiyun 191*4882a593Smuzhiyun inl1-supply = <&buck5_reg>; 192*4882a593Smuzhiyun inl2-supply = <&buck7_reg>; 193*4882a593Smuzhiyun inl3-supply = <&buck9_reg>; 194*4882a593Smuzhiyun inl4-supply = <&buck9_reg>; 195*4882a593Smuzhiyun inl5-supply = <&buck9_reg>; 196*4882a593Smuzhiyun inl6-supply = <&buck10_reg>; 197*4882a593Smuzhiyun inl7-supply = <&buck9_reg>; 198*4882a593Smuzhiyun /* inl9 supply is BOOST, not configured here */ 199*4882a593Smuzhiyun inl10-supply = <&buck7_reg>; 200*4882a593Smuzhiyun 201*4882a593Smuzhiyun regulators { 202*4882a593Smuzhiyun buck1_reg: BUCK1 { 203*4882a593Smuzhiyun regulator-name = "vdd_mif"; 204*4882a593Smuzhiyun regulator-min-microvolt = <800000>; 205*4882a593Smuzhiyun regulator-max-microvolt = <1300000>; 206*4882a593Smuzhiyun regulator-always-on; 207*4882a593Smuzhiyun regulator-boot-on; 208*4882a593Smuzhiyun }; 209*4882a593Smuzhiyun 210*4882a593Smuzhiyun buck2_reg: BUCK2 { 211*4882a593Smuzhiyun regulator-name = "vdd_arm"; 212*4882a593Smuzhiyun regulator-min-microvolt = <800000>; 213*4882a593Smuzhiyun regulator-max-microvolt = <1500000>; 214*4882a593Smuzhiyun regulator-always-on; 215*4882a593Smuzhiyun regulator-boot-on; 216*4882a593Smuzhiyun }; 217*4882a593Smuzhiyun 218*4882a593Smuzhiyun buck3_reg: BUCK3 { 219*4882a593Smuzhiyun regulator-name = "vdd_int"; 220*4882a593Smuzhiyun regulator-min-microvolt = <800000>; 221*4882a593Smuzhiyun regulator-max-microvolt = <1400000>; 222*4882a593Smuzhiyun regulator-always-on; 223*4882a593Smuzhiyun regulator-boot-on; 224*4882a593Smuzhiyun }; 225*4882a593Smuzhiyun 226*4882a593Smuzhiyun buck4_reg: BUCK4 { 227*4882a593Smuzhiyun regulator-name = "vdd_g3d"; 228*4882a593Smuzhiyun regulator-min-microvolt = <800000>; 229*4882a593Smuzhiyun regulator-max-microvolt = <1400000>; 230*4882a593Smuzhiyun regulator-always-on; 231*4882a593Smuzhiyun regulator-boot-on; 232*4882a593Smuzhiyun }; 233*4882a593Smuzhiyun 234*4882a593Smuzhiyun buck5_reg: BUCK5 { 235*4882a593Smuzhiyun regulator-name = "vdd_mem"; 236*4882a593Smuzhiyun regulator-min-microvolt = <800000>; 237*4882a593Smuzhiyun regulator-max-microvolt = <1500000>; 238*4882a593Smuzhiyun regulator-always-on; 239*4882a593Smuzhiyun regulator-boot-on; 240*4882a593Smuzhiyun }; 241*4882a593Smuzhiyun 242*4882a593Smuzhiyun buck6_reg: BUCK6 { 243*4882a593Smuzhiyun regulator-name = "vdd_kfc"; 244*4882a593Smuzhiyun regulator-min-microvolt = <800000>; 245*4882a593Smuzhiyun regulator-max-microvolt = <1500000>; 246*4882a593Smuzhiyun regulator-always-on; 247*4882a593Smuzhiyun regulator-boot-on; 248*4882a593Smuzhiyun }; 249*4882a593Smuzhiyun 250*4882a593Smuzhiyun buck7_reg: BUCK7 { 251*4882a593Smuzhiyun regulator-name = "buck7"; 252*4882a593Smuzhiyun regulator-min-microvolt = <1300000>; 253*4882a593Smuzhiyun regulator-max-microvolt = <1300000>; 254*4882a593Smuzhiyun regulator-always-on; 255*4882a593Smuzhiyun regulator-boot-on; 256*4882a593Smuzhiyun }; 257*4882a593Smuzhiyun 258*4882a593Smuzhiyun buck8_reg: BUCK8 { 259*4882a593Smuzhiyun /* vdd_mmc0 */ 260*4882a593Smuzhiyun regulator-name = "vddf_2v85"; 261*4882a593Smuzhiyun regulator-min-microvolt = <2850000>; 262*4882a593Smuzhiyun regulator-max-microvolt = <2850000>; 263*4882a593Smuzhiyun regulator-always-on; 264*4882a593Smuzhiyun regulator-boot-on; 265*4882a593Smuzhiyun }; 266*4882a593Smuzhiyun 267*4882a593Smuzhiyun buck9_reg: BUCK9 { 268*4882a593Smuzhiyun regulator-name = "buck9"; 269*4882a593Smuzhiyun regulator-min-microvolt = <3000000>; 270*4882a593Smuzhiyun regulator-max-microvolt = <3000000>; 271*4882a593Smuzhiyun regulator-always-on; 272*4882a593Smuzhiyun regulator-boot-on; 273*4882a593Smuzhiyun }; 274*4882a593Smuzhiyun 275*4882a593Smuzhiyun buck10_reg: BUCK10 { 276*4882a593Smuzhiyun regulator-name = "buck10"; 277*4882a593Smuzhiyun regulator-min-microvolt = <2950000>; 278*4882a593Smuzhiyun regulator-max-microvolt = <2950000>; 279*4882a593Smuzhiyun regulator-always-on; 280*4882a593Smuzhiyun regulator-boot-on; 281*4882a593Smuzhiyun }; 282*4882a593Smuzhiyun 283*4882a593Smuzhiyun ldo1_reg: LDO1 { 284*4882a593Smuzhiyun regulator-name = "vdd_alive"; 285*4882a593Smuzhiyun regulator-min-microvolt = <1000000>; 286*4882a593Smuzhiyun regulator-max-microvolt = <1000000>; 287*4882a593Smuzhiyun regulator-always-on; 288*4882a593Smuzhiyun }; 289*4882a593Smuzhiyun 290*4882a593Smuzhiyun ldo2_reg: LDO2 { 291*4882a593Smuzhiyun regulator-name = "vddq_m1_m2"; 292*4882a593Smuzhiyun regulator-min-microvolt = <1200000>; 293*4882a593Smuzhiyun regulator-max-microvolt = <1200000>; 294*4882a593Smuzhiyun regulator-always-on; 295*4882a593Smuzhiyun }; 296*4882a593Smuzhiyun 297*4882a593Smuzhiyun ldo3_reg: LDO3 { 298*4882a593Smuzhiyun regulator-name = "vddq_gpio"; 299*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 300*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 301*4882a593Smuzhiyun regulator-always-on; 302*4882a593Smuzhiyun }; 303*4882a593Smuzhiyun 304*4882a593Smuzhiyun ldo4_reg: LDO4 { 305*4882a593Smuzhiyun regulator-name = "vddq_mmc2"; 306*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 307*4882a593Smuzhiyun regulator-max-microvolt = <3000000>; 308*4882a593Smuzhiyun /* Having it off prevents reboot */ 309*4882a593Smuzhiyun regulator-always-on; 310*4882a593Smuzhiyun }; 311*4882a593Smuzhiyun 312*4882a593Smuzhiyun ldo5_reg: LDO5 { 313*4882a593Smuzhiyun regulator-name = "vdd18_hsic"; 314*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 315*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 316*4882a593Smuzhiyun regulator-always-on; 317*4882a593Smuzhiyun }; 318*4882a593Smuzhiyun 319*4882a593Smuzhiyun ldo6_reg: LDO6 { 320*4882a593Smuzhiyun regulator-name = "vdd18_bpll"; 321*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 322*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 323*4882a593Smuzhiyun regulator-always-on; 324*4882a593Smuzhiyun }; 325*4882a593Smuzhiyun 326*4882a593Smuzhiyun ldo7_reg: LDO7 { 327*4882a593Smuzhiyun regulator-name = "vddq_lcd"; 328*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 329*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 330*4882a593Smuzhiyun /* Supplies also GPK and GPJ */ 331*4882a593Smuzhiyun regulator-always-on; 332*4882a593Smuzhiyun }; 333*4882a593Smuzhiyun 334*4882a593Smuzhiyun ldo8_reg: LDO8 { 335*4882a593Smuzhiyun regulator-name = "vdd10_hdmi"; 336*4882a593Smuzhiyun regulator-min-microvolt = <1000000>; 337*4882a593Smuzhiyun regulator-max-microvolt = <1000000>; 338*4882a593Smuzhiyun regulator-always-on; 339*4882a593Smuzhiyun }; 340*4882a593Smuzhiyun 341*4882a593Smuzhiyun ldo9_reg: LDO9 { 342*4882a593Smuzhiyun regulator-name = "ldo9"; 343*4882a593Smuzhiyun }; 344*4882a593Smuzhiyun 345*4882a593Smuzhiyun ldo10_reg: LDO10 { 346*4882a593Smuzhiyun regulator-name = "vdd18_mipi"; 347*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 348*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 349*4882a593Smuzhiyun regulator-always-on; 350*4882a593Smuzhiyun }; 351*4882a593Smuzhiyun 352*4882a593Smuzhiyun ldo11_reg: LDO11 { 353*4882a593Smuzhiyun regulator-name = "vddq_mmc01"; 354*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 355*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 356*4882a593Smuzhiyun /* 357*4882a593Smuzhiyun * Having it off prevents accessing MMC after 358*4882a593Smuzhiyun * reboot with error: 359*4882a593Smuzhiyun * MMC Device 1: Clock OFF has been failed. 360*4882a593Smuzhiyun */ 361*4882a593Smuzhiyun regulator-always-on; 362*4882a593Smuzhiyun }; 363*4882a593Smuzhiyun 364*4882a593Smuzhiyun ldo12_reg: LDO12 { 365*4882a593Smuzhiyun regulator-name = "vdd33_usb3"; 366*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 367*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 368*4882a593Smuzhiyun regulator-always-on; 369*4882a593Smuzhiyun }; 370*4882a593Smuzhiyun 371*4882a593Smuzhiyun ldo13_reg: LDO13 { 372*4882a593Smuzhiyun regulator-name = "vddq_abbg0"; 373*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 374*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 375*4882a593Smuzhiyun regulator-always-on; 376*4882a593Smuzhiyun }; 377*4882a593Smuzhiyun 378*4882a593Smuzhiyun ldo14_reg: LDO14 { 379*4882a593Smuzhiyun regulator-name = "vddq_abbg1"; 380*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 381*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 382*4882a593Smuzhiyun regulator-always-on; 383*4882a593Smuzhiyun }; 384*4882a593Smuzhiyun 385*4882a593Smuzhiyun ldo15_reg: LDO15 { 386*4882a593Smuzhiyun regulator-name = "vdd10_usb3"; 387*4882a593Smuzhiyun regulator-min-microvolt = <1000000>; 388*4882a593Smuzhiyun regulator-max-microvolt = <1000000>; 389*4882a593Smuzhiyun regulator-always-on; 390*4882a593Smuzhiyun }; 391*4882a593Smuzhiyun 392*4882a593Smuzhiyun ldo16_reg: LDO16 { 393*4882a593Smuzhiyun regulator-name = "ldo16"; 394*4882a593Smuzhiyun }; 395*4882a593Smuzhiyun 396*4882a593Smuzhiyun ldo17_reg: LDO17 { 397*4882a593Smuzhiyun regulator-name = "cam_sensor_core"; 398*4882a593Smuzhiyun regulator-min-microvolt = <1200000>; 399*4882a593Smuzhiyun regulator-max-microvolt = <1200000>; 400*4882a593Smuzhiyun }; 401*4882a593Smuzhiyun 402*4882a593Smuzhiyun ldo18_reg: LDO18 { 403*4882a593Smuzhiyun regulator-name = "ldo18"; 404*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 405*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 406*4882a593Smuzhiyun }; 407*4882a593Smuzhiyun 408*4882a593Smuzhiyun ldo19_reg: LDO19 { 409*4882a593Smuzhiyun regulator-name = "ldo19"; 410*4882a593Smuzhiyun }; 411*4882a593Smuzhiyun 412*4882a593Smuzhiyun ldo20_reg: LDO20 { 413*4882a593Smuzhiyun regulator-name = "vdd_mmc0"; 414*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 415*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 416*4882a593Smuzhiyun }; 417*4882a593Smuzhiyun 418*4882a593Smuzhiyun ldo21_reg: LDO21 { 419*4882a593Smuzhiyun /* vdd_mmc2 */ 420*4882a593Smuzhiyun regulator-name = "vddf_2v8"; 421*4882a593Smuzhiyun regulator-min-microvolt = <2850000>; 422*4882a593Smuzhiyun regulator-max-microvolt = <2850000>; 423*4882a593Smuzhiyun }; 424*4882a593Smuzhiyun 425*4882a593Smuzhiyun ldo22_reg: LDO22 { 426*4882a593Smuzhiyun regulator-name = "ldo22"; 427*4882a593Smuzhiyun }; 428*4882a593Smuzhiyun 429*4882a593Smuzhiyun ldo23_reg: LDO23 { 430*4882a593Smuzhiyun regulator-name = "dp_p3v3"; 431*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 432*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 433*4882a593Smuzhiyun regulator-always-on; 434*4882a593Smuzhiyun }; 435*4882a593Smuzhiyun 436*4882a593Smuzhiyun ldo24_reg: LDO24 { 437*4882a593Smuzhiyun regulator-name = "cam_af"; 438*4882a593Smuzhiyun regulator-min-microvolt = <2800000>; 439*4882a593Smuzhiyun regulator-max-microvolt = <2800000>; 440*4882a593Smuzhiyun }; 441*4882a593Smuzhiyun 442*4882a593Smuzhiyun ldo25_reg: LDO25 { 443*4882a593Smuzhiyun regulator-name = "eth_p3v3"; 444*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 445*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 446*4882a593Smuzhiyun regulator-always-on; 447*4882a593Smuzhiyun }; 448*4882a593Smuzhiyun 449*4882a593Smuzhiyun ldo26_reg: LDO26 { 450*4882a593Smuzhiyun regulator-name = "usb30_extclk"; 451*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 452*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 453*4882a593Smuzhiyun regulator-always-on; 454*4882a593Smuzhiyun }; 455*4882a593Smuzhiyun 456*4882a593Smuzhiyun ldo27_reg: LDO27 { 457*4882a593Smuzhiyun regulator-name = "ldo27"; 458*4882a593Smuzhiyun }; 459*4882a593Smuzhiyun 460*4882a593Smuzhiyun ldo28_reg: LDO28 { 461*4882a593Smuzhiyun regulator-name = "ldo28"; 462*4882a593Smuzhiyun }; 463*4882a593Smuzhiyun 464*4882a593Smuzhiyun ldo29_reg: LDO29 { 465*4882a593Smuzhiyun regulator-name = "ldo29"; 466*4882a593Smuzhiyun }; 467*4882a593Smuzhiyun 468*4882a593Smuzhiyun ldo30_reg: LDO30 { 469*4882a593Smuzhiyun regulator-name = "vddq_e1_e2"; 470*4882a593Smuzhiyun regulator-min-microvolt = <1200000>; 471*4882a593Smuzhiyun regulator-max-microvolt = <1200000>; 472*4882a593Smuzhiyun regulator-always-on; 473*4882a593Smuzhiyun }; 474*4882a593Smuzhiyun 475*4882a593Smuzhiyun ldo31_reg: LDO31 { 476*4882a593Smuzhiyun regulator-name = "ldo31"; 477*4882a593Smuzhiyun }; 478*4882a593Smuzhiyun 479*4882a593Smuzhiyun /* On revisions with ti,ina231 this is sensor VS */ 480*4882a593Smuzhiyun ldo32_reg: LDO32 { 481*4882a593Smuzhiyun regulator-name = "vs_power_meter"; 482*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 483*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 484*4882a593Smuzhiyun }; 485*4882a593Smuzhiyun 486*4882a593Smuzhiyun ldo33_reg: LDO33 { 487*4882a593Smuzhiyun regulator-name = "ldo33"; 488*4882a593Smuzhiyun }; 489*4882a593Smuzhiyun 490*4882a593Smuzhiyun ldo34_reg: LDO34 { 491*4882a593Smuzhiyun regulator-name = "ldo34"; 492*4882a593Smuzhiyun }; 493*4882a593Smuzhiyun 494*4882a593Smuzhiyun ldo35_reg: LDO35 { 495*4882a593Smuzhiyun regulator-name = "ldo35"; 496*4882a593Smuzhiyun }; 497*4882a593Smuzhiyun }; 498*4882a593Smuzhiyun }; 499*4882a593Smuzhiyun}; 500*4882a593Smuzhiyun 501*4882a593Smuzhiyun&i2c_1 { 502*4882a593Smuzhiyun status = "okay"; 503*4882a593Smuzhiyun max98090: max98090@10 { 504*4882a593Smuzhiyun compatible = "maxim,max98090"; 505*4882a593Smuzhiyun reg = <0x10>; 506*4882a593Smuzhiyun interrupt-parent = <&gpj3>; 507*4882a593Smuzhiyun interrupts = <0 IRQ_TYPE_NONE>; 508*4882a593Smuzhiyun clocks = <&audi2s0 CLK_I2S_CDCLK>; 509*4882a593Smuzhiyun clock-names = "mclk"; 510*4882a593Smuzhiyun #sound-dai-cells = <0>; 511*4882a593Smuzhiyun }; 512*4882a593Smuzhiyun}; 513*4882a593Smuzhiyun 514*4882a593Smuzhiyun&mmc_0 { 515*4882a593Smuzhiyun status = "okay"; 516*4882a593Smuzhiyun mmc-pwrseq = <&emmc_pwrseq>; 517*4882a593Smuzhiyun cd-gpios = <&gpc0 2 GPIO_ACTIVE_LOW>; 518*4882a593Smuzhiyun card-detect-delay = <200>; 519*4882a593Smuzhiyun samsung,dw-mshc-ciu-div = <3>; 520*4882a593Smuzhiyun samsung,dw-mshc-sdr-timing = <0 4>; 521*4882a593Smuzhiyun samsung,dw-mshc-ddr-timing = <0 2>; 522*4882a593Smuzhiyun pinctrl-names = "default"; 523*4882a593Smuzhiyun pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus1 &sd0_bus4 &sd0_bus8 &sd0_cd>; 524*4882a593Smuzhiyun bus-width = <8>; 525*4882a593Smuzhiyun cap-mmc-highspeed; 526*4882a593Smuzhiyun mmc-hs200-1_8v; 527*4882a593Smuzhiyun vmmc-supply = <&ldo20_reg>; 528*4882a593Smuzhiyun vqmmc-supply = <&ldo11_reg>; 529*4882a593Smuzhiyun}; 530*4882a593Smuzhiyun 531*4882a593Smuzhiyun&mmc_2 { 532*4882a593Smuzhiyun status = "okay"; 533*4882a593Smuzhiyun card-detect-delay = <200>; 534*4882a593Smuzhiyun samsung,dw-mshc-ciu-div = <3>; 535*4882a593Smuzhiyun samsung,dw-mshc-sdr-timing = <0 4>; 536*4882a593Smuzhiyun samsung,dw-mshc-ddr-timing = <0 2>; 537*4882a593Smuzhiyun pinctrl-names = "default"; 538*4882a593Smuzhiyun pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus1 &sd2_bus4 &sd2_wp>; 539*4882a593Smuzhiyun bus-width = <4>; 540*4882a593Smuzhiyun cap-sd-highspeed; 541*4882a593Smuzhiyun vmmc-supply = <&ldo21_reg>; 542*4882a593Smuzhiyun vqmmc-supply = <&ldo4_reg>; 543*4882a593Smuzhiyun}; 544*4882a593Smuzhiyun 545*4882a593Smuzhiyun&pinctrl_0 { 546*4882a593Smuzhiyun emmc_nrst_pin: emmc-nrst { 547*4882a593Smuzhiyun samsung,pins = "gpd1-0"; 548*4882a593Smuzhiyun samsung,pin-function = <EXYNOS_PIN_FUNC_2>; 549*4882a593Smuzhiyun samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; 550*4882a593Smuzhiyun samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; 551*4882a593Smuzhiyun }; 552*4882a593Smuzhiyun 553*4882a593Smuzhiyun sd2_wp: sd2-wp { 554*4882a593Smuzhiyun samsung,pins = "gpm5-0"; 555*4882a593Smuzhiyun samsung,pin-function = <EXYNOS_PIN_FUNC_2>; 556*4882a593Smuzhiyun /* Pin is floating so be sure to disable write-protect */ 557*4882a593Smuzhiyun samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; 558*4882a593Smuzhiyun samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>; 559*4882a593Smuzhiyun }; 560*4882a593Smuzhiyun 561*4882a593Smuzhiyun pmic_dvs_3: pmic-dvs-3 { 562*4882a593Smuzhiyun samsung,pins = "gpx0-0"; 563*4882a593Smuzhiyun samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; 564*4882a593Smuzhiyun samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; 565*4882a593Smuzhiyun samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; 566*4882a593Smuzhiyun }; 567*4882a593Smuzhiyun 568*4882a593Smuzhiyun pmic_dvs_2: pmic-dvs-2 { 569*4882a593Smuzhiyun samsung,pins = "gpx0-1"; 570*4882a593Smuzhiyun samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; 571*4882a593Smuzhiyun samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; 572*4882a593Smuzhiyun samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; 573*4882a593Smuzhiyun }; 574*4882a593Smuzhiyun 575*4882a593Smuzhiyun pmic_dvs_1: pmic-dvs-1 { 576*4882a593Smuzhiyun samsung,pins = "gpx0-2"; 577*4882a593Smuzhiyun samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; 578*4882a593Smuzhiyun samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; 579*4882a593Smuzhiyun samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; 580*4882a593Smuzhiyun samsung,pin-val = <1>; 581*4882a593Smuzhiyun }; 582*4882a593Smuzhiyun 583*4882a593Smuzhiyun max77802_irq: max77802-irq { 584*4882a593Smuzhiyun samsung,pins = "gpx0-4"; 585*4882a593Smuzhiyun samsung,pin-function = <EXYNOS_PIN_FUNC_F>; 586*4882a593Smuzhiyun samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; 587*4882a593Smuzhiyun samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; 588*4882a593Smuzhiyun }; 589*4882a593Smuzhiyun}; 590*4882a593Smuzhiyun 591*4882a593Smuzhiyun&pwm { 592*4882a593Smuzhiyun /* 593*4882a593Smuzhiyun * PWM 0 -- fan 594*4882a593Smuzhiyun * PWM 1 -- Green LED 595*4882a593Smuzhiyun * PWM 2 -- Blue LED 596*4882a593Smuzhiyun * PWM 3 -- on MIPI connector for backlight 597*4882a593Smuzhiyun */ 598*4882a593Smuzhiyun pinctrl-0 = <&pwm0_out &pwm1_out &pwm2_out &pwm3_out>; 599*4882a593Smuzhiyun pinctrl-names = "default"; 600*4882a593Smuzhiyun status = "okay"; 601*4882a593Smuzhiyun}; 602*4882a593Smuzhiyun 603*4882a593Smuzhiyun&rtc { 604*4882a593Smuzhiyun status = "okay"; 605*4882a593Smuzhiyun clocks = <&clock CLK_RTC>, <&max77802 MAX77802_CLK_32K_AP>; 606*4882a593Smuzhiyun clock-names = "rtc", "rtc_src"; 607*4882a593Smuzhiyun}; 608*4882a593Smuzhiyun 609*4882a593Smuzhiyun&serial_0 { 610*4882a593Smuzhiyun status = "okay"; 611*4882a593Smuzhiyun}; 612*4882a593Smuzhiyun 613*4882a593Smuzhiyun&serial_1 { 614*4882a593Smuzhiyun status = "okay"; 615*4882a593Smuzhiyun}; 616*4882a593Smuzhiyun 617*4882a593Smuzhiyun&serial_2 { 618*4882a593Smuzhiyun status = "okay"; 619*4882a593Smuzhiyun}; 620*4882a593Smuzhiyun 621*4882a593Smuzhiyun&serial_3 { 622*4882a593Smuzhiyun status = "okay"; 623*4882a593Smuzhiyun}; 624*4882a593Smuzhiyun 625*4882a593Smuzhiyun&tmu_cpu0 { 626*4882a593Smuzhiyun vtmu-supply = <&ldo10_reg>; 627*4882a593Smuzhiyun}; 628*4882a593Smuzhiyun 629*4882a593Smuzhiyun&tmu_cpu1 { 630*4882a593Smuzhiyun vtmu-supply = <&ldo10_reg>; 631*4882a593Smuzhiyun}; 632*4882a593Smuzhiyun 633*4882a593Smuzhiyun&tmu_cpu2 { 634*4882a593Smuzhiyun vtmu-supply = <&ldo10_reg>; 635*4882a593Smuzhiyun}; 636*4882a593Smuzhiyun 637*4882a593Smuzhiyun&tmu_cpu3 { 638*4882a593Smuzhiyun vtmu-supply = <&ldo10_reg>; 639*4882a593Smuzhiyun}; 640*4882a593Smuzhiyun 641*4882a593Smuzhiyun&usbdrd_dwc3_0 { 642*4882a593Smuzhiyun dr_mode = "peripheral"; 643*4882a593Smuzhiyun}; 644*4882a593Smuzhiyun 645*4882a593Smuzhiyun&usbdrd_dwc3_1 { 646*4882a593Smuzhiyun dr_mode = "host"; 647*4882a593Smuzhiyun}; 648*4882a593Smuzhiyun 649*4882a593Smuzhiyun&usbdrd3_0 { 650*4882a593Smuzhiyun vdd33-supply = <&ldo12_reg>; 651*4882a593Smuzhiyun vdd10-supply = <&ldo15_reg>; 652*4882a593Smuzhiyun}; 653*4882a593Smuzhiyun 654*4882a593Smuzhiyun&usbdrd3_1 { 655*4882a593Smuzhiyun vdd33-supply = <&ldo12_reg>; 656*4882a593Smuzhiyun vdd10-supply = <&ldo15_reg>; 657*4882a593Smuzhiyun}; 658