xref: /OK3568_Linux_fs/kernel/scripts/dtc/include-prefixes/arm/at91-dvk_su60_somc.dtsi (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * at91-dvk_su60_somc.dtsi - Device Tree file for the DVK SOM60 base board
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun *  Copyright (C) 2018 Laird,
6*4882a593Smuzhiyun *		  2018 Ben Whitten <ben.whitten@lairdtech.com>
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun */
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun/ {
11*4882a593Smuzhiyun	sound {
12*4882a593Smuzhiyun		compatible = "atmel,asoc-wm8904";
13*4882a593Smuzhiyun		pinctrl-names = "default";
14*4882a593Smuzhiyun		pinctrl-0 = <&pinctrl_pck2_as_audio_mck>;
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun		atmel,model = "wm8904 @ DVK-SOM60";
17*4882a593Smuzhiyun		atmel,audio-routing =
18*4882a593Smuzhiyun			"Headphone Jack", "HPOUTL",
19*4882a593Smuzhiyun			"Headphone Jack", "HPOUTR",
20*4882a593Smuzhiyun			"IN2L", "Line In Jack",
21*4882a593Smuzhiyun			"IN2R", "Line In Jack",
22*4882a593Smuzhiyun			"Mic", "MICBIAS",
23*4882a593Smuzhiyun			"IN1L", "Mic";
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun		atmel,ssc-controller = <&ssc0>;
26*4882a593Smuzhiyun		atmel,audio-codec = <&wm8904>;
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun		status = "okay";
29*4882a593Smuzhiyun	};
30*4882a593Smuzhiyun};
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun&mmc0 {
33*4882a593Smuzhiyun	status = "okay";
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun	pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_cd>;
36*4882a593Smuzhiyun	slot@0 {
37*4882a593Smuzhiyun		bus-width = <4>;
38*4882a593Smuzhiyun		cd-gpios = <&pioE 31 GPIO_ACTIVE_HIGH>;
39*4882a593Smuzhiyun		cd-inverted;
40*4882a593Smuzhiyun	};
41*4882a593Smuzhiyun};
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun&spi0 {
44*4882a593Smuzhiyun	status = "okay";
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun	/* spi0.0: 4M Flash Macronix MX25R4035FM1IL0 */
47*4882a593Smuzhiyun	spi-flash@0 {
48*4882a593Smuzhiyun		compatible = "mxicy,mx25u4035", "jedec,spi-nor";
49*4882a593Smuzhiyun		spi-max-frequency = <33000000>;
50*4882a593Smuzhiyun		reg = <0>;
51*4882a593Smuzhiyun	};
52*4882a593Smuzhiyun};
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun&ssc0 {
55*4882a593Smuzhiyun	atmel,clk-from-rk-pin;
56*4882a593Smuzhiyun	status = "okay";
57*4882a593Smuzhiyun};
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun&i2c0 {
60*4882a593Smuzhiyun	status = "okay";
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun	wm8904: wm8904@1a {
63*4882a593Smuzhiyun		compatible = "wlf,wm8904";
64*4882a593Smuzhiyun		reg = <0x1a>;
65*4882a593Smuzhiyun		clocks = <&pmc PMC_TYPE_SYSTEM 10>;
66*4882a593Smuzhiyun		clock-names = "mclk";
67*4882a593Smuzhiyun	};
68*4882a593Smuzhiyun};
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun&i2c1 {
71*4882a593Smuzhiyun	status = "okay";
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun	eeprom@57 {
74*4882a593Smuzhiyun		compatible = "giantec,gt24c32a", "atmel,24c32";
75*4882a593Smuzhiyun		reg = <0x57>;
76*4882a593Smuzhiyun		pagesize = <32>;
77*4882a593Smuzhiyun	};
78*4882a593Smuzhiyun};
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun&usart1 {
81*4882a593Smuzhiyun	status = "okay";
82*4882a593Smuzhiyun};
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun&usart2 {
85*4882a593Smuzhiyun	status = "okay";
86*4882a593Smuzhiyun};
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun&usart3 {
89*4882a593Smuzhiyun	status = "okay";
90*4882a593Smuzhiyun};
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun&uart0 {
93*4882a593Smuzhiyun	status = "okay";
94*4882a593Smuzhiyun};
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun&dbgu {
97*4882a593Smuzhiyun	status = "okay";
98*4882a593Smuzhiyun};
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun&pit {
101*4882a593Smuzhiyun	status = "okay";
102*4882a593Smuzhiyun};
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun&adc0 {
105*4882a593Smuzhiyun	status = "okay";
106*4882a593Smuzhiyun};
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun&can1 {
109*4882a593Smuzhiyun	status = "okay";
110*4882a593Smuzhiyun};
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun&macb0 {
113*4882a593Smuzhiyun	#address-cells = <1>;
114*4882a593Smuzhiyun	#size-cells = <0>;
115*4882a593Smuzhiyun	status = "okay";
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun	ethernet-phy@7 {
118*4882a593Smuzhiyun		reg = <7>;
119*4882a593Smuzhiyun		pinctrl-names = "default";
120*4882a593Smuzhiyun		pinctrl-0 = <&pinctrl_geth_int>;
121*4882a593Smuzhiyun		interrupt-parent = <&pioB>;
122*4882a593Smuzhiyun		interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
123*4882a593Smuzhiyun		txen-skew-ps = <800>;
124*4882a593Smuzhiyun		txc-skew-ps = <3000>;
125*4882a593Smuzhiyun		rxdv-skew-ps = <400>;
126*4882a593Smuzhiyun		rxc-skew-ps = <3000>;
127*4882a593Smuzhiyun		rxd0-skew-ps = <400>;
128*4882a593Smuzhiyun		rxd1-skew-ps = <400>;
129*4882a593Smuzhiyun		rxd2-skew-ps = <400>;
130*4882a593Smuzhiyun		rxd3-skew-ps = <400>;
131*4882a593Smuzhiyun	};
132*4882a593Smuzhiyun};
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun&macb1 {
135*4882a593Smuzhiyun	#address-cells = <1>;
136*4882a593Smuzhiyun	#size-cells = <0>;
137*4882a593Smuzhiyun	status = "okay";
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun	ethernet-phy@1 {
140*4882a593Smuzhiyun		reg = <1>;
141*4882a593Smuzhiyun		pinctrl-names = "default";
142*4882a593Smuzhiyun		pinctrl-0 = <&pinctrl_eth_int>;
143*4882a593Smuzhiyun		interrupt-parent = <&pioC>;
144*4882a593Smuzhiyun		interrupts = <10 IRQ_TYPE_EDGE_FALLING>;
145*4882a593Smuzhiyun	};
146*4882a593Smuzhiyun};
147*4882a593Smuzhiyun
148*4882a593Smuzhiyun&usb0 {
149*4882a593Smuzhiyun	status = "okay";
150*4882a593Smuzhiyun};
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun&usb1 {
153*4882a593Smuzhiyun	status = "okay";
154*4882a593Smuzhiyun};
155*4882a593Smuzhiyun
156*4882a593Smuzhiyun&usb2 {
157*4882a593Smuzhiyun	status = "okay";
158*4882a593Smuzhiyun};
159*4882a593Smuzhiyun
160