1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Device Tree common file for the Seagate NAS 2 and 4-bay (Armada 370 SoC). 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (C) 2015 Seagate 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * Author: Vincent Donnefort <vdonnefort@gmail.com> 8*4882a593Smuzhiyun */ 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun/* 11*4882a593Smuzhiyun * TODO: add support for the white SATA LEDs associated with HDD 0 and 1. 12*4882a593Smuzhiyun */ 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun#include "armada-370.dtsi" 15*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h> 16*4882a593Smuzhiyun#include <dt-bindings/input/input.h> 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun/ { 19*4882a593Smuzhiyun chosen { 20*4882a593Smuzhiyun stdout-path = "serial0:115200n8"; 21*4882a593Smuzhiyun }; 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun memory@0 { 24*4882a593Smuzhiyun device_type = "memory"; 25*4882a593Smuzhiyun reg = <0x00000000 0x20000000>; /* 512 MB */ 26*4882a593Smuzhiyun }; 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun soc { 29*4882a593Smuzhiyun ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000 30*4882a593Smuzhiyun MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000>; 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun internal-regs { 33*4882a593Smuzhiyun serial@12000 { 34*4882a593Smuzhiyun status = "okay"; 35*4882a593Smuzhiyun }; 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun sata@a0000 { 38*4882a593Smuzhiyun nr-ports = <2>; 39*4882a593Smuzhiyun status = "okay"; 40*4882a593Smuzhiyun }; 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun ethernet@70000 { 43*4882a593Smuzhiyun status = "okay"; 44*4882a593Smuzhiyun pinctrl-0 = <&ge0_rgmii_pins>; 45*4882a593Smuzhiyun pinctrl-names = "default"; 46*4882a593Smuzhiyun phy = <&phy0>; 47*4882a593Smuzhiyun phy-mode = "rgmii-id"; 48*4882a593Smuzhiyun }; 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun i2c@11000 { 51*4882a593Smuzhiyun status = "okay"; 52*4882a593Smuzhiyun pinctrl-0 = <&i2c0_pins>; 53*4882a593Smuzhiyun pinctrl-names = "default"; 54*4882a593Smuzhiyun clock-frequency = <100000>; 55*4882a593Smuzhiyun 56*4882a593Smuzhiyun /* RTC - NXP 8563T (second source) */ 57*4882a593Smuzhiyun rtc@51 { 58*4882a593Smuzhiyun compatible = "nxp,pcf8563"; 59*4882a593Smuzhiyun reg = <0x51>; 60*4882a593Smuzhiyun interrupts = <110>; 61*4882a593Smuzhiyun }; 62*4882a593Smuzhiyun /* RTC - MCP7940NT */ 63*4882a593Smuzhiyun rtc@6f { 64*4882a593Smuzhiyun compatible = "microchip,mcp7941x"; 65*4882a593Smuzhiyun reg = <0x6f>; 66*4882a593Smuzhiyun interrupts = <110>; 67*4882a593Smuzhiyun }; 68*4882a593Smuzhiyun }; 69*4882a593Smuzhiyun }; 70*4882a593Smuzhiyun 71*4882a593Smuzhiyun }; 72*4882a593Smuzhiyun 73*4882a593Smuzhiyun regulators { 74*4882a593Smuzhiyun compatible = "simple-bus"; 75*4882a593Smuzhiyun #address-cells = <1>; 76*4882a593Smuzhiyun #size-cells = <0>; 77*4882a593Smuzhiyun pinctrl-names = "default"; 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun regulator@1 { 80*4882a593Smuzhiyun compatible = "regulator-fixed"; 81*4882a593Smuzhiyun reg = <1>; 82*4882a593Smuzhiyun regulator-name = "SATA0 power"; 83*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 84*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 85*4882a593Smuzhiyun enable-active-high; 86*4882a593Smuzhiyun regulator-always-on; 87*4882a593Smuzhiyun regulator-boot-on; 88*4882a593Smuzhiyun gpio = <&gpio1 18 GPIO_ACTIVE_HIGH>; 89*4882a593Smuzhiyun }; 90*4882a593Smuzhiyun regulator@2 { 91*4882a593Smuzhiyun compatible = "regulator-fixed"; 92*4882a593Smuzhiyun reg = <2>; 93*4882a593Smuzhiyun regulator-name = "SATA1 power"; 94*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 95*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 96*4882a593Smuzhiyun enable-active-high; 97*4882a593Smuzhiyun regulator-always-on; 98*4882a593Smuzhiyun regulator-boot-on; 99*4882a593Smuzhiyun gpio = <&gpio1 22 GPIO_ACTIVE_HIGH>; 100*4882a593Smuzhiyun }; 101*4882a593Smuzhiyun }; 102*4882a593Smuzhiyun 103*4882a593Smuzhiyun gpio-fan { 104*4882a593Smuzhiyun compatible = "gpio-fan"; 105*4882a593Smuzhiyun gpios = <&gpio2 0 GPIO_ACTIVE_HIGH 106*4882a593Smuzhiyun &gpio2 1 GPIO_ACTIVE_HIGH>; 107*4882a593Smuzhiyun }; 108*4882a593Smuzhiyun 109*4882a593Smuzhiyun gpio-keys { 110*4882a593Smuzhiyun compatible = "gpio-keys"; 111*4882a593Smuzhiyun #address-cells = <1>; 112*4882a593Smuzhiyun #size-cells = <0>; 113*4882a593Smuzhiyun 114*4882a593Smuzhiyun power { 115*4882a593Smuzhiyun label = "Power button"; 116*4882a593Smuzhiyun linux,code = <KEY_POWER>; 117*4882a593Smuzhiyun gpios = <&gpio1 19 GPIO_ACTIVE_LOW>; 118*4882a593Smuzhiyun debounce-interval = <100>; 119*4882a593Smuzhiyun }; 120*4882a593Smuzhiyun backup { 121*4882a593Smuzhiyun label = "Backup button"; 122*4882a593Smuzhiyun linux,code = <KEY_OPTION>; 123*4882a593Smuzhiyun gpios = <&gpio0 31 GPIO_ACTIVE_LOW>; 124*4882a593Smuzhiyun debounce-interval = <100>; 125*4882a593Smuzhiyun }; 126*4882a593Smuzhiyun reset { 127*4882a593Smuzhiyun label = "Reset Button"; 128*4882a593Smuzhiyun linux,code = <KEY_RESTART>; 129*4882a593Smuzhiyun gpios = <&gpio1 23 GPIO_ACTIVE_LOW>; 130*4882a593Smuzhiyun debounce-interval = <100>; 131*4882a593Smuzhiyun }; 132*4882a593Smuzhiyun }; 133*4882a593Smuzhiyun 134*4882a593Smuzhiyun gpio-leds { 135*4882a593Smuzhiyun compatible = "gpio-leds"; 136*4882a593Smuzhiyun 137*4882a593Smuzhiyun white-power { 138*4882a593Smuzhiyun label = "dart:white:power"; 139*4882a593Smuzhiyun gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>; 140*4882a593Smuzhiyun linux,default-trigger = "timer"; 141*4882a593Smuzhiyun 142*4882a593Smuzhiyun }; 143*4882a593Smuzhiyun red-power { 144*4882a593Smuzhiyun label = "dart:red:power"; 145*4882a593Smuzhiyun gpios = <&gpio1 31 GPIO_ACTIVE_HIGH>; 146*4882a593Smuzhiyun }; 147*4882a593Smuzhiyun red-sata0 { 148*4882a593Smuzhiyun label = "dart:red:sata0"; 149*4882a593Smuzhiyun gpios = <&gpio1 15 GPIO_ACTIVE_LOW>; 150*4882a593Smuzhiyun }; 151*4882a593Smuzhiyun red-sata1 { 152*4882a593Smuzhiyun label = "dart:red:sata1"; 153*4882a593Smuzhiyun gpios = <&gpio1 21 GPIO_ACTIVE_LOW>; 154*4882a593Smuzhiyun }; 155*4882a593Smuzhiyun }; 156*4882a593Smuzhiyun 157*4882a593Smuzhiyun gpio_poweroff { 158*4882a593Smuzhiyun compatible = "gpio-poweroff"; 159*4882a593Smuzhiyun gpios = <&gpio1 30 GPIO_ACTIVE_LOW>; 160*4882a593Smuzhiyun }; 161*4882a593Smuzhiyun}; 162*4882a593Smuzhiyun 163*4882a593Smuzhiyun&pciec { 164*4882a593Smuzhiyun status = "okay"; 165*4882a593Smuzhiyun 166*4882a593Smuzhiyun /* USB 3.0 bridge ASM1042A */ 167*4882a593Smuzhiyun pcie@2,0 { 168*4882a593Smuzhiyun status = "okay"; 169*4882a593Smuzhiyun }; 170*4882a593Smuzhiyun}; 171*4882a593Smuzhiyun 172*4882a593Smuzhiyun 173*4882a593Smuzhiyun&mdio { 174*4882a593Smuzhiyun pinctrl-0 = <&mdio_pins>; 175*4882a593Smuzhiyun pinctrl-names = "default"; 176*4882a593Smuzhiyun 177*4882a593Smuzhiyun phy0: ethernet-phy@0 { 178*4882a593Smuzhiyun reg = <0>; 179*4882a593Smuzhiyun }; 180*4882a593Smuzhiyun}; 181*4882a593Smuzhiyun 182*4882a593Smuzhiyun&pinctrl { 183*4882a593Smuzhiyun pinctrl-0 = <&hdd0_led_sata_pin>, <&hdd1_led_sata_pin>; 184*4882a593Smuzhiyun pinctrl-names = "default"; 185*4882a593Smuzhiyun 186*4882a593Smuzhiyun hdd0_led_sata_pin: hdd0-led-sata-pin { 187*4882a593Smuzhiyun marvell,pins = "mpp48"; 188*4882a593Smuzhiyun marvell,function = "sata1"; 189*4882a593Smuzhiyun }; 190*4882a593Smuzhiyun hdd0_led_gpio_pin: hdd0-led-gpio-pin { 191*4882a593Smuzhiyun marvell,pins = "mpp48"; 192*4882a593Smuzhiyun marvell,function = "gpio"; 193*4882a593Smuzhiyun }; 194*4882a593Smuzhiyun hdd1_led_sata_pin: hdd1-led-sata-pin { 195*4882a593Smuzhiyun marvell,pins = "mpp57"; 196*4882a593Smuzhiyun marvell,function = "sata0"; 197*4882a593Smuzhiyun }; 198*4882a593Smuzhiyun hdd1_led_gpio_pin: hdd1-led-gpio-pin { 199*4882a593Smuzhiyun marvell,pins = "mpp57"; 200*4882a593Smuzhiyun marvell,function = "gpio"; 201*4882a593Smuzhiyun }; 202*4882a593Smuzhiyun}; 203*4882a593Smuzhiyun 204*4882a593Smuzhiyun&nand_controller { 205*4882a593Smuzhiyun status = "okay"; 206*4882a593Smuzhiyun 207*4882a593Smuzhiyun nand@0 { 208*4882a593Smuzhiyun reg = <0>; 209*4882a593Smuzhiyun label = "pxa3xx_nand-0"; 210*4882a593Smuzhiyun nand-rb = <0>; 211*4882a593Smuzhiyun marvell,nand-keep-config; 212*4882a593Smuzhiyun nand-on-flash-bbt; 213*4882a593Smuzhiyun nand-ecc-strength = <4>; 214*4882a593Smuzhiyun nand-ecc-step-size = <512>; 215*4882a593Smuzhiyun 216*4882a593Smuzhiyun partitions { 217*4882a593Smuzhiyun compatible = "fixed-partitions"; 218*4882a593Smuzhiyun #address-cells = <1>; 219*4882a593Smuzhiyun #size-cells = <1>; 220*4882a593Smuzhiyun 221*4882a593Smuzhiyun partition@0 { 222*4882a593Smuzhiyun label = "u-boot"; 223*4882a593Smuzhiyun reg = <0x0 0x300000>; 224*4882a593Smuzhiyun }; 225*4882a593Smuzhiyun partition@300000 { 226*4882a593Smuzhiyun label = "device-tree"; 227*4882a593Smuzhiyun reg = <0x300000 0x20000>; 228*4882a593Smuzhiyun }; 229*4882a593Smuzhiyun partition@320000 { 230*4882a593Smuzhiyun label = "linux"; 231*4882a593Smuzhiyun reg = <0x320000 0x2000000>; 232*4882a593Smuzhiyun }; 233*4882a593Smuzhiyun partition@2320000 { 234*4882a593Smuzhiyun label = "rootfs"; 235*4882a593Smuzhiyun reg = <0x2320000 0xdce0000>; 236*4882a593Smuzhiyun }; 237*4882a593Smuzhiyun }; 238*4882a593Smuzhiyun }; 239*4882a593Smuzhiyun}; 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