1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0-only 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Support for CompuLab CL-SOM-AM57x System-on-Module 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (C) 2015 CompuLab Ltd. - http://www.compulab.co.il/ 6*4882a593Smuzhiyun * Author: Dmitry Lifshitz <lifshitz@compulab.co.il> 7*4882a593Smuzhiyun */ 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun/dts-v1/; 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h> 12*4882a593Smuzhiyun#include <dt-bindings/interrupt-controller/irq.h> 13*4882a593Smuzhiyun#include "am5728.dtsi" 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun/ { 16*4882a593Smuzhiyun model = "CompuLab CL-SOM-AM57x"; 17*4882a593Smuzhiyun compatible = "compulab,cl-som-am57x", "ti,am5728", "ti,dra742", "ti,dra74", "ti,dra7"; 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun memory@0 { 20*4882a593Smuzhiyun device_type = "memory"; 21*4882a593Smuzhiyun reg = <0x0 0x80000000 0x0 0x20000000>; /* 512 MB - minimal configuration */ 22*4882a593Smuzhiyun }; 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun leds { 25*4882a593Smuzhiyun compatible = "gpio-leds"; 26*4882a593Smuzhiyun pinctrl-names = "default"; 27*4882a593Smuzhiyun pinctrl-0 = <&leds_pins_default>; 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun led0 { 30*4882a593Smuzhiyun label = "cl-som-am57x:green"; 31*4882a593Smuzhiyun gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>; 32*4882a593Smuzhiyun linux,default-trigger = "heartbeat"; 33*4882a593Smuzhiyun default-state = "off"; 34*4882a593Smuzhiyun }; 35*4882a593Smuzhiyun }; 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun vdd_3v3: fixedregulator-vdd_3v3 { 38*4882a593Smuzhiyun compatible = "regulator-fixed"; 39*4882a593Smuzhiyun regulator-name = "vdd_3v3"; 40*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 41*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 42*4882a593Smuzhiyun }; 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun ads7846reg: fixedregulator-ads7846-reg { 45*4882a593Smuzhiyun compatible = "regulator-fixed"; 46*4882a593Smuzhiyun regulator-name = "ads7846-reg"; 47*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 48*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 49*4882a593Smuzhiyun }; 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun sound0: sound0 { 52*4882a593Smuzhiyun compatible = "simple-audio-card"; 53*4882a593Smuzhiyun simple-audio-card,name = "CL-SOM-AM57x-Sound-Card"; 54*4882a593Smuzhiyun simple-audio-card,format = "i2s"; 55*4882a593Smuzhiyun simple-audio-card,bitclock-master = <&dailink0_master>; 56*4882a593Smuzhiyun simple-audio-card,frame-master = <&dailink0_master>; 57*4882a593Smuzhiyun simple-audio-card,widgets = 58*4882a593Smuzhiyun "Headphone", "Headphone Jack", 59*4882a593Smuzhiyun "Microphone", "Microphone Jack", 60*4882a593Smuzhiyun "Line", "Line Jack"; 61*4882a593Smuzhiyun simple-audio-card,routing = 62*4882a593Smuzhiyun "Headphone Jack", "RHPOUT", 63*4882a593Smuzhiyun "Headphone Jack", "LHPOUT", 64*4882a593Smuzhiyun "LLINEIN", "Line Jack", 65*4882a593Smuzhiyun "MICIN", "Mic Bias", 66*4882a593Smuzhiyun "Mic Bias", "Microphone Jack"; 67*4882a593Smuzhiyun 68*4882a593Smuzhiyun dailink0_master: simple-audio-card,cpu { 69*4882a593Smuzhiyun sound-dai = <&mcasp3>; 70*4882a593Smuzhiyun }; 71*4882a593Smuzhiyun 72*4882a593Smuzhiyun simple-audio-card,codec { 73*4882a593Smuzhiyun sound-dai = <&wm8731>; 74*4882a593Smuzhiyun system-clock-frequency = <12000000>; 75*4882a593Smuzhiyun }; 76*4882a593Smuzhiyun }; 77*4882a593Smuzhiyun}; 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun&dra7_pmx_core { 80*4882a593Smuzhiyun leds_pins_default: leds_pins_default { 81*4882a593Smuzhiyun pinctrl-single,pins = < 82*4882a593Smuzhiyun DRA7XX_CORE_IOPAD(0x347c, PIN_OUTPUT | MUX_MODE14) /* gpmc_a15.gpio2_5 */ 83*4882a593Smuzhiyun >; 84*4882a593Smuzhiyun }; 85*4882a593Smuzhiyun 86*4882a593Smuzhiyun i2c1_pins_default: i2c1_pins_default { 87*4882a593Smuzhiyun pinctrl-single,pins = < 88*4882a593Smuzhiyun DRA7XX_CORE_IOPAD(0x3800, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_sda.sda */ 89*4882a593Smuzhiyun DRA7XX_CORE_IOPAD(0x3804, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl.scl */ 90*4882a593Smuzhiyun >; 91*4882a593Smuzhiyun }; 92*4882a593Smuzhiyun 93*4882a593Smuzhiyun i2c3_pins_default: i2c3_pins_default { 94*4882a593Smuzhiyun pinctrl-single,pins = < 95*4882a593Smuzhiyun DRA7XX_CORE_IOPAD(0x36a4, PIN_INPUT| MUX_MODE10) /* mcasp1_aclkx.i2c3_sda */ 96*4882a593Smuzhiyun DRA7XX_CORE_IOPAD(0x36a8, PIN_INPUT| MUX_MODE10) /* mcasp1_fsx.i2c3_scl */ 97*4882a593Smuzhiyun >; 98*4882a593Smuzhiyun }; 99*4882a593Smuzhiyun 100*4882a593Smuzhiyun i2c4_pins_default: i2c4_pins_default { 101*4882a593Smuzhiyun pinctrl-single,pins = < 102*4882a593Smuzhiyun DRA7XX_CORE_IOPAD(0x36ac, PIN_INPUT| MUX_MODE10) /* mcasp1_acl.i2c4_sda */ 103*4882a593Smuzhiyun DRA7XX_CORE_IOPAD(0x36b0, PIN_INPUT| MUX_MODE10) /* mcasp1_fsr.i2c4_scl */ 104*4882a593Smuzhiyun >; 105*4882a593Smuzhiyun }; 106*4882a593Smuzhiyun 107*4882a593Smuzhiyun tps659038_pins_default: tps659038_pins_default { 108*4882a593Smuzhiyun pinctrl-single,pins = < 109*4882a593Smuzhiyun DRA7XX_CORE_IOPAD(0x3818, PIN_INPUT_PULLUP | MUX_MODE14) /* wakeup0.gpio1_0 */ 110*4882a593Smuzhiyun >; 111*4882a593Smuzhiyun }; 112*4882a593Smuzhiyun 113*4882a593Smuzhiyun mmc2_pins_default: mmc2_pins_default { 114*4882a593Smuzhiyun pinctrl-single,pins = < 115*4882a593Smuzhiyun DRA7XX_CORE_IOPAD(0x349c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a23.mmc2_clk */ 116*4882a593Smuzhiyun DRA7XX_CORE_IOPAD(0x34b0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */ 117*4882a593Smuzhiyun DRA7XX_CORE_IOPAD(0x34a0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a24.mmc2_dat0 */ 118*4882a593Smuzhiyun DRA7XX_CORE_IOPAD(0x34a4, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a25.mmc2_dat1 */ 119*4882a593Smuzhiyun DRA7XX_CORE_IOPAD(0x34a8, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a26.mmc2_dat2 */ 120*4882a593Smuzhiyun DRA7XX_CORE_IOPAD(0x34ac, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a27.mmc2_dat3 */ 121*4882a593Smuzhiyun DRA7XX_CORE_IOPAD(0x348c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a19.mmc2_dat4 */ 122*4882a593Smuzhiyun DRA7XX_CORE_IOPAD(0x3490, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a20.mmc2_dat5 */ 123*4882a593Smuzhiyun DRA7XX_CORE_IOPAD(0x3494, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a21.mmc2_dat6 */ 124*4882a593Smuzhiyun DRA7XX_CORE_IOPAD(0x3498, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a22.mmc2_dat7 */ 125*4882a593Smuzhiyun >; 126*4882a593Smuzhiyun }; 127*4882a593Smuzhiyun 128*4882a593Smuzhiyun qspi1_pins: pinmux_qspi1_pins { 129*4882a593Smuzhiyun pinctrl-single,pins = < 130*4882a593Smuzhiyun DRA7XX_CORE_IOPAD(0x3474, PIN_INPUT | MUX_MODE1) /* gpmc_a13.qspi1_rtclk */ 131*4882a593Smuzhiyun DRA7XX_CORE_IOPAD(0x3480, PIN_INPUT | MUX_MODE1) /* gpmc_a16.qspi1_d0 */ 132*4882a593Smuzhiyun DRA7XX_CORE_IOPAD(0x3484, PIN_INPUT | MUX_MODE1) /* gpmc_a17.qspi1_d1 */ 133*4882a593Smuzhiyun DRA7XX_CORE_IOPAD(0x3488, PIN_INPUT | MUX_MODE1) /* qpmc_a18.qspi1_sclk */ 134*4882a593Smuzhiyun DRA7XX_CORE_IOPAD(0x34b8, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs2.qspi1_cs0 */ 135*4882a593Smuzhiyun DRA7XX_CORE_IOPAD(0x34bc, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs3.qspi1_cs1 */ 136*4882a593Smuzhiyun >; 137*4882a593Smuzhiyun }; 138*4882a593Smuzhiyun 139*4882a593Smuzhiyun cpsw_pins_default: cpsw_pins_default { 140*4882a593Smuzhiyun pinctrl-single,pins = < 141*4882a593Smuzhiyun /* Slave at addr 0x0 */ 142*4882a593Smuzhiyun DRA7XX_CORE_IOPAD(0x3650, PIN_OUTPUT | MUX_MODE0) /* rgmii0_tclk */ 143*4882a593Smuzhiyun DRA7XX_CORE_IOPAD(0x3654, PIN_OUTPUT | MUX_MODE0) /* rgmii0_tctl */ 144*4882a593Smuzhiyun DRA7XX_CORE_IOPAD(0x3658, PIN_OUTPUT | MUX_MODE0) /* rgmii0_td3 */ 145*4882a593Smuzhiyun DRA7XX_CORE_IOPAD(0x365c, PIN_OUTPUT | MUX_MODE0) /* rgmii0_td2 */ 146*4882a593Smuzhiyun DRA7XX_CORE_IOPAD(0x3660, PIN_OUTPUT | MUX_MODE0) /* rgmii0_td1 */ 147*4882a593Smuzhiyun DRA7XX_CORE_IOPAD(0x3664, PIN_OUTPUT | MUX_MODE0) /* rgmii0_td0 */ 148*4882a593Smuzhiyun DRA7XX_CORE_IOPAD(0x3668, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rgmii0_rclk */ 149*4882a593Smuzhiyun DRA7XX_CORE_IOPAD(0x366c, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rgmii0_rctl */ 150*4882a593Smuzhiyun DRA7XX_CORE_IOPAD(0x3670, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rgmii0_rd3 */ 151*4882a593Smuzhiyun DRA7XX_CORE_IOPAD(0x3674, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rgmii0_rd2 */ 152*4882a593Smuzhiyun DRA7XX_CORE_IOPAD(0x3678, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rgmii0_rd1 */ 153*4882a593Smuzhiyun DRA7XX_CORE_IOPAD(0x367c, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rgmii0_rd0 */ 154*4882a593Smuzhiyun 155*4882a593Smuzhiyun /* Slave at addr 0x1 */ 156*4882a593Smuzhiyun DRA7XX_CORE_IOPAD(0x3598, PIN_OUTPUT | MUX_MODE3) /* vin2a_d12.rgmii1_tclk */ 157*4882a593Smuzhiyun DRA7XX_CORE_IOPAD(0x359c, PIN_OUTPUT | MUX_MODE3) /* vin2a_d13.rgmii1_tctl */ 158*4882a593Smuzhiyun DRA7XX_CORE_IOPAD(0x35a0, PIN_OUTPUT | MUX_MODE3) /* vin2a_d14.rgmii1_td3 */ 159*4882a593Smuzhiyun DRA7XX_CORE_IOPAD(0x35a4, PIN_OUTPUT | MUX_MODE3) /* vin2a_d15.rgmii1_td2 */ 160*4882a593Smuzhiyun DRA7XX_CORE_IOPAD(0x35a8, PIN_OUTPUT | MUX_MODE3) /* vin2a_d16.rgmii1_td1 */ 161*4882a593Smuzhiyun DRA7XX_CORE_IOPAD(0x35ac, PIN_OUTPUT | MUX_MODE3) /* vin2a_d17.rgmii1_td0 */ 162*4882a593Smuzhiyun DRA7XX_CORE_IOPAD(0x35b0, PIN_INPUT_PULLDOWN | MUX_MODE3) /* vin2a_d18.rgmii1_rclk */ 163*4882a593Smuzhiyun DRA7XX_CORE_IOPAD(0x35b4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* vin2a_d19.rgmii1_rctl */ 164*4882a593Smuzhiyun DRA7XX_CORE_IOPAD(0x35b8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* vin2a_d20.rgmii1_rd3 */ 165*4882a593Smuzhiyun DRA7XX_CORE_IOPAD(0x35bc, PIN_INPUT_PULLDOWN | MUX_MODE3) /* vin2a_d21.rgmii1_rd2 */ 166*4882a593Smuzhiyun DRA7XX_CORE_IOPAD(0x35c0, PIN_INPUT_PULLDOWN | MUX_MODE3) /* vin2a_d22.rgmii1_rd1 */ 167*4882a593Smuzhiyun DRA7XX_CORE_IOPAD(0x35c4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* vin2a_d23.rgmii1_rd0 */ 168*4882a593Smuzhiyun >; 169*4882a593Smuzhiyun }; 170*4882a593Smuzhiyun 171*4882a593Smuzhiyun cpsw_pins_sleep: cpsw_pins_sleep { 172*4882a593Smuzhiyun pinctrl-single,pins = < 173*4882a593Smuzhiyun /* Slave 1 */ 174*4882a593Smuzhiyun DRA7XX_CORE_IOPAD(0x3650, PIN_INPUT | MUX_MODE15) 175*4882a593Smuzhiyun DRA7XX_CORE_IOPAD(0x3654, PIN_INPUT | MUX_MODE15) 176*4882a593Smuzhiyun DRA7XX_CORE_IOPAD(0x3658, PIN_INPUT | MUX_MODE15) 177*4882a593Smuzhiyun DRA7XX_CORE_IOPAD(0x365c, PIN_INPUT | MUX_MODE15) 178*4882a593Smuzhiyun DRA7XX_CORE_IOPAD(0x3660, PIN_INPUT | MUX_MODE15) 179*4882a593Smuzhiyun DRA7XX_CORE_IOPAD(0x3664, PIN_INPUT | MUX_MODE15) 180*4882a593Smuzhiyun DRA7XX_CORE_IOPAD(0x3668, PIN_INPUT | MUX_MODE15) 181*4882a593Smuzhiyun DRA7XX_CORE_IOPAD(0x366c, PIN_INPUT | MUX_MODE15) 182*4882a593Smuzhiyun DRA7XX_CORE_IOPAD(0x3670, PIN_INPUT | MUX_MODE15) 183*4882a593Smuzhiyun DRA7XX_CORE_IOPAD(0x3674, PIN_INPUT | MUX_MODE15) 184*4882a593Smuzhiyun DRA7XX_CORE_IOPAD(0x3678, PIN_INPUT | MUX_MODE15) 185*4882a593Smuzhiyun DRA7XX_CORE_IOPAD(0x367c, PIN_INPUT | MUX_MODE15) 186*4882a593Smuzhiyun 187*4882a593Smuzhiyun /* Slave 2 */ 188*4882a593Smuzhiyun DRA7XX_CORE_IOPAD(0x3598, PIN_INPUT | MUX_MODE15) 189*4882a593Smuzhiyun DRA7XX_CORE_IOPAD(0x359c, PIN_INPUT | MUX_MODE15) 190*4882a593Smuzhiyun DRA7XX_CORE_IOPAD(0x35a0, PIN_INPUT | MUX_MODE15) 191*4882a593Smuzhiyun DRA7XX_CORE_IOPAD(0x35a4, PIN_INPUT | MUX_MODE15) 192*4882a593Smuzhiyun DRA7XX_CORE_IOPAD(0x35a8, PIN_INPUT | MUX_MODE15) 193*4882a593Smuzhiyun DRA7XX_CORE_IOPAD(0x35ac, PIN_INPUT | MUX_MODE15) 194*4882a593Smuzhiyun DRA7XX_CORE_IOPAD(0x35b0, PIN_INPUT | MUX_MODE15) 195*4882a593Smuzhiyun DRA7XX_CORE_IOPAD(0x35b4, PIN_INPUT | MUX_MODE15) 196*4882a593Smuzhiyun DRA7XX_CORE_IOPAD(0x35b8, PIN_INPUT | MUX_MODE15) 197*4882a593Smuzhiyun DRA7XX_CORE_IOPAD(0x35bc, PIN_INPUT | MUX_MODE15) 198*4882a593Smuzhiyun DRA7XX_CORE_IOPAD(0x35c0, PIN_INPUT | MUX_MODE15) 199*4882a593Smuzhiyun DRA7XX_CORE_IOPAD(0x35c4, PIN_INPUT | MUX_MODE15) 200*4882a593Smuzhiyun >; 201*4882a593Smuzhiyun }; 202*4882a593Smuzhiyun 203*4882a593Smuzhiyun davinci_mdio_pins_default: davinci_mdio_pins_default { 204*4882a593Smuzhiyun pinctrl-single,pins = < 205*4882a593Smuzhiyun /* MDIO */ 206*4882a593Smuzhiyun DRA7XX_CORE_IOPAD(0x3590, PIN_OUTPUT_PULLUP | MUX_MODE3)/* vin2a_d10.mdio_mclk */ 207*4882a593Smuzhiyun DRA7XX_CORE_IOPAD(0x3594, PIN_INPUT_PULLUP | MUX_MODE3) /* vin2a_d11.mdio_d */ 208*4882a593Smuzhiyun >; 209*4882a593Smuzhiyun }; 210*4882a593Smuzhiyun 211*4882a593Smuzhiyun davinci_mdio_pins_sleep: davinci_mdio_pins_sleep { 212*4882a593Smuzhiyun pinctrl-single,pins = < 213*4882a593Smuzhiyun DRA7XX_CORE_IOPAD(0x3590, PIN_INPUT | MUX_MODE15) 214*4882a593Smuzhiyun DRA7XX_CORE_IOPAD(0x3594, PIN_INPUT | MUX_MODE15) 215*4882a593Smuzhiyun >; 216*4882a593Smuzhiyun }; 217*4882a593Smuzhiyun 218*4882a593Smuzhiyun ads7846_pins: pinmux_ads7846_pins { 219*4882a593Smuzhiyun pinctrl-single,pins = < 220*4882a593Smuzhiyun DRA7XX_CORE_IOPAD(0x3464, PIN_INPUT_PULLDOWN | MUX_MODE14) /* gpmc_a9.gpio1_31 */ 221*4882a593Smuzhiyun >; 222*4882a593Smuzhiyun }; 223*4882a593Smuzhiyun 224*4882a593Smuzhiyun mcasp3_pins_default: mcasp3_pins_default { 225*4882a593Smuzhiyun pinctrl-single,pins = < 226*4882a593Smuzhiyun DRA7XX_CORE_IOPAD(0x3724, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp3_aclkx.mcasp3_aclkx */ 227*4882a593Smuzhiyun DRA7XX_CORE_IOPAD(0x3728, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp3_fsx.mcasp3_fsx */ 228*4882a593Smuzhiyun DRA7XX_CORE_IOPAD(0x372c, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mcasp3_axr0.mcasp3_axr0 */ 229*4882a593Smuzhiyun DRA7XX_CORE_IOPAD(0x3730, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp3_axr1.mcasp3_axr1 */ 230*4882a593Smuzhiyun >; 231*4882a593Smuzhiyun }; 232*4882a593Smuzhiyun 233*4882a593Smuzhiyun mcasp3_pins_sleep: mcasp3_pins_sleep { 234*4882a593Smuzhiyun pinctrl-single,pins = < 235*4882a593Smuzhiyun DRA7XX_CORE_IOPAD(0x3724, PIN_INPUT | MUX_MODE15) 236*4882a593Smuzhiyun DRA7XX_CORE_IOPAD(0x3728, PIN_INPUT | MUX_MODE15) 237*4882a593Smuzhiyun DRA7XX_CORE_IOPAD(0x372c, PIN_INPUT | MUX_MODE15) 238*4882a593Smuzhiyun DRA7XX_CORE_IOPAD(0x3730, PIN_INPUT | MUX_MODE15) 239*4882a593Smuzhiyun >; 240*4882a593Smuzhiyun }; 241*4882a593Smuzhiyun}; 242*4882a593Smuzhiyun 243*4882a593Smuzhiyun&i2c1 { 244*4882a593Smuzhiyun status = "okay"; 245*4882a593Smuzhiyun pinctrl-names = "default"; 246*4882a593Smuzhiyun pinctrl-0 = <&i2c1_pins_default>; 247*4882a593Smuzhiyun clock-frequency = <400000>; 248*4882a593Smuzhiyun}; 249*4882a593Smuzhiyun 250*4882a593Smuzhiyun&i2c3 { 251*4882a593Smuzhiyun status = "okay"; 252*4882a593Smuzhiyun pinctrl-names = "default"; 253*4882a593Smuzhiyun pinctrl-0 = <&i2c3_pins_default>; 254*4882a593Smuzhiyun clock-frequency = <400000>; 255*4882a593Smuzhiyun}; 256*4882a593Smuzhiyun 257*4882a593Smuzhiyun&i2c4 { 258*4882a593Smuzhiyun status = "okay"; 259*4882a593Smuzhiyun pinctrl-names = "default"; 260*4882a593Smuzhiyun pinctrl-0 = <&i2c4_pins_default>; 261*4882a593Smuzhiyun clock-frequency = <400000>; 262*4882a593Smuzhiyun 263*4882a593Smuzhiyun tps659038: tps659038@58 { 264*4882a593Smuzhiyun compatible = "ti,tps659038"; 265*4882a593Smuzhiyun reg = <0x58>; 266*4882a593Smuzhiyun interrupt-parent = <&gpio1>; 267*4882a593Smuzhiyun interrupts = <0 IRQ_TYPE_LEVEL_LOW>; 268*4882a593Smuzhiyun 269*4882a593Smuzhiyun pinctrl-names = "default"; 270*4882a593Smuzhiyun pinctrl-0 = <&tps659038_pins_default>; 271*4882a593Smuzhiyun 272*4882a593Smuzhiyun #interrupt-cells = <2>; 273*4882a593Smuzhiyun interrupt-controller; 274*4882a593Smuzhiyun 275*4882a593Smuzhiyun ti,system-power-controller; 276*4882a593Smuzhiyun 277*4882a593Smuzhiyun tps659038_pmic { 278*4882a593Smuzhiyun compatible = "ti,tps659038-pmic"; 279*4882a593Smuzhiyun 280*4882a593Smuzhiyun regulators { 281*4882a593Smuzhiyun smps12_reg: smps12 { 282*4882a593Smuzhiyun /* VDD_MPU */ 283*4882a593Smuzhiyun regulator-name = "smps12"; 284*4882a593Smuzhiyun regulator-min-microvolt = < 850000>; 285*4882a593Smuzhiyun regulator-max-microvolt = <1250000>; 286*4882a593Smuzhiyun regulator-always-on; 287*4882a593Smuzhiyun regulator-boot-on; 288*4882a593Smuzhiyun }; 289*4882a593Smuzhiyun 290*4882a593Smuzhiyun smps3_reg: smps3 { 291*4882a593Smuzhiyun /* VDD_DDR */ 292*4882a593Smuzhiyun regulator-name = "smps3"; 293*4882a593Smuzhiyun regulator-min-microvolt = <1500000>; 294*4882a593Smuzhiyun regulator-max-microvolt = <1500000>; 295*4882a593Smuzhiyun regulator-always-on; 296*4882a593Smuzhiyun regulator-boot-on; 297*4882a593Smuzhiyun }; 298*4882a593Smuzhiyun 299*4882a593Smuzhiyun smps45_reg: smps45 { 300*4882a593Smuzhiyun /* VDD_DSPEVE */ 301*4882a593Smuzhiyun regulator-name = "smps45"; 302*4882a593Smuzhiyun regulator-min-microvolt = < 850000>; 303*4882a593Smuzhiyun regulator-max-microvolt = <1250000>; 304*4882a593Smuzhiyun regulator-always-on; 305*4882a593Smuzhiyun regulator-boot-on; 306*4882a593Smuzhiyun }; 307*4882a593Smuzhiyun 308*4882a593Smuzhiyun smps6_reg: smps6 { 309*4882a593Smuzhiyun /* VDD_GPU */ 310*4882a593Smuzhiyun regulator-name = "smps6"; 311*4882a593Smuzhiyun regulator-min-microvolt = < 850000>; 312*4882a593Smuzhiyun regulator-max-microvolt = <1250000>; 313*4882a593Smuzhiyun regulator-always-on; 314*4882a593Smuzhiyun regulator-boot-on; 315*4882a593Smuzhiyun }; 316*4882a593Smuzhiyun 317*4882a593Smuzhiyun smps7_reg: smps7 { 318*4882a593Smuzhiyun /* VDD_CORE */ 319*4882a593Smuzhiyun regulator-name = "smps7"; 320*4882a593Smuzhiyun regulator-min-microvolt = < 850000>; 321*4882a593Smuzhiyun regulator-max-microvolt = <1160000>; 322*4882a593Smuzhiyun regulator-always-on; 323*4882a593Smuzhiyun regulator-boot-on; 324*4882a593Smuzhiyun }; 325*4882a593Smuzhiyun 326*4882a593Smuzhiyun smps8_reg: smps8 { 327*4882a593Smuzhiyun /* VDD_IVA */ 328*4882a593Smuzhiyun regulator-name = "smps8"; 329*4882a593Smuzhiyun regulator-min-microvolt = < 850000>; 330*4882a593Smuzhiyun regulator-max-microvolt = <1250000>; 331*4882a593Smuzhiyun regulator-always-on; 332*4882a593Smuzhiyun regulator-boot-on; 333*4882a593Smuzhiyun }; 334*4882a593Smuzhiyun 335*4882a593Smuzhiyun smps9_reg: smps9 { 336*4882a593Smuzhiyun /* PMIC_3V3 */ 337*4882a593Smuzhiyun regulator-name = "smps9"; 338*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 339*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 340*4882a593Smuzhiyun regulator-always-on; 341*4882a593Smuzhiyun regulator-boot-on; 342*4882a593Smuzhiyun }; 343*4882a593Smuzhiyun 344*4882a593Smuzhiyun 345*4882a593Smuzhiyun ldo1_reg: ldo1 { 346*4882a593Smuzhiyun /* VDD_SD / VDDSHV8 */ 347*4882a593Smuzhiyun regulator-name = "ldo1"; 348*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 349*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 350*4882a593Smuzhiyun regulator-boot-on; 351*4882a593Smuzhiyun regulator-always-on; 352*4882a593Smuzhiyun }; 353*4882a593Smuzhiyun 354*4882a593Smuzhiyun ldo2_reg: ldo2 { 355*4882a593Smuzhiyun /* VDD_1V8 */ 356*4882a593Smuzhiyun regulator-name = "ldo2"; 357*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 358*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 359*4882a593Smuzhiyun regulator-always-on; 360*4882a593Smuzhiyun regulator-boot-on; 361*4882a593Smuzhiyun }; 362*4882a593Smuzhiyun 363*4882a593Smuzhiyun ldo3_reg: ldo3 { 364*4882a593Smuzhiyun /* VDDA_1V8_PHYA - supplies VDDA_SATA, VDDA_USB1/2/3 */ 365*4882a593Smuzhiyun regulator-name = "ldo3"; 366*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 367*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 368*4882a593Smuzhiyun regulator-always-on; 369*4882a593Smuzhiyun regulator-boot-on; 370*4882a593Smuzhiyun }; 371*4882a593Smuzhiyun 372*4882a593Smuzhiyun ldo4_reg: ldo4 { 373*4882a593Smuzhiyun /* VDDA_1V8_PHYB - supplies VDDA_HDMI, VDDA_PCIE/0/1 */ 374*4882a593Smuzhiyun regulator-name = "ldo4"; 375*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 376*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 377*4882a593Smuzhiyun regulator-always-on; 378*4882a593Smuzhiyun regulator-boot-on; 379*4882a593Smuzhiyun }; 380*4882a593Smuzhiyun 381*4882a593Smuzhiyun ldo9_reg: ldo9 { 382*4882a593Smuzhiyun /* VDD_RTC */ 383*4882a593Smuzhiyun regulator-name = "ldo9"; 384*4882a593Smuzhiyun regulator-min-microvolt = <1050000>; 385*4882a593Smuzhiyun regulator-max-microvolt = <1050000>; 386*4882a593Smuzhiyun regulator-always-on; 387*4882a593Smuzhiyun regulator-boot-on; 388*4882a593Smuzhiyun }; 389*4882a593Smuzhiyun 390*4882a593Smuzhiyun ldoln_reg: ldoln { 391*4882a593Smuzhiyun /* VDDA_1V8_PLL */ 392*4882a593Smuzhiyun regulator-name = "ldoln"; 393*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 394*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 395*4882a593Smuzhiyun regulator-always-on; 396*4882a593Smuzhiyun regulator-boot-on; 397*4882a593Smuzhiyun }; 398*4882a593Smuzhiyun 399*4882a593Smuzhiyun ldousb_reg: ldousb { 400*4882a593Smuzhiyun /* VDDA_3V_USB: VDDA_USBHS33 */ 401*4882a593Smuzhiyun regulator-name = "ldousb"; 402*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 403*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 404*4882a593Smuzhiyun regulator-always-on; 405*4882a593Smuzhiyun regulator-boot-on; 406*4882a593Smuzhiyun }; 407*4882a593Smuzhiyun 408*4882a593Smuzhiyun /* regen1 not used */ 409*4882a593Smuzhiyun }; 410*4882a593Smuzhiyun }; 411*4882a593Smuzhiyun 412*4882a593Smuzhiyun tps659038_pwr_button: tps659038_pwr_button { 413*4882a593Smuzhiyun compatible = "ti,palmas-pwrbutton"; 414*4882a593Smuzhiyun interrupt-parent = <&tps659038>; 415*4882a593Smuzhiyun interrupts = <1 IRQ_TYPE_EDGE_FALLING>; 416*4882a593Smuzhiyun wakeup-source; 417*4882a593Smuzhiyun ti,palmas-long-press-seconds = <12>; 418*4882a593Smuzhiyun }; 419*4882a593Smuzhiyun 420*4882a593Smuzhiyun tps659038_gpio: tps659038_gpio { 421*4882a593Smuzhiyun compatible = "ti,palmas-gpio"; 422*4882a593Smuzhiyun gpio-controller; 423*4882a593Smuzhiyun #gpio-cells = <2>; 424*4882a593Smuzhiyun }; 425*4882a593Smuzhiyun }; 426*4882a593Smuzhiyun 427*4882a593Smuzhiyun rtc0: rtc@56 { 428*4882a593Smuzhiyun compatible = "emmicro,em3027"; 429*4882a593Smuzhiyun reg = <0x56>; 430*4882a593Smuzhiyun }; 431*4882a593Smuzhiyun 432*4882a593Smuzhiyun eeprom_module: atmel@50 { 433*4882a593Smuzhiyun compatible = "atmel,24c08"; 434*4882a593Smuzhiyun reg = <0x50>; 435*4882a593Smuzhiyun pagesize = <16>; 436*4882a593Smuzhiyun }; 437*4882a593Smuzhiyun 438*4882a593Smuzhiyun wm8731: wm8731@1a { 439*4882a593Smuzhiyun #sound-dai-cells = <0>; 440*4882a593Smuzhiyun compatible = "wlf,wm8731"; 441*4882a593Smuzhiyun reg = <0x1a>; 442*4882a593Smuzhiyun status = "okay"; 443*4882a593Smuzhiyun }; 444*4882a593Smuzhiyun}; 445*4882a593Smuzhiyun 446*4882a593Smuzhiyun&cpu0 { 447*4882a593Smuzhiyun cpu0-supply = <&smps12_reg>; 448*4882a593Smuzhiyun voltage-tolerance = <1>; 449*4882a593Smuzhiyun}; 450*4882a593Smuzhiyun 451*4882a593Smuzhiyun&sata { 452*4882a593Smuzhiyun status = "okay"; 453*4882a593Smuzhiyun}; 454*4882a593Smuzhiyun 455*4882a593Smuzhiyun&mailbox5 { 456*4882a593Smuzhiyun status = "okay"; 457*4882a593Smuzhiyun mbox_ipu1_ipc3x: mbox-ipu1-ipc3x { 458*4882a593Smuzhiyun status = "okay"; 459*4882a593Smuzhiyun }; 460*4882a593Smuzhiyun mbox_dsp1_ipc3x: mbox-dsp1-ipc3x { 461*4882a593Smuzhiyun status = "okay"; 462*4882a593Smuzhiyun }; 463*4882a593Smuzhiyun}; 464*4882a593Smuzhiyun 465*4882a593Smuzhiyun&mailbox6 { 466*4882a593Smuzhiyun status = "okay"; 467*4882a593Smuzhiyun mbox_ipu2_ipc3x: mbox-ipu2-ipc3x { 468*4882a593Smuzhiyun status = "okay"; 469*4882a593Smuzhiyun }; 470*4882a593Smuzhiyun mbox_dsp2_ipc3x: mbox-dsp2-ipc3x { 471*4882a593Smuzhiyun status = "okay"; 472*4882a593Smuzhiyun }; 473*4882a593Smuzhiyun}; 474*4882a593Smuzhiyun 475*4882a593Smuzhiyun&mmc2 { 476*4882a593Smuzhiyun status = "okay"; 477*4882a593Smuzhiyun 478*4882a593Smuzhiyun pinctrl-names = "default"; 479*4882a593Smuzhiyun pinctrl-0 = <&mmc2_pins_default>; 480*4882a593Smuzhiyun 481*4882a593Smuzhiyun vmmc-supply = <&vdd_3v3>; 482*4882a593Smuzhiyun bus-width = <8>; 483*4882a593Smuzhiyun ti,non-removable; 484*4882a593Smuzhiyun cap-mmc-dual-data-rate; 485*4882a593Smuzhiyun}; 486*4882a593Smuzhiyun 487*4882a593Smuzhiyun&qspi { 488*4882a593Smuzhiyun status = "okay"; 489*4882a593Smuzhiyun pinctrl-names = "default"; 490*4882a593Smuzhiyun pinctrl-0 = <&qspi1_pins>; 491*4882a593Smuzhiyun 492*4882a593Smuzhiyun spi-max-frequency = <48000000>; 493*4882a593Smuzhiyun 494*4882a593Smuzhiyun spi_flash: spi_flash@0 { 495*4882a593Smuzhiyun #address-cells = <1>; 496*4882a593Smuzhiyun #size-cells = <1>; 497*4882a593Smuzhiyun compatible = "spansion,m25p80", "jedec,spi-nor"; 498*4882a593Smuzhiyun reg = <0>; /* CS0 */ 499*4882a593Smuzhiyun spi-max-frequency = <48000000>; 500*4882a593Smuzhiyun 501*4882a593Smuzhiyun partition@0 { 502*4882a593Smuzhiyun label = "uboot"; 503*4882a593Smuzhiyun reg = <0x0 0xc0000>; 504*4882a593Smuzhiyun }; 505*4882a593Smuzhiyun 506*4882a593Smuzhiyun partition@c0000 { 507*4882a593Smuzhiyun label = "uboot environment"; 508*4882a593Smuzhiyun reg = <0xc0000 0x40000>; 509*4882a593Smuzhiyun }; 510*4882a593Smuzhiyun 511*4882a593Smuzhiyun partition@100000 { 512*4882a593Smuzhiyun label = "reserved"; 513*4882a593Smuzhiyun reg = <0x100000 0x0>; 514*4882a593Smuzhiyun }; 515*4882a593Smuzhiyun }; 516*4882a593Smuzhiyun 517*4882a593Smuzhiyun /* touch controller */ 518*4882a593Smuzhiyun touchscreen@1 { 519*4882a593Smuzhiyun pinctrl-names = "default"; 520*4882a593Smuzhiyun pinctrl-0 = <&ads7846_pins>; 521*4882a593Smuzhiyun 522*4882a593Smuzhiyun compatible = "ti,ads7846"; 523*4882a593Smuzhiyun vcc-supply = <&ads7846reg>; 524*4882a593Smuzhiyun 525*4882a593Smuzhiyun reg = <1>; /* CS1 */ 526*4882a593Smuzhiyun spi-max-frequency = <1500000>; 527*4882a593Smuzhiyun 528*4882a593Smuzhiyun interrupt-parent = <&gpio1>; 529*4882a593Smuzhiyun interrupts = <31 0>; 530*4882a593Smuzhiyun pendown-gpio = <&gpio1 31 0>; 531*4882a593Smuzhiyun 532*4882a593Smuzhiyun 533*4882a593Smuzhiyun ti,x-min = /bits/ 16 <0x0>; 534*4882a593Smuzhiyun ti,x-max = /bits/ 16 <0x0fff>; 535*4882a593Smuzhiyun ti,y-min = /bits/ 16 <0x0>; 536*4882a593Smuzhiyun ti,y-max = /bits/ 16 <0x0fff>; 537*4882a593Smuzhiyun 538*4882a593Smuzhiyun ti,x-plate-ohms = /bits/ 16 <180>; 539*4882a593Smuzhiyun ti,pressure-max = /bits/ 16 <255>; 540*4882a593Smuzhiyun 541*4882a593Smuzhiyun ti,debounce-max = /bits/ 16 <30>; 542*4882a593Smuzhiyun ti,debounce-tol = /bits/ 16 <10>; 543*4882a593Smuzhiyun ti,debounce-rep = /bits/ 16 <1>; 544*4882a593Smuzhiyun 545*4882a593Smuzhiyun wakeup-source; 546*4882a593Smuzhiyun }; 547*4882a593Smuzhiyun}; 548*4882a593Smuzhiyun 549*4882a593Smuzhiyun&mac_sw { 550*4882a593Smuzhiyun status = "okay"; 551*4882a593Smuzhiyun pinctrl-names = "default", "sleep"; 552*4882a593Smuzhiyun pinctrl-0 = <&cpsw_pins_default>; 553*4882a593Smuzhiyun pinctrl-1 = <&cpsw_pins_sleep>; 554*4882a593Smuzhiyun}; 555*4882a593Smuzhiyun 556*4882a593Smuzhiyun&cpsw_port1 { 557*4882a593Smuzhiyun phy-handle = <ðphy0>; 558*4882a593Smuzhiyun phy-mode = "rgmii-txid"; 559*4882a593Smuzhiyun ti,dual-emac-pvid = <1>; 560*4882a593Smuzhiyun}; 561*4882a593Smuzhiyun 562*4882a593Smuzhiyun&cpsw_port2 { 563*4882a593Smuzhiyun phy-handle = <ðphy1>; 564*4882a593Smuzhiyun phy-mode = "rgmii-txid"; 565*4882a593Smuzhiyun ti,dual-emac-pvid = <2>; 566*4882a593Smuzhiyun}; 567*4882a593Smuzhiyun 568*4882a593Smuzhiyun&davinci_mdio_sw { 569*4882a593Smuzhiyun pinctrl-names = "default", "sleep"; 570*4882a593Smuzhiyun pinctrl-0 = <&davinci_mdio_pins_default>; 571*4882a593Smuzhiyun pinctrl-1 = <&davinci_mdio_pins_sleep>; 572*4882a593Smuzhiyun 573*4882a593Smuzhiyun ethphy0: ethernet-phy@0 { 574*4882a593Smuzhiyun reg = <0>; 575*4882a593Smuzhiyun }; 576*4882a593Smuzhiyun 577*4882a593Smuzhiyun ethphy1: ethernet-phy@1 { 578*4882a593Smuzhiyun reg = <1>; 579*4882a593Smuzhiyun }; 580*4882a593Smuzhiyun}; 581*4882a593Smuzhiyun 582*4882a593Smuzhiyun&usb2_phy1 { 583*4882a593Smuzhiyun phy-supply = <&ldousb_reg>; 584*4882a593Smuzhiyun}; 585*4882a593Smuzhiyun 586*4882a593Smuzhiyun&usb2_phy2 { 587*4882a593Smuzhiyun phy-supply = <&ldousb_reg>; 588*4882a593Smuzhiyun}; 589*4882a593Smuzhiyun 590*4882a593Smuzhiyun&usb1 { 591*4882a593Smuzhiyun dr_mode = "host"; 592*4882a593Smuzhiyun}; 593*4882a593Smuzhiyun 594*4882a593Smuzhiyun&usb2 { 595*4882a593Smuzhiyun dr_mode = "host"; 596*4882a593Smuzhiyun}; 597*4882a593Smuzhiyun 598*4882a593Smuzhiyun&mcasp3 { 599*4882a593Smuzhiyun #sound-dai-cells = <0>; 600*4882a593Smuzhiyun pinctrl-names = "default", "sleep"; 601*4882a593Smuzhiyun pinctrl-0 = <&mcasp3_pins_default>; 602*4882a593Smuzhiyun pinctrl-1 = <&mcasp3_pins_sleep>; 603*4882a593Smuzhiyun status = "okay"; 604*4882a593Smuzhiyun 605*4882a593Smuzhiyun op-mode = <0>; /* MCASP_IIS_MODE */ 606*4882a593Smuzhiyun tdm-slots = <2>; 607*4882a593Smuzhiyun /* 4 serializers */ 608*4882a593Smuzhiyun serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */ 609*4882a593Smuzhiyun 1 2 0 0 610*4882a593Smuzhiyun >; 611*4882a593Smuzhiyun}; 612*4882a593Smuzhiyun 613*4882a593Smuzhiyun&gpio3_target { 614*4882a593Smuzhiyun ti,no-reset-on-init; 615*4882a593Smuzhiyun}; 616*4882a593Smuzhiyun 617*4882a593Smuzhiyun&gpio2_target { 618*4882a593Smuzhiyun status = "okay"; 619*4882a593Smuzhiyun ti,no-reset-on-init; 620*4882a593Smuzhiyun}; 621