xref: /OK3568_Linux_fs/kernel/scripts/dtc/include-prefixes/arm/am437x-cm-t43.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Copyright (C) 2015 CompuLab, Ltd. - http://www.compulab.co.il/
4*4882a593Smuzhiyun */
5*4882a593Smuzhiyun
6*4882a593Smuzhiyun/dts-v1/;
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun#include <dt-bindings/pinctrl/am43xx.h>
9*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h>
10*4882a593Smuzhiyun#include <dt-bindings/interrupt-controller/irq.h>
11*4882a593Smuzhiyun#include "am4372.dtsi"
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun/ {
14*4882a593Smuzhiyun	model = "CompuLab CM-T43";
15*4882a593Smuzhiyun	compatible = "compulab,am437x-cm-t43", "ti,am4372", "ti,am43";
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun	leds {
18*4882a593Smuzhiyun		compatible = "gpio-leds";
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun		ledb {
21*4882a593Smuzhiyun			label = "cm-t43:green";
22*4882a593Smuzhiyun			gpios = <&gpio0 24 GPIO_ACTIVE_HIGH>;
23*4882a593Smuzhiyun			linux,default-trigger = "heartbeat";
24*4882a593Smuzhiyun		};
25*4882a593Smuzhiyun	};
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun	vmmc_3v3: fixedregulator-v3_3 {
28*4882a593Smuzhiyun		compatible = "regulator-fixed";
29*4882a593Smuzhiyun		regulator-name = "vmmc_3v3";
30*4882a593Smuzhiyun		regulator-min-microvolt = <3300000>;
31*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
32*4882a593Smuzhiyun		regulator-always-on;
33*4882a593Smuzhiyun		enable-active-high;
34*4882a593Smuzhiyun	};
35*4882a593Smuzhiyun};
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun&am43xx_pinmux {
38*4882a593Smuzhiyun	pinctrl-names = "default";
39*4882a593Smuzhiyun	pinctrl-0 = <&cm_t43_led_pins>;
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun	cm_t43_led_pins: cm_t43_led_pins {
42*4882a593Smuzhiyun		pinctrl-single,pins = <
43*4882a593Smuzhiyun			AM4372_IOPAD(0xa78, MUX_MODE7)
44*4882a593Smuzhiyun		>;
45*4882a593Smuzhiyun	};
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun	i2c0_pins: i2c0_pins {
48*4882a593Smuzhiyun		pinctrl-single,pins = <
49*4882a593Smuzhiyun			AM4372_IOPAD(0x988, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)  /* i2c0_sda.i2c0_sda */
50*4882a593Smuzhiyun			AM4372_IOPAD(0x98c, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)  /* i2c0_scl.i2c0_scl */
51*4882a593Smuzhiyun		>;
52*4882a593Smuzhiyun	};
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun	emmc_pins: emmc_pins {
55*4882a593Smuzhiyun		pinctrl-single,pins = <
56*4882a593Smuzhiyun			AM4372_IOPAD(0x820, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_ad8.mmc1_dat0 */
57*4882a593Smuzhiyun			AM4372_IOPAD(0x824, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_ad9.mmc1_dat1 */
58*4882a593Smuzhiyun			AM4372_IOPAD(0x828, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_ad10.mmc1_dat2 */
59*4882a593Smuzhiyun			AM4372_IOPAD(0x82c, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_ad11.mmc1_dat3 */
60*4882a593Smuzhiyun			AM4372_IOPAD(0x830, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_ad12.mmc1_dat4 */
61*4882a593Smuzhiyun			AM4372_IOPAD(0x834, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_ad13.mmc1_dat5 */
62*4882a593Smuzhiyun			AM4372_IOPAD(0x838, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_ad14.mmc1_dat6 */
63*4882a593Smuzhiyun			AM4372_IOPAD(0x83c, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_ad15.mmc1_dat7 */
64*4882a593Smuzhiyun			AM4372_IOPAD(0x880, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */
65*4882a593Smuzhiyun			AM4372_IOPAD(0x884, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
66*4882a593Smuzhiyun		>;
67*4882a593Smuzhiyun	};
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun	spi0_pins: pinmux_spi0_pins {
70*4882a593Smuzhiyun		pinctrl-single,pins = <
71*4882a593Smuzhiyun			AM4372_IOPAD(0x950, PIN_INPUT | MUX_MODE0) /* spi0_sclk.spi0_sclk */
72*4882a593Smuzhiyun			AM4372_IOPAD(0x954, PIN_INPUT | MUX_MODE0) /* spi0_d0.spi0_d0 */
73*4882a593Smuzhiyun			AM4372_IOPAD(0x958, PIN_OUTPUT | MUX_MODE0) /* spi0_d1.spi0_d1 */
74*4882a593Smuzhiyun			AM4372_IOPAD(0x95C, PIN_OUTPUT | MUX_MODE0) /* spi0_cs0.spi0_cs0 */
75*4882a593Smuzhiyun		>;
76*4882a593Smuzhiyun	};
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun	nand_flash_x8: nand_flash_x8 {
79*4882a593Smuzhiyun		pinctrl-single,pins = <
80*4882a593Smuzhiyun			AM4372_IOPAD(0x800, PIN_INPUT | PULL_DISABLE | MUX_MODE0)
81*4882a593Smuzhiyun			AM4372_IOPAD(0x804, PIN_INPUT | PULL_DISABLE | MUX_MODE0)
82*4882a593Smuzhiyun			AM4372_IOPAD(0x808, PIN_INPUT | PULL_DISABLE | MUX_MODE0)
83*4882a593Smuzhiyun			AM4372_IOPAD(0x80c, PIN_INPUT | PULL_DISABLE | MUX_MODE0)
84*4882a593Smuzhiyun			AM4372_IOPAD(0x810, PIN_INPUT | PULL_DISABLE | MUX_MODE0)
85*4882a593Smuzhiyun			AM4372_IOPAD(0x814, PIN_INPUT | PULL_DISABLE | MUX_MODE0)
86*4882a593Smuzhiyun			AM4372_IOPAD(0x818, PIN_INPUT | PULL_DISABLE | MUX_MODE0)
87*4882a593Smuzhiyun			AM4372_IOPAD(0x81c, PIN_INPUT | PULL_DISABLE | MUX_MODE0)
88*4882a593Smuzhiyun			AM4372_IOPAD(0x870, PIN_INPUT_PULLUP  | MUX_MODE0)
89*4882a593Smuzhiyun			AM4372_IOPAD(0x874, PIN_OUTPUT_PULLUP | MUX_MODE0)
90*4882a593Smuzhiyun			AM4372_IOPAD(0x87c, PIN_OUTPUT_PULLUP | MUX_MODE0)
91*4882a593Smuzhiyun			AM4372_IOPAD(0x898, PIN_OUTPUT_PULLDOWN | MUX_MODE0)
92*4882a593Smuzhiyun			AM4372_IOPAD(0x894, PIN_OUTPUT_PULLDOWN | MUX_MODE0)
93*4882a593Smuzhiyun			AM4372_IOPAD(0x890, PIN_OUTPUT_PULLDOWN | MUX_MODE0)
94*4882a593Smuzhiyun			AM4372_IOPAD(0x89c, PIN_OUTPUT_PULLDOWN | MUX_MODE0)
95*4882a593Smuzhiyun		>;
96*4882a593Smuzhiyun	};
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun	cpsw_default: cpsw_default {
99*4882a593Smuzhiyun		pinctrl-single,pins = <
100*4882a593Smuzhiyun			/* Slave 1 */
101*4882a593Smuzhiyun			AM4372_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txen.rgmii1_txen */
102*4882a593Smuzhiyun			AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxdv.rgmii1_rxctl */
103*4882a593Smuzhiyun			AM4372_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd1.rgmii1_txd3 */
104*4882a593Smuzhiyun			AM4372_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd0.rgmii1_txd2 */
105*4882a593Smuzhiyun			AM4372_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd1.rgmii1_txd1 */
106*4882a593Smuzhiyun			AM4372_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd0.rgmii1_txd0 */
107*4882a593Smuzhiyun			AM4372_IOPAD(0x92c, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txclk.rmii1_tclk */
108*4882a593Smuzhiyun			AM4372_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxclk.rmii1_rclk */
109*4882a593Smuzhiyun			AM4372_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxd1.rgmii1_rxd3 */
110*4882a593Smuzhiyun			AM4372_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxd0.rgmii1_rxd2 */
111*4882a593Smuzhiyun			AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxd1.rgmii1_rxd1 */
112*4882a593Smuzhiyun			AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxd0.rgmii1_rxd0 */
113*4882a593Smuzhiyun			AM4372_IOPAD(0xa74, MUX_MODE3)
114*4882a593Smuzhiyun			/* Slave 2 */
115*4882a593Smuzhiyun			AM4372_IOPAD(0x840, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a0.txen */
116*4882a593Smuzhiyun			AM4372_IOPAD(0x844, PIN_INPUT_PULLDOWN  | MUX_MODE2)	/* gpmc_a1.rxctl */
117*4882a593Smuzhiyun			AM4372_IOPAD(0x848, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a2.txd3 */
118*4882a593Smuzhiyun			AM4372_IOPAD(0x84c, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a3.txd2 */
119*4882a593Smuzhiyun			AM4372_IOPAD(0x850, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a4.txd1 */
120*4882a593Smuzhiyun			AM4372_IOPAD(0x854, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a5.txd0 */
121*4882a593Smuzhiyun			AM4372_IOPAD(0x858, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a6.tclk */
122*4882a593Smuzhiyun			AM4372_IOPAD(0x85c, PIN_INPUT_PULLDOWN  | MUX_MODE2)	/* gpmc_a7.rclk */
123*4882a593Smuzhiyun			AM4372_IOPAD(0x860, PIN_INPUT_PULLDOWN  | MUX_MODE2)	/* gpmc_a8.rxd3 */
124*4882a593Smuzhiyun			AM4372_IOPAD(0x864, PIN_INPUT_PULLDOWN  | MUX_MODE2)	/* gpmc_a9.rxd2 */
125*4882a593Smuzhiyun			AM4372_IOPAD(0x868, PIN_INPUT_PULLDOWN  | MUX_MODE2)	/* gpmc_a10.rxd1 */
126*4882a593Smuzhiyun			AM4372_IOPAD(0x86c, PIN_INPUT_PULLDOWN  | MUX_MODE2)	/* gpmc_a11.rxd0 */
127*4882a593Smuzhiyun			AM4372_IOPAD(0xa38, MUX_MODE7)
128*4882a593Smuzhiyun		>;
129*4882a593Smuzhiyun	};
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun	davinci_mdio_default: davinci_mdio_default {
132*4882a593Smuzhiyun		pinctrl-single,pins = <
133*4882a593Smuzhiyun			/* MDIO */
134*4882a593Smuzhiyun			AM4372_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)	/* mdio_data.mdio_data */
135*4882a593Smuzhiyun			AM4372_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0)			/* mdio_clk.mdio_clk */
136*4882a593Smuzhiyun		>;
137*4882a593Smuzhiyun	};
138*4882a593Smuzhiyun};
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun&gpmc {
141*4882a593Smuzhiyun	status = "okay";
142*4882a593Smuzhiyun	pinctrl-names = "default";
143*4882a593Smuzhiyun	pinctrl-0 = <&nand_flash_x8>;
144*4882a593Smuzhiyun	ranges = <0 0 0x08000000 0x1000000>;
145*4882a593Smuzhiyun	nand@0,0 {
146*4882a593Smuzhiyun		compatible = "ti,omap2-nand";
147*4882a593Smuzhiyun		reg = <0 0 4>;		/* CS0, offset 0, IO size 4 */
148*4882a593Smuzhiyun		interrupt-parent = <&gpmc>;
149*4882a593Smuzhiyun		interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
150*4882a593Smuzhiyun			     <1 IRQ_TYPE_NONE>;	/* termcount */
151*4882a593Smuzhiyun		ti,nand-ecc-opt = "bch8";
152*4882a593Smuzhiyun		ti,elm-id = <&elm>;
153*4882a593Smuzhiyun
154*4882a593Smuzhiyun		nand-bus-width = <8>;
155*4882a593Smuzhiyun		gpmc,device-width = <1>;
156*4882a593Smuzhiyun		gpmc,sync-clk-ps = <0>;
157*4882a593Smuzhiyun		gpmc,cs-on-ns = <0>;
158*4882a593Smuzhiyun		gpmc,cs-rd-off-ns = <44>;
159*4882a593Smuzhiyun		gpmc,cs-wr-off-ns = <44>;
160*4882a593Smuzhiyun		gpmc,adv-on-ns = <6>;
161*4882a593Smuzhiyun		gpmc,adv-rd-off-ns = <34>;
162*4882a593Smuzhiyun		gpmc,adv-wr-off-ns = <44>;
163*4882a593Smuzhiyun		gpmc,we-on-ns = <0>;
164*4882a593Smuzhiyun		gpmc,we-off-ns = <40>;
165*4882a593Smuzhiyun		gpmc,oe-on-ns = <0>;
166*4882a593Smuzhiyun		gpmc,oe-off-ns = <54>;
167*4882a593Smuzhiyun		gpmc,access-ns = <64>;
168*4882a593Smuzhiyun		gpmc,rd-cycle-ns = <82>;
169*4882a593Smuzhiyun		gpmc,wr-cycle-ns = <82>;
170*4882a593Smuzhiyun		gpmc,bus-turnaround-ns = <0>;
171*4882a593Smuzhiyun		gpmc,cycle2cycle-delay-ns = <0>;
172*4882a593Smuzhiyun		gpmc,clk-activation-ns = <0>;
173*4882a593Smuzhiyun		gpmc,wr-access-ns = <40>;
174*4882a593Smuzhiyun		gpmc,wr-data-mux-bus-ns = <0>;
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun		#address-cells = <1>;
177*4882a593Smuzhiyun		#size-cells = <1>;
178*4882a593Smuzhiyun		/* MTD partition table */
179*4882a593Smuzhiyun		partition@0 {
180*4882a593Smuzhiyun			label = "kernel";
181*4882a593Smuzhiyun			reg = <0x0 0x00980000>;
182*4882a593Smuzhiyun		};
183*4882a593Smuzhiyun		partition@980000 {
184*4882a593Smuzhiyun			label = "dtb";
185*4882a593Smuzhiyun			reg = <0x00980000 0x00080000>;
186*4882a593Smuzhiyun		};
187*4882a593Smuzhiyun		partition@a00000 {
188*4882a593Smuzhiyun			label = "rootfs";
189*4882a593Smuzhiyun			reg = <0x00a00000 0x0>;
190*4882a593Smuzhiyun		};
191*4882a593Smuzhiyun	};
192*4882a593Smuzhiyun};
193*4882a593Smuzhiyun
194*4882a593Smuzhiyun&i2c0 {
195*4882a593Smuzhiyun	status = "okay";
196*4882a593Smuzhiyun	pinctrl-names = "default";
197*4882a593Smuzhiyun	pinctrl-0 = <&i2c0_pins>;
198*4882a593Smuzhiyun	clock-frequency = <100000>;
199*4882a593Smuzhiyun
200*4882a593Smuzhiyun	tps65218: tps65218@24 {
201*4882a593Smuzhiyun		compatible = "ti,tps65218";
202*4882a593Smuzhiyun		reg = <0x24>;
203*4882a593Smuzhiyun		interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; /* NMIn */
204*4882a593Smuzhiyun		interrupt-parent = <&gic>;
205*4882a593Smuzhiyun		interrupt-controller;
206*4882a593Smuzhiyun		#interrupt-cells = <2>;
207*4882a593Smuzhiyun
208*4882a593Smuzhiyun		dcdc1: regulator-dcdc1 {
209*4882a593Smuzhiyun			regulator-name = "vdd_core";
210*4882a593Smuzhiyun			regulator-min-microvolt = <912000>;
211*4882a593Smuzhiyun			regulator-max-microvolt = <1144000>;
212*4882a593Smuzhiyun			regulator-boot-on;
213*4882a593Smuzhiyun			regulator-always-on;
214*4882a593Smuzhiyun		};
215*4882a593Smuzhiyun
216*4882a593Smuzhiyun		dcdc2: regulator-dcdc2 {
217*4882a593Smuzhiyun			regulator-name = "vdd_mpu";
218*4882a593Smuzhiyun			regulator-min-microvolt = <912000>;
219*4882a593Smuzhiyun			regulator-max-microvolt = <1378000>;
220*4882a593Smuzhiyun			regulator-boot-on;
221*4882a593Smuzhiyun			regulator-always-on;
222*4882a593Smuzhiyun		};
223*4882a593Smuzhiyun
224*4882a593Smuzhiyun		dcdc3: regulator-dcdc3 {
225*4882a593Smuzhiyun			regulator-name = "vdcdc3";
226*4882a593Smuzhiyun			regulator-suspend-enable;
227*4882a593Smuzhiyun			regulator-min-microvolt = <1500000>;
228*4882a593Smuzhiyun			regulator-max-microvolt = <1500000>;
229*4882a593Smuzhiyun			regulator-boot-on;
230*4882a593Smuzhiyun			regulator-always-on;
231*4882a593Smuzhiyun		};
232*4882a593Smuzhiyun
233*4882a593Smuzhiyun		dcdc5: regulator-dcdc5 {
234*4882a593Smuzhiyun			regulator-name = "v1_0bat";
235*4882a593Smuzhiyun			regulator-min-microvolt = <1000000>;
236*4882a593Smuzhiyun			regulator-max-microvolt = <1000000>;
237*4882a593Smuzhiyun			regulator-boot-on;
238*4882a593Smuzhiyun			regulator-always-on;
239*4882a593Smuzhiyun		};
240*4882a593Smuzhiyun
241*4882a593Smuzhiyun		dcdc6: regulator-dcdc6 {
242*4882a593Smuzhiyun			regulator-name = "v1_8bat";
243*4882a593Smuzhiyun			regulator-min-microvolt = <1800000>;
244*4882a593Smuzhiyun			regulator-max-microvolt = <1800000>;
245*4882a593Smuzhiyun			regulator-boot-on;
246*4882a593Smuzhiyun			regulator-always-on;
247*4882a593Smuzhiyun		};
248*4882a593Smuzhiyun
249*4882a593Smuzhiyun		ldo1: regulator-ldo1 {
250*4882a593Smuzhiyun			regulator-min-microvolt = <1800000>;
251*4882a593Smuzhiyun			regulator-max-microvolt = <1800000>;
252*4882a593Smuzhiyun			regulator-boot-on;
253*4882a593Smuzhiyun			regulator-always-on;
254*4882a593Smuzhiyun		};
255*4882a593Smuzhiyun	};
256*4882a593Smuzhiyun
257*4882a593Smuzhiyun	eeprom_module: at24@50 {
258*4882a593Smuzhiyun		compatible = "atmel,24c02";
259*4882a593Smuzhiyun		reg = <0x50>;
260*4882a593Smuzhiyun		pagesize = <16>;
261*4882a593Smuzhiyun	};
262*4882a593Smuzhiyun};
263*4882a593Smuzhiyun
264*4882a593Smuzhiyun&gpio0 {
265*4882a593Smuzhiyun	status = "okay";
266*4882a593Smuzhiyun};
267*4882a593Smuzhiyun
268*4882a593Smuzhiyun&gpio1 {
269*4882a593Smuzhiyun	status = "okay";
270*4882a593Smuzhiyun};
271*4882a593Smuzhiyun
272*4882a593Smuzhiyun&gpio2 {
273*4882a593Smuzhiyun	status = "okay";
274*4882a593Smuzhiyun};
275*4882a593Smuzhiyun
276*4882a593Smuzhiyun&gpio3 {
277*4882a593Smuzhiyun	status = "okay";
278*4882a593Smuzhiyun};
279*4882a593Smuzhiyun
280*4882a593Smuzhiyun&gpio4 {
281*4882a593Smuzhiyun	status = "okay";
282*4882a593Smuzhiyun};
283*4882a593Smuzhiyun
284*4882a593Smuzhiyun&gpio5 {
285*4882a593Smuzhiyun	status = "okay";
286*4882a593Smuzhiyun};
287*4882a593Smuzhiyun
288*4882a593Smuzhiyun&mmc2 {
289*4882a593Smuzhiyun	status = "okay";
290*4882a593Smuzhiyun	pinctrl-names = "default";
291*4882a593Smuzhiyun	pinctrl-0 = <&emmc_pins>;
292*4882a593Smuzhiyun	vmmc-supply = <&vmmc_3v3>;
293*4882a593Smuzhiyun	bus-width = <8>;
294*4882a593Smuzhiyun	non-removable;
295*4882a593Smuzhiyun};
296*4882a593Smuzhiyun
297*4882a593Smuzhiyun&spi0 {
298*4882a593Smuzhiyun	status = "okay";
299*4882a593Smuzhiyun	pinctrl-names = "default";
300*4882a593Smuzhiyun	pinctrl-0 = <&spi0_pins>;
301*4882a593Smuzhiyun	dmas = <&edma 16 0
302*4882a593Smuzhiyun		&edma 17 0>;
303*4882a593Smuzhiyun	dma-names = "tx0", "rx0";
304*4882a593Smuzhiyun
305*4882a593Smuzhiyun	flash: w25q64cvzpig@0 {
306*4882a593Smuzhiyun		#address-cells = <1>;
307*4882a593Smuzhiyun		#size-cells = <1>;
308*4882a593Smuzhiyun		compatible = "jedec,spi-nor";
309*4882a593Smuzhiyun		reg = <0>;
310*4882a593Smuzhiyun		spi-max-frequency = <20000000>;
311*4882a593Smuzhiyun		partition@0 {
312*4882a593Smuzhiyun			label = "uboot";
313*4882a593Smuzhiyun			reg = <0x0 0xc0000>;
314*4882a593Smuzhiyun		};
315*4882a593Smuzhiyun
316*4882a593Smuzhiyun		partition@c0000 {
317*4882a593Smuzhiyun			label = "uboot environment";
318*4882a593Smuzhiyun			reg = <0xc0000 0x40000>;
319*4882a593Smuzhiyun		};
320*4882a593Smuzhiyun
321*4882a593Smuzhiyun		partition@100000 {
322*4882a593Smuzhiyun			label = "reserved";
323*4882a593Smuzhiyun			reg = <0x100000 0x100000>;
324*4882a593Smuzhiyun		};
325*4882a593Smuzhiyun	};
326*4882a593Smuzhiyun};
327*4882a593Smuzhiyun
328*4882a593Smuzhiyun&mac_sw {
329*4882a593Smuzhiyun	pinctrl-names = "default";
330*4882a593Smuzhiyun	pinctrl-0 = <&cpsw_default>;
331*4882a593Smuzhiyun	status = "okay";
332*4882a593Smuzhiyun};
333*4882a593Smuzhiyun
334*4882a593Smuzhiyun&davinci_mdio_sw {
335*4882a593Smuzhiyun	pinctrl-names = "default";
336*4882a593Smuzhiyun	pinctrl-0 = <&davinci_mdio_default>;
337*4882a593Smuzhiyun
338*4882a593Smuzhiyun	ethphy0: ethernet-phy@0 {
339*4882a593Smuzhiyun		reg = <0>;
340*4882a593Smuzhiyun	};
341*4882a593Smuzhiyun
342*4882a593Smuzhiyun	ethphy1: ethernet-phy@1 {
343*4882a593Smuzhiyun		reg = <1>;
344*4882a593Smuzhiyun	};
345*4882a593Smuzhiyun};
346*4882a593Smuzhiyun
347*4882a593Smuzhiyun&cpsw_port1 {
348*4882a593Smuzhiyun	phy-handle = <&ethphy0>;
349*4882a593Smuzhiyun	phy-mode = "rgmii-txid";
350*4882a593Smuzhiyun	ti,dual-emac-pvid = <1>;
351*4882a593Smuzhiyun};
352*4882a593Smuzhiyun
353*4882a593Smuzhiyun&cpsw_port2 {
354*4882a593Smuzhiyun	phy-handle = <&ethphy1>;
355*4882a593Smuzhiyun	phy-mode = "rgmii-txid";
356*4882a593Smuzhiyun	ti,dual-emac-pvid = <2>;
357*4882a593Smuzhiyun};
358*4882a593Smuzhiyun
359*4882a593Smuzhiyun&dwc3_1 {
360*4882a593Smuzhiyun	status = "okay";
361*4882a593Smuzhiyun};
362*4882a593Smuzhiyun
363*4882a593Smuzhiyun&usb2_phy1 {
364*4882a593Smuzhiyun	status = "okay";
365*4882a593Smuzhiyun};
366*4882a593Smuzhiyun
367*4882a593Smuzhiyun&usb1 {
368*4882a593Smuzhiyun	dr_mode = "host";
369*4882a593Smuzhiyun	status = "okay";
370*4882a593Smuzhiyun};
371*4882a593Smuzhiyun
372*4882a593Smuzhiyun&dwc3_2 {
373*4882a593Smuzhiyun	status = "okay";
374*4882a593Smuzhiyun};
375*4882a593Smuzhiyun
376*4882a593Smuzhiyun&usb2_phy2 {
377*4882a593Smuzhiyun	status = "okay";
378*4882a593Smuzhiyun};
379*4882a593Smuzhiyun
380*4882a593Smuzhiyun&usb2 {
381*4882a593Smuzhiyun	dr_mode = "host";
382*4882a593Smuzhiyun	status = "okay";
383*4882a593Smuzhiyun	interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>,
384*4882a593Smuzhiyun		     <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>,
385*4882a593Smuzhiyun		     <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
386*4882a593Smuzhiyun	interrupt-names = "peripheral", "host", "otg";
387*4882a593Smuzhiyun};
388*4882a593Smuzhiyun
389*4882a593Smuzhiyun&elm {
390*4882a593Smuzhiyun	status = "okay";
391*4882a593Smuzhiyun};
392*4882a593Smuzhiyun
393*4882a593Smuzhiyun&uart0 {
394*4882a593Smuzhiyun	status = "okay";
395*4882a593Smuzhiyun};
396*4882a593Smuzhiyun
397*4882a593Smuzhiyun&tscadc {
398*4882a593Smuzhiyun	status = "okay";
399*4882a593Smuzhiyun	tsc {
400*4882a593Smuzhiyun		ti,wires = <4>;
401*4882a593Smuzhiyun		ti,x-plate-resistance = <200>;
402*4882a593Smuzhiyun		ti,coordiante-readouts = <5>;
403*4882a593Smuzhiyun		ti,wire-config = <0x00 0x11 0x22 0x33>;
404*4882a593Smuzhiyun	};
405*4882a593Smuzhiyun
406*4882a593Smuzhiyun	adc {
407*4882a593Smuzhiyun		ti,adc-channels = <4 5 6 7>;
408*4882a593Smuzhiyun	};
409*4882a593Smuzhiyun};
410*4882a593Smuzhiyun
411*4882a593Smuzhiyun&cpu {
412*4882a593Smuzhiyun	cpu0-supply = <&dcdc2>;
413*4882a593Smuzhiyun	operating-points = <1000000 1330000>,
414*4882a593Smuzhiyun			   <800000 1260000>,
415*4882a593Smuzhiyun			   <720000 1200000>,
416*4882a593Smuzhiyun			   <600000 1100000>,
417*4882a593Smuzhiyun			   <300000 950000>;
418*4882a593Smuzhiyun};
419