1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Permission is hereby granted, free of charge, to any person obtaining a copy 3*4882a593Smuzhiyun * of this software and associated documentation files (the "Software"), to 4*4882a593Smuzhiyun * deal in the Software without restriction, including without limitation the 5*4882a593Smuzhiyun * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or 6*4882a593Smuzhiyun * sell copies of the Software, and to permit persons to whom the Software is 7*4882a593Smuzhiyun * furnished to do so, subject to the following conditions: 8*4882a593Smuzhiyun * 9*4882a593Smuzhiyun * The above copyright notice and this permission notice shall be included in 10*4882a593Smuzhiyun * all copies or substantial portions of the Software. 11*4882a593Smuzhiyun * 12*4882a593Smuzhiyun * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 13*4882a593Smuzhiyun * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 14*4882a593Smuzhiyun * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 15*4882a593Smuzhiyun * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 16*4882a593Smuzhiyun * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 17*4882a593Smuzhiyun * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 18*4882a593Smuzhiyun * DEALINGS IN THE SOFTWARE. 19*4882a593Smuzhiyun * 20*4882a593Smuzhiyun * Copyright (c) 2015, Roger Pau Monne <roger.pau@citrix.com> 21*4882a593Smuzhiyun */ 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun #ifndef __XEN_PUBLIC_HVM_HVM_VCPU_H__ 24*4882a593Smuzhiyun #define __XEN_PUBLIC_HVM_HVM_VCPU_H__ 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun #include "../xen.h" 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun struct vcpu_hvm_x86_32 { 29*4882a593Smuzhiyun uint32_t eax; 30*4882a593Smuzhiyun uint32_t ecx; 31*4882a593Smuzhiyun uint32_t edx; 32*4882a593Smuzhiyun uint32_t ebx; 33*4882a593Smuzhiyun uint32_t esp; 34*4882a593Smuzhiyun uint32_t ebp; 35*4882a593Smuzhiyun uint32_t esi; 36*4882a593Smuzhiyun uint32_t edi; 37*4882a593Smuzhiyun uint32_t eip; 38*4882a593Smuzhiyun uint32_t eflags; 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun uint32_t cr0; 41*4882a593Smuzhiyun uint32_t cr3; 42*4882a593Smuzhiyun uint32_t cr4; 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun uint32_t pad1; 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun /* 47*4882a593Smuzhiyun * EFER should only be used to set the NXE bit (if required) 48*4882a593Smuzhiyun * when starting a vCPU in 32bit mode with paging enabled or 49*4882a593Smuzhiyun * to set the LME/LMA bits in order to start the vCPU in 50*4882a593Smuzhiyun * compatibility mode. 51*4882a593Smuzhiyun */ 52*4882a593Smuzhiyun uint64_t efer; 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun uint32_t cs_base; 55*4882a593Smuzhiyun uint32_t ds_base; 56*4882a593Smuzhiyun uint32_t ss_base; 57*4882a593Smuzhiyun uint32_t es_base; 58*4882a593Smuzhiyun uint32_t tr_base; 59*4882a593Smuzhiyun uint32_t cs_limit; 60*4882a593Smuzhiyun uint32_t ds_limit; 61*4882a593Smuzhiyun uint32_t ss_limit; 62*4882a593Smuzhiyun uint32_t es_limit; 63*4882a593Smuzhiyun uint32_t tr_limit; 64*4882a593Smuzhiyun uint16_t cs_ar; 65*4882a593Smuzhiyun uint16_t ds_ar; 66*4882a593Smuzhiyun uint16_t ss_ar; 67*4882a593Smuzhiyun uint16_t es_ar; 68*4882a593Smuzhiyun uint16_t tr_ar; 69*4882a593Smuzhiyun 70*4882a593Smuzhiyun uint16_t pad2[3]; 71*4882a593Smuzhiyun }; 72*4882a593Smuzhiyun 73*4882a593Smuzhiyun /* 74*4882a593Smuzhiyun * The layout of the _ar fields of the segment registers is the 75*4882a593Smuzhiyun * following: 76*4882a593Smuzhiyun * 77*4882a593Smuzhiyun * Bits [0,3]: type (bits 40-43). 78*4882a593Smuzhiyun * Bit 4: s (descriptor type, bit 44). 79*4882a593Smuzhiyun * Bit [5,6]: dpl (descriptor privilege level, bits 45-46). 80*4882a593Smuzhiyun * Bit 7: p (segment-present, bit 47). 81*4882a593Smuzhiyun * Bit 8: avl (available for system software, bit 52). 82*4882a593Smuzhiyun * Bit 9: l (64-bit code segment, bit 53). 83*4882a593Smuzhiyun * Bit 10: db (meaning depends on the segment, bit 54). 84*4882a593Smuzhiyun * Bit 11: g (granularity, bit 55) 85*4882a593Smuzhiyun * Bits [12,15]: unused, must be blank. 86*4882a593Smuzhiyun * 87*4882a593Smuzhiyun * A more complete description of the meaning of this fields can be 88*4882a593Smuzhiyun * obtained from the Intel SDM, Volume 3, section 3.4.5. 89*4882a593Smuzhiyun */ 90*4882a593Smuzhiyun 91*4882a593Smuzhiyun struct vcpu_hvm_x86_64 { 92*4882a593Smuzhiyun uint64_t rax; 93*4882a593Smuzhiyun uint64_t rcx; 94*4882a593Smuzhiyun uint64_t rdx; 95*4882a593Smuzhiyun uint64_t rbx; 96*4882a593Smuzhiyun uint64_t rsp; 97*4882a593Smuzhiyun uint64_t rbp; 98*4882a593Smuzhiyun uint64_t rsi; 99*4882a593Smuzhiyun uint64_t rdi; 100*4882a593Smuzhiyun uint64_t rip; 101*4882a593Smuzhiyun uint64_t rflags; 102*4882a593Smuzhiyun 103*4882a593Smuzhiyun uint64_t cr0; 104*4882a593Smuzhiyun uint64_t cr3; 105*4882a593Smuzhiyun uint64_t cr4; 106*4882a593Smuzhiyun uint64_t efer; 107*4882a593Smuzhiyun 108*4882a593Smuzhiyun /* 109*4882a593Smuzhiyun * Using VCPU_HVM_MODE_64B implies that the vCPU is launched 110*4882a593Smuzhiyun * directly in long mode, so the cached parts of the segment 111*4882a593Smuzhiyun * registers get set to match that environment. 112*4882a593Smuzhiyun * 113*4882a593Smuzhiyun * If the user wants to launch the vCPU in compatibility mode 114*4882a593Smuzhiyun * the 32-bit structure should be used instead. 115*4882a593Smuzhiyun */ 116*4882a593Smuzhiyun }; 117*4882a593Smuzhiyun 118*4882a593Smuzhiyun struct vcpu_hvm_context { 119*4882a593Smuzhiyun #define VCPU_HVM_MODE_32B 0 /* 32bit fields of the structure will be used. */ 120*4882a593Smuzhiyun #define VCPU_HVM_MODE_64B 1 /* 64bit fields of the structure will be used. */ 121*4882a593Smuzhiyun uint32_t mode; 122*4882a593Smuzhiyun 123*4882a593Smuzhiyun uint32_t pad; 124*4882a593Smuzhiyun 125*4882a593Smuzhiyun /* CPU registers. */ 126*4882a593Smuzhiyun union { 127*4882a593Smuzhiyun struct vcpu_hvm_x86_32 x86_32; 128*4882a593Smuzhiyun struct vcpu_hvm_x86_64 x86_64; 129*4882a593Smuzhiyun } cpu_regs; 130*4882a593Smuzhiyun }; 131*4882a593Smuzhiyun typedef struct vcpu_hvm_context vcpu_hvm_context_t; 132*4882a593Smuzhiyun 133*4882a593Smuzhiyun #endif /* __XEN_PUBLIC_HVM_HVM_VCPU_H__ */ 134*4882a593Smuzhiyun 135*4882a593Smuzhiyun /* 136*4882a593Smuzhiyun * Local variables: 137*4882a593Smuzhiyun * mode: C 138*4882a593Smuzhiyun * c-file-style: "BSD" 139*4882a593Smuzhiyun * c-basic-offset: 4 140*4882a593Smuzhiyun * tab-width: 4 141*4882a593Smuzhiyun * indent-tabs-mode: nil 142*4882a593Smuzhiyun * End: 143*4882a593Smuzhiyun */ 144