1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun #ifndef _UVESAFB_H 3*4882a593Smuzhiyun #define _UVESAFB_H 4*4882a593Smuzhiyun 5*4882a593Smuzhiyun #include <uapi/video/uvesafb.h> 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun /* VBE CRTC Info Block */ 9*4882a593Smuzhiyun struct vbe_crtc_ib { 10*4882a593Smuzhiyun u16 horiz_total; 11*4882a593Smuzhiyun u16 horiz_start; 12*4882a593Smuzhiyun u16 horiz_end; 13*4882a593Smuzhiyun u16 vert_total; 14*4882a593Smuzhiyun u16 vert_start; 15*4882a593Smuzhiyun u16 vert_end; 16*4882a593Smuzhiyun u8 flags; 17*4882a593Smuzhiyun u32 pixel_clock; 18*4882a593Smuzhiyun u16 refresh_rate; 19*4882a593Smuzhiyun u8 reserved[40]; 20*4882a593Smuzhiyun } __attribute__ ((packed)); 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun #define VBE_MODE_VGACOMPAT 0x20 23*4882a593Smuzhiyun #define VBE_MODE_COLOR 0x08 24*4882a593Smuzhiyun #define VBE_MODE_SUPPORTEDHW 0x01 25*4882a593Smuzhiyun #define VBE_MODE_GRAPHICS 0x10 26*4882a593Smuzhiyun #define VBE_MODE_LFB 0x80 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun #define VBE_MODE_MASK (VBE_MODE_COLOR | VBE_MODE_SUPPORTEDHW | \ 29*4882a593Smuzhiyun VBE_MODE_GRAPHICS | VBE_MODE_LFB) 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun /* VBE Mode Info Block */ 32*4882a593Smuzhiyun struct vbe_mode_ib { 33*4882a593Smuzhiyun /* for all VBE revisions */ 34*4882a593Smuzhiyun u16 mode_attr; 35*4882a593Smuzhiyun u8 winA_attr; 36*4882a593Smuzhiyun u8 winB_attr; 37*4882a593Smuzhiyun u16 win_granularity; 38*4882a593Smuzhiyun u16 win_size; 39*4882a593Smuzhiyun u16 winA_seg; 40*4882a593Smuzhiyun u16 winB_seg; 41*4882a593Smuzhiyun u32 win_func_ptr; 42*4882a593Smuzhiyun u16 bytes_per_scan_line; 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun /* for VBE 1.2+ */ 45*4882a593Smuzhiyun u16 x_res; 46*4882a593Smuzhiyun u16 y_res; 47*4882a593Smuzhiyun u8 x_char_size; 48*4882a593Smuzhiyun u8 y_char_size; 49*4882a593Smuzhiyun u8 planes; 50*4882a593Smuzhiyun u8 bits_per_pixel; 51*4882a593Smuzhiyun u8 banks; 52*4882a593Smuzhiyun u8 memory_model; 53*4882a593Smuzhiyun u8 bank_size; 54*4882a593Smuzhiyun u8 image_pages; 55*4882a593Smuzhiyun u8 reserved1; 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun /* Direct color fields for direct/6 and YUV/7 memory models. */ 58*4882a593Smuzhiyun /* Offsets are bit positions of lsb in the mask. */ 59*4882a593Smuzhiyun u8 red_len; 60*4882a593Smuzhiyun u8 red_off; 61*4882a593Smuzhiyun u8 green_len; 62*4882a593Smuzhiyun u8 green_off; 63*4882a593Smuzhiyun u8 blue_len; 64*4882a593Smuzhiyun u8 blue_off; 65*4882a593Smuzhiyun u8 rsvd_len; 66*4882a593Smuzhiyun u8 rsvd_off; 67*4882a593Smuzhiyun u8 direct_color_info; /* direct color mode attributes */ 68*4882a593Smuzhiyun 69*4882a593Smuzhiyun /* for VBE 2.0+ */ 70*4882a593Smuzhiyun u32 phys_base_ptr; 71*4882a593Smuzhiyun u8 reserved2[6]; 72*4882a593Smuzhiyun 73*4882a593Smuzhiyun /* for VBE 3.0+ */ 74*4882a593Smuzhiyun u16 lin_bytes_per_scan_line; 75*4882a593Smuzhiyun u8 bnk_image_pages; 76*4882a593Smuzhiyun u8 lin_image_pages; 77*4882a593Smuzhiyun u8 lin_red_len; 78*4882a593Smuzhiyun u8 lin_red_off; 79*4882a593Smuzhiyun u8 lin_green_len; 80*4882a593Smuzhiyun u8 lin_green_off; 81*4882a593Smuzhiyun u8 lin_blue_len; 82*4882a593Smuzhiyun u8 lin_blue_off; 83*4882a593Smuzhiyun u8 lin_rsvd_len; 84*4882a593Smuzhiyun u8 lin_rsvd_off; 85*4882a593Smuzhiyun u32 max_pixel_clock; 86*4882a593Smuzhiyun u16 mode_id; 87*4882a593Smuzhiyun u8 depth; 88*4882a593Smuzhiyun } __attribute__ ((packed)); 89*4882a593Smuzhiyun 90*4882a593Smuzhiyun #define UVESAFB_DEFAULT_MODE "640x480-16" 91*4882a593Smuzhiyun 92*4882a593Smuzhiyun /* How long to wait for a reply from userspace [ms] */ 93*4882a593Smuzhiyun #define UVESAFB_TIMEOUT 5000 94*4882a593Smuzhiyun 95*4882a593Smuzhiyun /* Max number of concurrent tasks */ 96*4882a593Smuzhiyun #define UVESAFB_TASKS_MAX 16 97*4882a593Smuzhiyun 98*4882a593Smuzhiyun #define dac_reg (0x3c8) 99*4882a593Smuzhiyun #define dac_val (0x3c9) 100*4882a593Smuzhiyun 101*4882a593Smuzhiyun struct uvesafb_pal_entry { 102*4882a593Smuzhiyun u_char blue, green, red, pad; 103*4882a593Smuzhiyun } __attribute__ ((packed)); 104*4882a593Smuzhiyun 105*4882a593Smuzhiyun struct uvesafb_ktask { 106*4882a593Smuzhiyun struct uvesafb_task t; 107*4882a593Smuzhiyun void *buf; 108*4882a593Smuzhiyun struct completion *done; 109*4882a593Smuzhiyun u32 ack; 110*4882a593Smuzhiyun }; 111*4882a593Smuzhiyun 112*4882a593Smuzhiyun static int uvesafb_exec(struct uvesafb_ktask *tsk); 113*4882a593Smuzhiyun 114*4882a593Smuzhiyun #define UVESAFB_EXACT_RES 1 115*4882a593Smuzhiyun #define UVESAFB_EXACT_DEPTH 2 116*4882a593Smuzhiyun 117*4882a593Smuzhiyun struct uvesafb_par { 118*4882a593Smuzhiyun struct vbe_ib vbe_ib; /* VBE Info Block */ 119*4882a593Smuzhiyun struct vbe_mode_ib *vbe_modes; /* list of supported VBE modes */ 120*4882a593Smuzhiyun int vbe_modes_cnt; 121*4882a593Smuzhiyun 122*4882a593Smuzhiyun u8 nocrtc; 123*4882a593Smuzhiyun u8 ypan; /* 0 - nothing, 1 - ypan, 2 - ywrap */ 124*4882a593Smuzhiyun u8 pmi_setpal; /* PMI for palette changes */ 125*4882a593Smuzhiyun u16 *pmi_base; /* protected mode interface location */ 126*4882a593Smuzhiyun void *pmi_start; 127*4882a593Smuzhiyun void *pmi_pal; 128*4882a593Smuzhiyun u8 *vbe_state_orig; /* 129*4882a593Smuzhiyun * original hardware state, before the 130*4882a593Smuzhiyun * driver was loaded 131*4882a593Smuzhiyun */ 132*4882a593Smuzhiyun u8 *vbe_state_saved; /* state saved by fb_save_state */ 133*4882a593Smuzhiyun int vbe_state_size; 134*4882a593Smuzhiyun atomic_t ref_count; 135*4882a593Smuzhiyun 136*4882a593Smuzhiyun int mode_idx; 137*4882a593Smuzhiyun struct vbe_crtc_ib crtc; 138*4882a593Smuzhiyun int mtrr_handle; 139*4882a593Smuzhiyun }; 140*4882a593Smuzhiyun 141*4882a593Smuzhiyun #endif /* _UVESAFB_H */ 142