1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * linux/include/video/neo_reg.h -- NeoMagic Framebuffer Driver 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Copyright (c) 2001 Denis Oliver Kropp <dok@convergence.de> 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * This file is subject to the terms and conditions of the GNU General 7*4882a593Smuzhiyun * Public License. See the file COPYING in the main directory of this 8*4882a593Smuzhiyun * archive for more details. 9*4882a593Smuzhiyun */ 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun #define NEO_BS0_BLT_BUSY 0x00000001 12*4882a593Smuzhiyun #define NEO_BS0_FIFO_AVAIL 0x00000002 13*4882a593Smuzhiyun #define NEO_BS0_FIFO_PEND 0x00000004 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun #define NEO_BC0_DST_Y_DEC 0x00000001 16*4882a593Smuzhiyun #define NEO_BC0_X_DEC 0x00000002 17*4882a593Smuzhiyun #define NEO_BC0_SRC_TRANS 0x00000004 18*4882a593Smuzhiyun #define NEO_BC0_SRC_IS_FG 0x00000008 19*4882a593Smuzhiyun #define NEO_BC0_SRC_Y_DEC 0x00000010 20*4882a593Smuzhiyun #define NEO_BC0_FILL_PAT 0x00000020 21*4882a593Smuzhiyun #define NEO_BC0_SRC_MONO 0x00000040 22*4882a593Smuzhiyun #define NEO_BC0_SYS_TO_VID 0x00000080 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun #define NEO_BC1_DEPTH8 0x00000100 25*4882a593Smuzhiyun #define NEO_BC1_DEPTH16 0x00000200 26*4882a593Smuzhiyun #define NEO_BC1_X_320 0x00000400 27*4882a593Smuzhiyun #define NEO_BC1_X_640 0x00000800 28*4882a593Smuzhiyun #define NEO_BC1_X_800 0x00000c00 29*4882a593Smuzhiyun #define NEO_BC1_X_1024 0x00001000 30*4882a593Smuzhiyun #define NEO_BC1_X_1152 0x00001400 31*4882a593Smuzhiyun #define NEO_BC1_X_1280 0x00001800 32*4882a593Smuzhiyun #define NEO_BC1_X_1600 0x00001c00 33*4882a593Smuzhiyun #define NEO_BC1_DST_TRANS 0x00002000 34*4882a593Smuzhiyun #define NEO_BC1_MSTR_BLT 0x00004000 35*4882a593Smuzhiyun #define NEO_BC1_FILTER_Z 0x00008000 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun #define NEO_BC2_WR_TR_DST 0x00800000 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun #define NEO_BC3_SRC_XY_ADDR 0x01000000 40*4882a593Smuzhiyun #define NEO_BC3_DST_XY_ADDR 0x02000000 41*4882a593Smuzhiyun #define NEO_BC3_CLIP_ON 0x04000000 42*4882a593Smuzhiyun #define NEO_BC3_FIFO_EN 0x08000000 43*4882a593Smuzhiyun #define NEO_BC3_BLT_ON_ADDR 0x10000000 44*4882a593Smuzhiyun #define NEO_BC3_SKIP_MAPPING 0x80000000 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun #define NEO_MODE1_DEPTH8 0x0100 47*4882a593Smuzhiyun #define NEO_MODE1_DEPTH16 0x0200 48*4882a593Smuzhiyun #define NEO_MODE1_DEPTH24 0x0300 49*4882a593Smuzhiyun #define NEO_MODE1_X_320 0x0400 50*4882a593Smuzhiyun #define NEO_MODE1_X_640 0x0800 51*4882a593Smuzhiyun #define NEO_MODE1_X_800 0x0c00 52*4882a593Smuzhiyun #define NEO_MODE1_X_1024 0x1000 53*4882a593Smuzhiyun #define NEO_MODE1_X_1152 0x1400 54*4882a593Smuzhiyun #define NEO_MODE1_X_1280 0x1800 55*4882a593Smuzhiyun #define NEO_MODE1_X_1600 0x1c00 56*4882a593Smuzhiyun #define NEO_MODE1_BLT_ON_ADDR 0x2000 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun /* These are offseted in MMIO space by par->CursorOff */ 59*4882a593Smuzhiyun #define NEOREG_CURSCNTL 0x00 60*4882a593Smuzhiyun #define NEOREG_CURSX 0x04 61*4882a593Smuzhiyun #define NEOREG_CURSY 0x08 62*4882a593Smuzhiyun #define NEOREG_CURSBGCOLOR 0x0C 63*4882a593Smuzhiyun #define NEOREG_CURSFGCOLOR 0x10 64*4882a593Smuzhiyun #define NEOREG_CURSMEMPOS 0x14 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun #define NEO_CURS_DISABLE 0x00000000 67*4882a593Smuzhiyun #define NEO_CURS_ENABLE 0x00000001 68*4882a593Smuzhiyun #define NEO_ICON64_ENABLE 0x00000008 69*4882a593Smuzhiyun #define NEO_ICON128_ENABLE 0x0000000C 70*4882a593Smuzhiyun #define NEO_ICON_BLANK 0x00000010 71*4882a593Smuzhiyun 72*4882a593Smuzhiyun #define NEO_GR01_SUPPRESS_VSYNC 0x10 73*4882a593Smuzhiyun #define NEO_GR01_SUPPRESS_HSYNC 0x20 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun #ifdef __KERNEL__ 76*4882a593Smuzhiyun 77*4882a593Smuzhiyun #ifdef NEOFB_DEBUG 78*4882a593Smuzhiyun # define DBG(x) printk (KERN_DEBUG "neofb: %s\n", (x)); 79*4882a593Smuzhiyun #else 80*4882a593Smuzhiyun # define DBG(x) 81*4882a593Smuzhiyun #endif 82*4882a593Smuzhiyun 83*4882a593Smuzhiyun #define PCI_CHIP_NM2070 0x0001 84*4882a593Smuzhiyun #define PCI_CHIP_NM2090 0x0002 85*4882a593Smuzhiyun #define PCI_CHIP_NM2093 0x0003 86*4882a593Smuzhiyun #define PCI_CHIP_NM2097 0x0083 87*4882a593Smuzhiyun #define PCI_CHIP_NM2160 0x0004 88*4882a593Smuzhiyun #define PCI_CHIP_NM2200 0x0005 89*4882a593Smuzhiyun #define PCI_CHIP_NM2230 0x0025 90*4882a593Smuzhiyun #define PCI_CHIP_NM2360 0x0006 91*4882a593Smuzhiyun #define PCI_CHIP_NM2380 0x0016 92*4882a593Smuzhiyun 93*4882a593Smuzhiyun /* --------------------------------------------------------------------- */ 94*4882a593Smuzhiyun 95*4882a593Smuzhiyun typedef volatile struct { 96*4882a593Smuzhiyun __u32 bltStat; 97*4882a593Smuzhiyun __u32 bltCntl; 98*4882a593Smuzhiyun __u32 xpColor; 99*4882a593Smuzhiyun __u32 fgColor; 100*4882a593Smuzhiyun __u32 bgColor; 101*4882a593Smuzhiyun __u32 pitch; 102*4882a593Smuzhiyun __u32 clipLT; 103*4882a593Smuzhiyun __u32 clipRB; 104*4882a593Smuzhiyun __u32 srcBitOffset; 105*4882a593Smuzhiyun __u32 srcStart; 106*4882a593Smuzhiyun __u32 reserved0; 107*4882a593Smuzhiyun __u32 dstStart; 108*4882a593Smuzhiyun __u32 xyExt; 109*4882a593Smuzhiyun 110*4882a593Smuzhiyun __u32 reserved1[19]; 111*4882a593Smuzhiyun 112*4882a593Smuzhiyun __u32 pageCntl; 113*4882a593Smuzhiyun __u32 pageBase; 114*4882a593Smuzhiyun __u32 postBase; 115*4882a593Smuzhiyun __u32 postPtr; 116*4882a593Smuzhiyun __u32 dataPtr; 117*4882a593Smuzhiyun } Neo2200; 118*4882a593Smuzhiyun 119*4882a593Smuzhiyun #define MMIO_SIZE 0x200000 120*4882a593Smuzhiyun 121*4882a593Smuzhiyun #define NEO_EXT_CR_MAX 0x85 122*4882a593Smuzhiyun #define NEO_EXT_GR_MAX 0xC7 123*4882a593Smuzhiyun 124*4882a593Smuzhiyun struct neofb_par { 125*4882a593Smuzhiyun struct vgastate state; 126*4882a593Smuzhiyun unsigned int ref_count; 127*4882a593Smuzhiyun 128*4882a593Smuzhiyun unsigned char MiscOutReg; /* Misc */ 129*4882a593Smuzhiyun unsigned char CRTC[25]; /* Crtc Controller */ 130*4882a593Smuzhiyun unsigned char Sequencer[5]; /* Video Sequencer */ 131*4882a593Smuzhiyun unsigned char Graphics[9]; /* Video Graphics */ 132*4882a593Smuzhiyun unsigned char Attribute[21]; /* Video Attribute */ 133*4882a593Smuzhiyun 134*4882a593Smuzhiyun unsigned char GeneralLockReg; 135*4882a593Smuzhiyun unsigned char ExtCRTDispAddr; 136*4882a593Smuzhiyun unsigned char ExtCRTOffset; 137*4882a593Smuzhiyun unsigned char SysIfaceCntl1; 138*4882a593Smuzhiyun unsigned char SysIfaceCntl2; 139*4882a593Smuzhiyun unsigned char ExtColorModeSelect; 140*4882a593Smuzhiyun unsigned char biosMode; 141*4882a593Smuzhiyun 142*4882a593Smuzhiyun unsigned char PanelDispCntlReg1; 143*4882a593Smuzhiyun unsigned char PanelDispCntlReg2; 144*4882a593Smuzhiyun unsigned char PanelDispCntlReg3; 145*4882a593Smuzhiyun unsigned char PanelDispCntlRegRead; 146*4882a593Smuzhiyun unsigned char PanelVertCenterReg1; 147*4882a593Smuzhiyun unsigned char PanelVertCenterReg2; 148*4882a593Smuzhiyun unsigned char PanelVertCenterReg3; 149*4882a593Smuzhiyun unsigned char PanelVertCenterReg4; 150*4882a593Smuzhiyun unsigned char PanelVertCenterReg5; 151*4882a593Smuzhiyun unsigned char PanelHorizCenterReg1; 152*4882a593Smuzhiyun unsigned char PanelHorizCenterReg2; 153*4882a593Smuzhiyun unsigned char PanelHorizCenterReg3; 154*4882a593Smuzhiyun unsigned char PanelHorizCenterReg4; 155*4882a593Smuzhiyun unsigned char PanelHorizCenterReg5; 156*4882a593Smuzhiyun 157*4882a593Smuzhiyun int ProgramVCLK; 158*4882a593Smuzhiyun unsigned char VCLK3NumeratorLow; 159*4882a593Smuzhiyun unsigned char VCLK3NumeratorHigh; 160*4882a593Smuzhiyun unsigned char VCLK3Denominator; 161*4882a593Smuzhiyun unsigned char VerticalExt; 162*4882a593Smuzhiyun int wc_cookie; 163*4882a593Smuzhiyun u8 __iomem *mmio_vbase; 164*4882a593Smuzhiyun u8 cursorOff; 165*4882a593Smuzhiyun u8 *cursorPad; /* Must die !! */ 166*4882a593Smuzhiyun 167*4882a593Smuzhiyun Neo2200 __iomem *neo2200; 168*4882a593Smuzhiyun 169*4882a593Smuzhiyun /* Panels size */ 170*4882a593Smuzhiyun int NeoPanelWidth; 171*4882a593Smuzhiyun int NeoPanelHeight; 172*4882a593Smuzhiyun 173*4882a593Smuzhiyun int maxClock; 174*4882a593Smuzhiyun 175*4882a593Smuzhiyun int pci_burst; 176*4882a593Smuzhiyun int lcd_stretch; 177*4882a593Smuzhiyun int internal_display; 178*4882a593Smuzhiyun int external_display; 179*4882a593Smuzhiyun int libretto; 180*4882a593Smuzhiyun u32 palette[16]; 181*4882a593Smuzhiyun }; 182*4882a593Smuzhiyun 183*4882a593Smuzhiyun typedef struct { 184*4882a593Smuzhiyun int x_res; 185*4882a593Smuzhiyun int y_res; 186*4882a593Smuzhiyun int mode; 187*4882a593Smuzhiyun } biosMode; 188*4882a593Smuzhiyun 189*4882a593Smuzhiyun #endif 190