xref: /OK3568_Linux_fs/kernel/include/video/ili9320.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */
2*4882a593Smuzhiyun /* include/video/ili9320.c
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  * ILI9320 LCD controller configuration control.
5*4882a593Smuzhiyun  *
6*4882a593Smuzhiyun  * Copyright 2007 Simtec Electronics
7*4882a593Smuzhiyun  *	Ben Dooks <ben@simtec.co.uk>
8*4882a593Smuzhiyun  *
9*4882a593Smuzhiyun  * http://armlinux.simtec.co.uk/
10*4882a593Smuzhiyun */
11*4882a593Smuzhiyun 
12*4882a593Smuzhiyun #define ILI9320_REG(x)	(x)
13*4882a593Smuzhiyun 
14*4882a593Smuzhiyun #define ILI9320_INDEX			ILI9320_REG(0x00)
15*4882a593Smuzhiyun 
16*4882a593Smuzhiyun #define ILI9320_OSCILATION		ILI9320_REG(0x00)
17*4882a593Smuzhiyun #define ILI9320_DRIVER			ILI9320_REG(0x01)
18*4882a593Smuzhiyun #define ILI9320_DRIVEWAVE		ILI9320_REG(0x02)
19*4882a593Smuzhiyun #define ILI9320_ENTRYMODE		ILI9320_REG(0x03)
20*4882a593Smuzhiyun #define ILI9320_RESIZING		ILI9320_REG(0x04)
21*4882a593Smuzhiyun #define ILI9320_DISPLAY1		ILI9320_REG(0x07)
22*4882a593Smuzhiyun #define ILI9320_DISPLAY2		ILI9320_REG(0x08)
23*4882a593Smuzhiyun #define ILI9320_DISPLAY3		ILI9320_REG(0x09)
24*4882a593Smuzhiyun #define ILI9320_DISPLAY4		ILI9320_REG(0x0A)
25*4882a593Smuzhiyun #define ILI9320_RGB_IF1			ILI9320_REG(0x0C)
26*4882a593Smuzhiyun #define ILI9320_FRAMEMAKER		ILI9320_REG(0x0D)
27*4882a593Smuzhiyun #define ILI9320_RGB_IF2			ILI9320_REG(0x0F)
28*4882a593Smuzhiyun 
29*4882a593Smuzhiyun #define ILI9320_POWER1			ILI9320_REG(0x10)
30*4882a593Smuzhiyun #define ILI9320_POWER2			ILI9320_REG(0x11)
31*4882a593Smuzhiyun #define ILI9320_POWER3			ILI9320_REG(0x12)
32*4882a593Smuzhiyun #define ILI9320_POWER4			ILI9320_REG(0x13)
33*4882a593Smuzhiyun #define ILI9320_GRAM_HORIZ_ADDR		ILI9320_REG(0x20)
34*4882a593Smuzhiyun #define ILI9320_GRAM_VERT_ADD		ILI9320_REG(0x21)
35*4882a593Smuzhiyun #define ILI9320_POWER7			ILI9320_REG(0x29)
36*4882a593Smuzhiyun #define ILI9320_FRAME_RATE_COLOUR	ILI9320_REG(0x2B)
37*4882a593Smuzhiyun 
38*4882a593Smuzhiyun #define ILI9320_GAMMA1			ILI9320_REG(0x30)
39*4882a593Smuzhiyun #define ILI9320_GAMMA2			ILI9320_REG(0x31)
40*4882a593Smuzhiyun #define ILI9320_GAMMA3			ILI9320_REG(0x32)
41*4882a593Smuzhiyun #define ILI9320_GAMMA4			ILI9320_REG(0x35)
42*4882a593Smuzhiyun #define ILI9320_GAMMA5			ILI9320_REG(0x36)
43*4882a593Smuzhiyun #define ILI9320_GAMMA6			ILI9320_REG(0x37)
44*4882a593Smuzhiyun #define ILI9320_GAMMA7			ILI9320_REG(0x38)
45*4882a593Smuzhiyun #define ILI9320_GAMMA8			ILI9320_REG(0x39)
46*4882a593Smuzhiyun #define ILI9320_GAMMA9			ILI9320_REG(0x3C)
47*4882a593Smuzhiyun #define ILI9320_GAMMA10			ILI9320_REG(0x3D)
48*4882a593Smuzhiyun 
49*4882a593Smuzhiyun #define ILI9320_HORIZ_START		ILI9320_REG(0x50)
50*4882a593Smuzhiyun #define ILI9320_HORIZ_END		ILI9320_REG(0x51)
51*4882a593Smuzhiyun #define ILI9320_VERT_START		ILI9320_REG(0x52)
52*4882a593Smuzhiyun #define ILI9320_VERT_END		ILI9320_REG(0x53)
53*4882a593Smuzhiyun 
54*4882a593Smuzhiyun #define ILI9320_DRIVER2			ILI9320_REG(0x60)
55*4882a593Smuzhiyun #define ILI9320_BASE_IMAGE		ILI9320_REG(0x61)
56*4882a593Smuzhiyun #define ILI9320_VERT_SCROLL		ILI9320_REG(0x6a)
57*4882a593Smuzhiyun 
58*4882a593Smuzhiyun #define ILI9320_PARTIAL1_POSITION	ILI9320_REG(0x80)
59*4882a593Smuzhiyun #define ILI9320_PARTIAL1_START		ILI9320_REG(0x81)
60*4882a593Smuzhiyun #define ILI9320_PARTIAL1_END		ILI9320_REG(0x82)
61*4882a593Smuzhiyun #define ILI9320_PARTIAL2_POSITION	ILI9320_REG(0x83)
62*4882a593Smuzhiyun #define ILI9320_PARTIAL2_START		ILI9320_REG(0x84)
63*4882a593Smuzhiyun #define ILI9320_PARTIAL2_END		ILI9320_REG(0x85)
64*4882a593Smuzhiyun 
65*4882a593Smuzhiyun #define ILI9320_INTERFACE1		ILI9320_REG(0x90)
66*4882a593Smuzhiyun #define ILI9320_INTERFACE2		ILI9320_REG(0x92)
67*4882a593Smuzhiyun #define ILI9320_INTERFACE3		ILI9320_REG(0x93)
68*4882a593Smuzhiyun #define ILI9320_INTERFACE4		ILI9320_REG(0x95)
69*4882a593Smuzhiyun #define ILI9320_INTERFACE5		ILI9320_REG(0x97)
70*4882a593Smuzhiyun #define ILI9320_INTERFACE6		ILI9320_REG(0x98)
71*4882a593Smuzhiyun 
72*4882a593Smuzhiyun /* Register contents definitions. */
73*4882a593Smuzhiyun 
74*4882a593Smuzhiyun #define ILI9320_OSCILATION_OSC		(1 << 0)
75*4882a593Smuzhiyun 
76*4882a593Smuzhiyun #define ILI9320_DRIVER_SS		(1 << 8)
77*4882a593Smuzhiyun #define ILI9320_DRIVER_SM		(1 << 10)
78*4882a593Smuzhiyun 
79*4882a593Smuzhiyun #define ILI9320_DRIVEWAVE_EOR		(1 << 8)
80*4882a593Smuzhiyun #define ILI9320_DRIVEWAVE_BC		(1 << 9)
81*4882a593Smuzhiyun #define ILI9320_DRIVEWAVE_MUSTSET	(1 << 10)
82*4882a593Smuzhiyun 
83*4882a593Smuzhiyun #define ILI9320_ENTRYMODE_AM		(1 << 3)
84*4882a593Smuzhiyun #define ILI9320_ENTRYMODE_ID(x)		((x) << 4)
85*4882a593Smuzhiyun #define ILI9320_ENTRYMODE_ORG		(1 << 7)
86*4882a593Smuzhiyun #define ILI9320_ENTRYMODE_HWM		(1 << 8)
87*4882a593Smuzhiyun #define ILI9320_ENTRYMODE_BGR		(1 << 12)
88*4882a593Smuzhiyun #define ILI9320_ENTRYMODE_DFM		(1 << 14)
89*4882a593Smuzhiyun #define ILI9320_ENTRYMODE_TRI		(1 << 15)
90*4882a593Smuzhiyun 
91*4882a593Smuzhiyun 
92*4882a593Smuzhiyun #define ILI9320_RESIZING_RSZ(x)		((x) << 0)
93*4882a593Smuzhiyun #define ILI9320_RESIZING_RCH(x)		((x) << 4)
94*4882a593Smuzhiyun #define ILI9320_RESIZING_RCV(x)		((x) << 8)
95*4882a593Smuzhiyun 
96*4882a593Smuzhiyun 
97*4882a593Smuzhiyun #define ILI9320_DISPLAY1_D(x)		((x) << 0)
98*4882a593Smuzhiyun #define ILI9320_DISPLAY1_CL		(1 << 3)
99*4882a593Smuzhiyun #define ILI9320_DISPLAY1_DTE		(1 << 4)
100*4882a593Smuzhiyun #define ILI9320_DISPLAY1_GON		(1 << 5)
101*4882a593Smuzhiyun #define ILI9320_DISPLAY1_BASEE		(1 << 8)
102*4882a593Smuzhiyun #define ILI9320_DISPLAY1_PTDE(x)	((x) << 12)
103*4882a593Smuzhiyun 
104*4882a593Smuzhiyun 
105*4882a593Smuzhiyun #define ILI9320_DISPLAY2_BP(x)		((x) << 0)
106*4882a593Smuzhiyun #define ILI9320_DISPLAY2_FP(x)		((x) << 8)
107*4882a593Smuzhiyun 
108*4882a593Smuzhiyun 
109*4882a593Smuzhiyun #define ILI9320_RGBIF1_RIM_RGB18	(0 << 0)
110*4882a593Smuzhiyun #define ILI9320_RGBIF1_RIM_RGB16	(1 << 0)
111*4882a593Smuzhiyun #define ILI9320_RGBIF1_RIM_RGB6		(2 << 0)
112*4882a593Smuzhiyun 
113*4882a593Smuzhiyun #define ILI9320_RGBIF1_CLK_INT		(0 << 4)
114*4882a593Smuzhiyun #define ILI9320_RGBIF1_CLK_RGBIF	(1 << 4)
115*4882a593Smuzhiyun #define ILI9320_RGBIF1_CLK_VSYNC	(2 << 4)
116*4882a593Smuzhiyun 
117*4882a593Smuzhiyun #define ILI9320_RGBIF1_RM		(1 << 8)
118*4882a593Smuzhiyun 
119*4882a593Smuzhiyun #define ILI9320_RGBIF1_ENC_FRAMES(x)	(((x) - 1)<< 13)
120*4882a593Smuzhiyun 
121*4882a593Smuzhiyun #define ILI9320_RGBIF2_DPL		(1 << 0)
122*4882a593Smuzhiyun #define ILI9320_RGBIF2_EPL		(1 << 1)
123*4882a593Smuzhiyun #define ILI9320_RGBIF2_HSPL		(1 << 3)
124*4882a593Smuzhiyun #define ILI9320_RGBIF2_VSPL		(1 << 4)
125*4882a593Smuzhiyun 
126*4882a593Smuzhiyun 
127*4882a593Smuzhiyun #define ILI9320_POWER1_SLP		(1 << 1)
128*4882a593Smuzhiyun #define ILI9320_POWER1_DSTB		(1 << 2)
129*4882a593Smuzhiyun #define ILI9320_POWER1_AP(x)		((x) << 4)
130*4882a593Smuzhiyun #define ILI9320_POWER1_APE		(1 << 7)
131*4882a593Smuzhiyun #define ILI9320_POWER1_BT(x)		((x) << 8)
132*4882a593Smuzhiyun #define ILI9320_POWER1_SAP		(1 << 12)
133*4882a593Smuzhiyun 
134*4882a593Smuzhiyun 
135*4882a593Smuzhiyun #define ILI9320_POWER2_VC(x)		((x) << 0)
136*4882a593Smuzhiyun #define ILI9320_POWER2_DC0(x)		((x) << 4)
137*4882a593Smuzhiyun #define ILI9320_POWER2_DC1(x)		((x) << 8)
138*4882a593Smuzhiyun 
139*4882a593Smuzhiyun 
140*4882a593Smuzhiyun #define ILI9320_POWER3_VRH(x)		((x) << 0)
141*4882a593Smuzhiyun #define ILI9320_POWER3_PON		(1 << 4)
142*4882a593Smuzhiyun #define ILI9320_POWER3_VCMR		(1 << 8)
143*4882a593Smuzhiyun 
144*4882a593Smuzhiyun 
145*4882a593Smuzhiyun #define ILI9320_POWER4_VREOUT(x)	((x) << 8)
146*4882a593Smuzhiyun 
147*4882a593Smuzhiyun 
148*4882a593Smuzhiyun #define ILI9320_DRIVER2_SCNL(x)		((x) << 0)
149*4882a593Smuzhiyun #define ILI9320_DRIVER2_NL(x)		((x) << 8)
150*4882a593Smuzhiyun #define ILI9320_DRIVER2_GS		(1 << 15)
151*4882a593Smuzhiyun 
152*4882a593Smuzhiyun 
153*4882a593Smuzhiyun #define ILI9320_BASEIMAGE_REV		(1 << 0)
154*4882a593Smuzhiyun #define ILI9320_BASEIMAGE_VLE		(1 << 1)
155*4882a593Smuzhiyun #define ILI9320_BASEIMAGE_NDL		(1 << 2)
156*4882a593Smuzhiyun 
157*4882a593Smuzhiyun 
158*4882a593Smuzhiyun #define ILI9320_INTERFACE4_RTNE(x)	(x)
159*4882a593Smuzhiyun #define ILI9320_INTERFACE4_DIVE(x)	((x) << 8)
160*4882a593Smuzhiyun 
161*4882a593Smuzhiyun /* SPI interface definitions */
162*4882a593Smuzhiyun 
163*4882a593Smuzhiyun #define ILI9320_SPI_IDCODE		(0x70)
164*4882a593Smuzhiyun #define ILI9320_SPI_ID(x)		((x) << 2)
165*4882a593Smuzhiyun #define ILI9320_SPI_READ		(0x01)
166*4882a593Smuzhiyun #define ILI9320_SPI_WRITE		(0x00)
167*4882a593Smuzhiyun #define ILI9320_SPI_DATA		(0x02)
168*4882a593Smuzhiyun #define ILI9320_SPI_INDEX		(0x00)
169*4882a593Smuzhiyun 
170*4882a593Smuzhiyun /* platform data to pass configuration from lcd */
171*4882a593Smuzhiyun 
172*4882a593Smuzhiyun enum ili9320_suspend {
173*4882a593Smuzhiyun 	ILI9320_SUSPEND_OFF,
174*4882a593Smuzhiyun 	ILI9320_SUSPEND_DEEP,
175*4882a593Smuzhiyun };
176*4882a593Smuzhiyun 
177*4882a593Smuzhiyun struct ili9320_platdata {
178*4882a593Smuzhiyun 	unsigned short	hsize;
179*4882a593Smuzhiyun 	unsigned short	vsize;
180*4882a593Smuzhiyun 
181*4882a593Smuzhiyun 	enum ili9320_suspend suspend;
182*4882a593Smuzhiyun 
183*4882a593Smuzhiyun 	/* set the reset line, 0 = reset asserted, 1 = normal */
184*4882a593Smuzhiyun 	void		(*reset)(unsigned int val);
185*4882a593Smuzhiyun 
186*4882a593Smuzhiyun 	unsigned short	entry_mode;
187*4882a593Smuzhiyun 	unsigned short	display2;
188*4882a593Smuzhiyun 	unsigned short	display3;
189*4882a593Smuzhiyun 	unsigned short	display4;
190*4882a593Smuzhiyun 	unsigned short	rgb_if1;
191*4882a593Smuzhiyun 	unsigned short	rgb_if2;
192*4882a593Smuzhiyun 	unsigned short	interface2;
193*4882a593Smuzhiyun 	unsigned short	interface3;
194*4882a593Smuzhiyun 	unsigned short	interface4;
195*4882a593Smuzhiyun 	unsigned short	interface5;
196*4882a593Smuzhiyun 	unsigned short	interface6;
197*4882a593Smuzhiyun };
198*4882a593Smuzhiyun 
199