1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * include/video/gbe.h -- SGI GBE (Graphics Back End) 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (C) 1999 Silicon Graphics, Inc. (Jeffrey Newquist) 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun #ifndef __GBE_H__ 9*4882a593Smuzhiyun #define __GBE_H__ 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun struct sgi_gbe { 12*4882a593Smuzhiyun volatile uint32_t ctrlstat; /* general control */ 13*4882a593Smuzhiyun volatile uint32_t dotclock; /* dot clock PLL control */ 14*4882a593Smuzhiyun volatile uint32_t i2c; /* crt I2C control */ 15*4882a593Smuzhiyun volatile uint32_t sysclk; /* system clock PLL control */ 16*4882a593Smuzhiyun volatile uint32_t i2cfp; /* flat panel I2C control */ 17*4882a593Smuzhiyun volatile uint32_t id; /* device id/chip revision */ 18*4882a593Smuzhiyun volatile uint32_t config; /* power on configuration [1] */ 19*4882a593Smuzhiyun volatile uint32_t bist; /* internal bist status [1] */ 20*4882a593Smuzhiyun uint32_t _pad0[0x010000/4 - 8]; 21*4882a593Smuzhiyun volatile uint32_t vt_xy; /* current dot coords */ 22*4882a593Smuzhiyun volatile uint32_t vt_xymax; /* maximum dot coords */ 23*4882a593Smuzhiyun volatile uint32_t vt_vsync; /* vsync on/off */ 24*4882a593Smuzhiyun volatile uint32_t vt_hsync; /* hsync on/off */ 25*4882a593Smuzhiyun volatile uint32_t vt_vblank; /* vblank on/off */ 26*4882a593Smuzhiyun volatile uint32_t vt_hblank; /* hblank on/off */ 27*4882a593Smuzhiyun volatile uint32_t vt_flags; /* polarity of vt signals */ 28*4882a593Smuzhiyun volatile uint32_t vt_f2rf_lock; /* f2rf & framelck y coord */ 29*4882a593Smuzhiyun volatile uint32_t vt_intr01; /* intr 0,1 y coords */ 30*4882a593Smuzhiyun volatile uint32_t vt_intr23; /* intr 2,3 y coords */ 31*4882a593Smuzhiyun volatile uint32_t fp_hdrv; /* flat panel hdrv on/off */ 32*4882a593Smuzhiyun volatile uint32_t fp_vdrv; /* flat panel vdrv on/off */ 33*4882a593Smuzhiyun volatile uint32_t fp_de; /* flat panel de on/off */ 34*4882a593Smuzhiyun volatile uint32_t vt_hpixen; /* intrnl horiz pixel on/off */ 35*4882a593Smuzhiyun volatile uint32_t vt_vpixen; /* intrnl vert pixel on/off */ 36*4882a593Smuzhiyun volatile uint32_t vt_hcmap; /* cmap write (horiz) */ 37*4882a593Smuzhiyun volatile uint32_t vt_vcmap; /* cmap write (vert) */ 38*4882a593Smuzhiyun volatile uint32_t did_start_xy; /* eol/f did/xy reset val */ 39*4882a593Smuzhiyun volatile uint32_t crs_start_xy; /* eol/f crs/xy reset val */ 40*4882a593Smuzhiyun volatile uint32_t vc_start_xy; /* eol/f vc/xy reset val */ 41*4882a593Smuzhiyun uint32_t _pad1[0xffb0/4]; 42*4882a593Smuzhiyun volatile uint32_t ovr_width_tile;/*overlay plane ctrl 0 */ 43*4882a593Smuzhiyun volatile uint32_t ovr_inhwctrl; /* overlay plane ctrl 1 */ 44*4882a593Smuzhiyun volatile uint32_t ovr_control; /* overlay plane ctrl 1 */ 45*4882a593Smuzhiyun uint32_t _pad2[0xfff4/4]; 46*4882a593Smuzhiyun volatile uint32_t frm_size_tile;/* normal plane ctrl 0 */ 47*4882a593Smuzhiyun volatile uint32_t frm_size_pixel;/*normal plane ctrl 1 */ 48*4882a593Smuzhiyun volatile uint32_t frm_inhwctrl; /* normal plane ctrl 2 */ 49*4882a593Smuzhiyun volatile uint32_t frm_control; /* normal plane ctrl 3 */ 50*4882a593Smuzhiyun uint32_t _pad3[0xfff0/4]; 51*4882a593Smuzhiyun volatile uint32_t did_inhwctrl; /* DID control */ 52*4882a593Smuzhiyun volatile uint32_t did_control; /* DID shadow */ 53*4882a593Smuzhiyun uint32_t _pad4[0x7ff8/4]; 54*4882a593Smuzhiyun volatile uint32_t mode_regs[32];/* WID table */ 55*4882a593Smuzhiyun uint32_t _pad5[0x7f80/4]; 56*4882a593Smuzhiyun volatile uint32_t cmap[6144]; /* color map */ 57*4882a593Smuzhiyun uint32_t _pad6[0x2000/4]; 58*4882a593Smuzhiyun volatile uint32_t cm_fifo; /* color map fifo status */ 59*4882a593Smuzhiyun uint32_t _pad7[0x7ffc/4]; 60*4882a593Smuzhiyun volatile uint32_t gmap[256]; /* gamma map */ 61*4882a593Smuzhiyun uint32_t _pad8[0x7c00/4]; 62*4882a593Smuzhiyun volatile uint32_t gmap10[1024]; /* gamma map */ 63*4882a593Smuzhiyun uint32_t _pad9[0x7000/4]; 64*4882a593Smuzhiyun volatile uint32_t crs_pos; /* cusror control 0 */ 65*4882a593Smuzhiyun volatile uint32_t crs_ctl; /* cusror control 1 */ 66*4882a593Smuzhiyun volatile uint32_t crs_cmap[3]; /* crs cmap */ 67*4882a593Smuzhiyun uint32_t _pad10[0x7fec/4]; 68*4882a593Smuzhiyun volatile uint32_t crs_glyph[64];/* crs glyph */ 69*4882a593Smuzhiyun uint32_t _pad11[0x7f00/4]; 70*4882a593Smuzhiyun volatile uint32_t vc_0; /* video capture crtl 0 */ 71*4882a593Smuzhiyun volatile uint32_t vc_1; /* video capture crtl 1 */ 72*4882a593Smuzhiyun volatile uint32_t vc_2; /* video capture crtl 2 */ 73*4882a593Smuzhiyun volatile uint32_t vc_3; /* video capture crtl 3 */ 74*4882a593Smuzhiyun volatile uint32_t vc_4; /* video capture crtl 4 */ 75*4882a593Smuzhiyun volatile uint32_t vc_5; /* video capture crtl 5 */ 76*4882a593Smuzhiyun volatile uint32_t vc_6; /* video capture crtl 6 */ 77*4882a593Smuzhiyun volatile uint32_t vc_7; /* video capture crtl 7 */ 78*4882a593Smuzhiyun volatile uint32_t vc_8; /* video capture crtl 8 */ 79*4882a593Smuzhiyun }; 80*4882a593Smuzhiyun 81*4882a593Smuzhiyun #define MASK(msb, lsb) \ 82*4882a593Smuzhiyun ( (((u32)1<<((msb)-(lsb)+1))-1) << (lsb) ) 83*4882a593Smuzhiyun #define GET(v, msb, lsb) \ 84*4882a593Smuzhiyun ( ((u32)(v) & MASK(msb,lsb)) >> (lsb) ) 85*4882a593Smuzhiyun #define SET(v, f, msb, lsb) \ 86*4882a593Smuzhiyun ( (v) = ((v)&~MASK(msb,lsb)) | (( (u32)(f)<<(lsb) ) & MASK(msb,lsb)) ) 87*4882a593Smuzhiyun 88*4882a593Smuzhiyun #define GET_GBE_FIELD(reg, field, v) \ 89*4882a593Smuzhiyun GET((v), GBE_##reg##_##field##_MSB, GBE_##reg##_##field##_LSB) 90*4882a593Smuzhiyun #define SET_GBE_FIELD(reg, field, v, f) \ 91*4882a593Smuzhiyun SET((v), (f), GBE_##reg##_##field##_MSB, GBE_##reg##_##field##_LSB) 92*4882a593Smuzhiyun 93*4882a593Smuzhiyun /* 94*4882a593Smuzhiyun * Bit mask information 95*4882a593Smuzhiyun */ 96*4882a593Smuzhiyun #define GBE_CTRLSTAT_CHIPID_MSB 3 97*4882a593Smuzhiyun #define GBE_CTRLSTAT_CHIPID_LSB 0 98*4882a593Smuzhiyun #define GBE_CTRLSTAT_SENSE_N_MSB 4 99*4882a593Smuzhiyun #define GBE_CTRLSTAT_SENSE_N_LSB 4 100*4882a593Smuzhiyun #define GBE_CTRLSTAT_PCLKSEL_MSB 29 101*4882a593Smuzhiyun #define GBE_CTRLSTAT_PCLKSEL_LSB 28 102*4882a593Smuzhiyun 103*4882a593Smuzhiyun #define GBE_DOTCLK_M_MSB 7 104*4882a593Smuzhiyun #define GBE_DOTCLK_M_LSB 0 105*4882a593Smuzhiyun #define GBE_DOTCLK_N_MSB 13 106*4882a593Smuzhiyun #define GBE_DOTCLK_N_LSB 8 107*4882a593Smuzhiyun #define GBE_DOTCLK_P_MSB 15 108*4882a593Smuzhiyun #define GBE_DOTCLK_P_LSB 14 109*4882a593Smuzhiyun #define GBE_DOTCLK_RUN_MSB 20 110*4882a593Smuzhiyun #define GBE_DOTCLK_RUN_LSB 20 111*4882a593Smuzhiyun 112*4882a593Smuzhiyun #define GBE_VT_XY_Y_MSB 23 113*4882a593Smuzhiyun #define GBE_VT_XY_Y_LSB 12 114*4882a593Smuzhiyun #define GBE_VT_XY_X_MSB 11 115*4882a593Smuzhiyun #define GBE_VT_XY_X_LSB 0 116*4882a593Smuzhiyun #define GBE_VT_XY_FREEZE_MSB 31 117*4882a593Smuzhiyun #define GBE_VT_XY_FREEZE_LSB 31 118*4882a593Smuzhiyun 119*4882a593Smuzhiyun #define GBE_FP_VDRV_ON_MSB 23 120*4882a593Smuzhiyun #define GBE_FP_VDRV_ON_LSB 12 121*4882a593Smuzhiyun #define GBE_FP_VDRV_OFF_MSB 11 122*4882a593Smuzhiyun #define GBE_FP_VDRV_OFF_LSB 0 123*4882a593Smuzhiyun 124*4882a593Smuzhiyun #define GBE_FP_HDRV_ON_MSB 23 125*4882a593Smuzhiyun #define GBE_FP_HDRV_ON_LSB 12 126*4882a593Smuzhiyun #define GBE_FP_HDRV_OFF_MSB 11 127*4882a593Smuzhiyun #define GBE_FP_HDRV_OFF_LSB 0 128*4882a593Smuzhiyun 129*4882a593Smuzhiyun #define GBE_FP_DE_ON_MSB 23 130*4882a593Smuzhiyun #define GBE_FP_DE_ON_LSB 12 131*4882a593Smuzhiyun #define GBE_FP_DE_OFF_MSB 11 132*4882a593Smuzhiyun #define GBE_FP_DE_OFF_LSB 0 133*4882a593Smuzhiyun 134*4882a593Smuzhiyun #define GBE_VT_VSYNC_VSYNC_ON_MSB 23 135*4882a593Smuzhiyun #define GBE_VT_VSYNC_VSYNC_ON_LSB 12 136*4882a593Smuzhiyun #define GBE_VT_VSYNC_VSYNC_OFF_MSB 11 137*4882a593Smuzhiyun #define GBE_VT_VSYNC_VSYNC_OFF_LSB 0 138*4882a593Smuzhiyun 139*4882a593Smuzhiyun #define GBE_VT_HSYNC_HSYNC_ON_MSB 23 140*4882a593Smuzhiyun #define GBE_VT_HSYNC_HSYNC_ON_LSB 12 141*4882a593Smuzhiyun #define GBE_VT_HSYNC_HSYNC_OFF_MSB 11 142*4882a593Smuzhiyun #define GBE_VT_HSYNC_HSYNC_OFF_LSB 0 143*4882a593Smuzhiyun 144*4882a593Smuzhiyun #define GBE_VT_VBLANK_VBLANK_ON_MSB 23 145*4882a593Smuzhiyun #define GBE_VT_VBLANK_VBLANK_ON_LSB 12 146*4882a593Smuzhiyun #define GBE_VT_VBLANK_VBLANK_OFF_MSB 11 147*4882a593Smuzhiyun #define GBE_VT_VBLANK_VBLANK_OFF_LSB 0 148*4882a593Smuzhiyun 149*4882a593Smuzhiyun #define GBE_VT_HBLANK_HBLANK_ON_MSB 23 150*4882a593Smuzhiyun #define GBE_VT_HBLANK_HBLANK_ON_LSB 12 151*4882a593Smuzhiyun #define GBE_VT_HBLANK_HBLANK_OFF_MSB 11 152*4882a593Smuzhiyun #define GBE_VT_HBLANK_HBLANK_OFF_LSB 0 153*4882a593Smuzhiyun 154*4882a593Smuzhiyun #define GBE_VT_FLAGS_F2RF_HIGH_MSB 6 155*4882a593Smuzhiyun #define GBE_VT_FLAGS_F2RF_HIGH_LSB 6 156*4882a593Smuzhiyun #define GBE_VT_FLAGS_SYNC_LOW_MSB 5 157*4882a593Smuzhiyun #define GBE_VT_FLAGS_SYNC_LOW_LSB 5 158*4882a593Smuzhiyun #define GBE_VT_FLAGS_SYNC_HIGH_MSB 4 159*4882a593Smuzhiyun #define GBE_VT_FLAGS_SYNC_HIGH_LSB 4 160*4882a593Smuzhiyun #define GBE_VT_FLAGS_HDRV_LOW_MSB 3 161*4882a593Smuzhiyun #define GBE_VT_FLAGS_HDRV_LOW_LSB 3 162*4882a593Smuzhiyun #define GBE_VT_FLAGS_HDRV_INVERT_MSB 2 163*4882a593Smuzhiyun #define GBE_VT_FLAGS_HDRV_INVERT_LSB 2 164*4882a593Smuzhiyun #define GBE_VT_FLAGS_VDRV_LOW_MSB 1 165*4882a593Smuzhiyun #define GBE_VT_FLAGS_VDRV_LOW_LSB 1 166*4882a593Smuzhiyun #define GBE_VT_FLAGS_VDRV_INVERT_MSB 0 167*4882a593Smuzhiyun #define GBE_VT_FLAGS_VDRV_INVERT_LSB 0 168*4882a593Smuzhiyun 169*4882a593Smuzhiyun #define GBE_VT_VCMAP_VCMAP_ON_MSB 23 170*4882a593Smuzhiyun #define GBE_VT_VCMAP_VCMAP_ON_LSB 12 171*4882a593Smuzhiyun #define GBE_VT_VCMAP_VCMAP_OFF_MSB 11 172*4882a593Smuzhiyun #define GBE_VT_VCMAP_VCMAP_OFF_LSB 0 173*4882a593Smuzhiyun 174*4882a593Smuzhiyun #define GBE_VT_HCMAP_HCMAP_ON_MSB 23 175*4882a593Smuzhiyun #define GBE_VT_HCMAP_HCMAP_ON_LSB 12 176*4882a593Smuzhiyun #define GBE_VT_HCMAP_HCMAP_OFF_MSB 11 177*4882a593Smuzhiyun #define GBE_VT_HCMAP_HCMAP_OFF_LSB 0 178*4882a593Smuzhiyun 179*4882a593Smuzhiyun #define GBE_VT_XYMAX_MAXX_MSB 11 180*4882a593Smuzhiyun #define GBE_VT_XYMAX_MAXX_LSB 0 181*4882a593Smuzhiyun #define GBE_VT_XYMAX_MAXY_MSB 23 182*4882a593Smuzhiyun #define GBE_VT_XYMAX_MAXY_LSB 12 183*4882a593Smuzhiyun 184*4882a593Smuzhiyun #define GBE_VT_HPIXEN_HPIXEN_ON_MSB 23 185*4882a593Smuzhiyun #define GBE_VT_HPIXEN_HPIXEN_ON_LSB 12 186*4882a593Smuzhiyun #define GBE_VT_HPIXEN_HPIXEN_OFF_MSB 11 187*4882a593Smuzhiyun #define GBE_VT_HPIXEN_HPIXEN_OFF_LSB 0 188*4882a593Smuzhiyun 189*4882a593Smuzhiyun #define GBE_VT_VPIXEN_VPIXEN_ON_MSB 23 190*4882a593Smuzhiyun #define GBE_VT_VPIXEN_VPIXEN_ON_LSB 12 191*4882a593Smuzhiyun #define GBE_VT_VPIXEN_VPIXEN_OFF_MSB 11 192*4882a593Smuzhiyun #define GBE_VT_VPIXEN_VPIXEN_OFF_LSB 0 193*4882a593Smuzhiyun 194*4882a593Smuzhiyun #define GBE_OVR_CONTROL_OVR_DMA_ENABLE_MSB 0 195*4882a593Smuzhiyun #define GBE_OVR_CONTROL_OVR_DMA_ENABLE_LSB 0 196*4882a593Smuzhiyun 197*4882a593Smuzhiyun #define GBE_OVR_INHWCTRL_OVR_DMA_ENABLE_MSB 0 198*4882a593Smuzhiyun #define GBE_OVR_INHWCTRL_OVR_DMA_ENABLE_LSB 0 199*4882a593Smuzhiyun 200*4882a593Smuzhiyun #define GBE_OVR_WIDTH_TILE_OVR_FIFO_RESET_MSB 13 201*4882a593Smuzhiyun #define GBE_OVR_WIDTH_TILE_OVR_FIFO_RESET_LSB 13 202*4882a593Smuzhiyun 203*4882a593Smuzhiyun #define GBE_FRM_CONTROL_FRM_DMA_ENABLE_MSB 0 204*4882a593Smuzhiyun #define GBE_FRM_CONTROL_FRM_DMA_ENABLE_LSB 0 205*4882a593Smuzhiyun #define GBE_FRM_CONTROL_FRM_TILE_PTR_MSB 31 206*4882a593Smuzhiyun #define GBE_FRM_CONTROL_FRM_TILE_PTR_LSB 9 207*4882a593Smuzhiyun #define GBE_FRM_CONTROL_FRM_LINEAR_MSB 1 208*4882a593Smuzhiyun #define GBE_FRM_CONTROL_FRM_LINEAR_LSB 1 209*4882a593Smuzhiyun 210*4882a593Smuzhiyun #define GBE_FRM_INHWCTRL_FRM_DMA_ENABLE_MSB 0 211*4882a593Smuzhiyun #define GBE_FRM_INHWCTRL_FRM_DMA_ENABLE_LSB 0 212*4882a593Smuzhiyun 213*4882a593Smuzhiyun #define GBE_FRM_SIZE_TILE_FRM_WIDTH_TILE_MSB 12 214*4882a593Smuzhiyun #define GBE_FRM_SIZE_TILE_FRM_WIDTH_TILE_LSB 5 215*4882a593Smuzhiyun #define GBE_FRM_SIZE_TILE_FRM_RHS_MSB 4 216*4882a593Smuzhiyun #define GBE_FRM_SIZE_TILE_FRM_RHS_LSB 0 217*4882a593Smuzhiyun #define GBE_FRM_SIZE_TILE_FRM_DEPTH_MSB 14 218*4882a593Smuzhiyun #define GBE_FRM_SIZE_TILE_FRM_DEPTH_LSB 13 219*4882a593Smuzhiyun #define GBE_FRM_SIZE_TILE_FRM_FIFO_RESET_MSB 15 220*4882a593Smuzhiyun #define GBE_FRM_SIZE_TILE_FRM_FIFO_RESET_LSB 15 221*4882a593Smuzhiyun 222*4882a593Smuzhiyun #define GBE_FRM_SIZE_PIXEL_FB_HEIGHT_PIX_MSB 31 223*4882a593Smuzhiyun #define GBE_FRM_SIZE_PIXEL_FB_HEIGHT_PIX_LSB 16 224*4882a593Smuzhiyun 225*4882a593Smuzhiyun #define GBE_DID_CONTROL_DID_DMA_ENABLE_MSB 0 226*4882a593Smuzhiyun #define GBE_DID_CONTROL_DID_DMA_ENABLE_LSB 0 227*4882a593Smuzhiyun #define GBE_DID_INHWCTRL_DID_DMA_ENABLE_MSB 0 228*4882a593Smuzhiyun #define GBE_DID_INHWCTRL_DID_DMA_ENABLE_LSB 0 229*4882a593Smuzhiyun 230*4882a593Smuzhiyun #define GBE_DID_START_XY_DID_STARTY_MSB 23 231*4882a593Smuzhiyun #define GBE_DID_START_XY_DID_STARTY_LSB 12 232*4882a593Smuzhiyun #define GBE_DID_START_XY_DID_STARTX_MSB 11 233*4882a593Smuzhiyun #define GBE_DID_START_XY_DID_STARTX_LSB 0 234*4882a593Smuzhiyun 235*4882a593Smuzhiyun #define GBE_CRS_START_XY_CRS_STARTY_MSB 23 236*4882a593Smuzhiyun #define GBE_CRS_START_XY_CRS_STARTY_LSB 12 237*4882a593Smuzhiyun #define GBE_CRS_START_XY_CRS_STARTX_MSB 11 238*4882a593Smuzhiyun #define GBE_CRS_START_XY_CRS_STARTX_LSB 0 239*4882a593Smuzhiyun 240*4882a593Smuzhiyun #define GBE_WID_AUX_MSB 12 241*4882a593Smuzhiyun #define GBE_WID_AUX_LSB 11 242*4882a593Smuzhiyun #define GBE_WID_GAMMA_MSB 10 243*4882a593Smuzhiyun #define GBE_WID_GAMMA_LSB 10 244*4882a593Smuzhiyun #define GBE_WID_CM_MSB 9 245*4882a593Smuzhiyun #define GBE_WID_CM_LSB 5 246*4882a593Smuzhiyun #define GBE_WID_TYP_MSB 4 247*4882a593Smuzhiyun #define GBE_WID_TYP_LSB 2 248*4882a593Smuzhiyun #define GBE_WID_BUF_MSB 1 249*4882a593Smuzhiyun #define GBE_WID_BUF_LSB 0 250*4882a593Smuzhiyun 251*4882a593Smuzhiyun #define GBE_VC_START_XY_VC_STARTY_MSB 23 252*4882a593Smuzhiyun #define GBE_VC_START_XY_VC_STARTY_LSB 12 253*4882a593Smuzhiyun #define GBE_VC_START_XY_VC_STARTX_MSB 11 254*4882a593Smuzhiyun #define GBE_VC_START_XY_VC_STARTX_LSB 0 255*4882a593Smuzhiyun 256*4882a593Smuzhiyun /* Constants */ 257*4882a593Smuzhiyun 258*4882a593Smuzhiyun #define GBE_FRM_DEPTH_8 0 259*4882a593Smuzhiyun #define GBE_FRM_DEPTH_16 1 260*4882a593Smuzhiyun #define GBE_FRM_DEPTH_32 2 261*4882a593Smuzhiyun 262*4882a593Smuzhiyun #define GBE_CMODE_I8 0 263*4882a593Smuzhiyun #define GBE_CMODE_I12 1 264*4882a593Smuzhiyun #define GBE_CMODE_RG3B2 2 265*4882a593Smuzhiyun #define GBE_CMODE_RGB4 3 266*4882a593Smuzhiyun #define GBE_CMODE_ARGB5 4 267*4882a593Smuzhiyun #define GBE_CMODE_RGB8 5 268*4882a593Smuzhiyun #define GBE_CMODE_RGBA5 6 269*4882a593Smuzhiyun #define GBE_CMODE_RGB10 7 270*4882a593Smuzhiyun 271*4882a593Smuzhiyun #define GBE_BMODE_BOTH 3 272*4882a593Smuzhiyun 273*4882a593Smuzhiyun #define GBE_CRS_MAGIC 54 274*4882a593Smuzhiyun #define GBE_PIXEN_MAGIC_ON 19 275*4882a593Smuzhiyun #define GBE_PIXEN_MAGIC_OFF 2 276*4882a593Smuzhiyun 277*4882a593Smuzhiyun #define GBE_TLB_SIZE 128 278*4882a593Smuzhiyun 279*4882a593Smuzhiyun /* [1] - only GBE revision 2 and later */ 280*4882a593Smuzhiyun 281*4882a593Smuzhiyun /* 282*4882a593Smuzhiyun * Video Timing Data Structure 283*4882a593Smuzhiyun */ 284*4882a593Smuzhiyun 285*4882a593Smuzhiyun struct gbe_timing_info { 286*4882a593Smuzhiyun int flags; 287*4882a593Smuzhiyun short width; /* Monitor resolution */ 288*4882a593Smuzhiyun short height; 289*4882a593Smuzhiyun int fields_sec; /* fields/sec (Hz -3 dec. places */ 290*4882a593Smuzhiyun int cfreq; /* pixel clock frequency (MHz -3 dec. places) */ 291*4882a593Smuzhiyun short htotal; /* Horizontal total pixels */ 292*4882a593Smuzhiyun short hblank_start; /* Horizontal blank start */ 293*4882a593Smuzhiyun short hblank_end; /* Horizontal blank end */ 294*4882a593Smuzhiyun short hsync_start; /* Horizontal sync start */ 295*4882a593Smuzhiyun short hsync_end; /* Horizontal sync end */ 296*4882a593Smuzhiyun short vtotal; /* Vertical total lines */ 297*4882a593Smuzhiyun short vblank_start; /* Vertical blank start */ 298*4882a593Smuzhiyun short vblank_end; /* Vertical blank end */ 299*4882a593Smuzhiyun short vsync_start; /* Vertical sync start */ 300*4882a593Smuzhiyun short vsync_end; /* Vertical sync end */ 301*4882a593Smuzhiyun short pll_m; /* PLL M parameter */ 302*4882a593Smuzhiyun short pll_n; /* PLL P parameter */ 303*4882a593Smuzhiyun short pll_p; /* PLL N parameter */ 304*4882a593Smuzhiyun }; 305*4882a593Smuzhiyun 306*4882a593Smuzhiyun /* Defines for gbe_vof_info_t flags */ 307*4882a593Smuzhiyun 308*4882a593Smuzhiyun #define GBE_VOF_UNKNOWNMON 1 309*4882a593Smuzhiyun #define GBE_VOF_STEREO 2 310*4882a593Smuzhiyun #define GBE_VOF_DO_GENSYNC 4 /* enable incoming sync */ 311*4882a593Smuzhiyun #define GBE_VOF_SYNC_ON_GREEN 8 /* sync on green */ 312*4882a593Smuzhiyun #define GBE_VOF_FLATPANEL 0x1000 /* FLATPANEL Timing */ 313*4882a593Smuzhiyun #define GBE_VOF_MAGICKEY 0x2000 /* Backdoor key */ 314*4882a593Smuzhiyun 315*4882a593Smuzhiyun #endif /* ! __GBE_H__ */ 316