xref: /OK3568_Linux_fs/kernel/include/uapi/sound/asound.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  *  Advanced Linux Sound Architecture - ALSA - Driver
4*4882a593Smuzhiyun  *  Copyright (c) 1994-2003 by Jaroslav Kysela <perex@perex.cz>,
5*4882a593Smuzhiyun  *                             Abramo Bagnara <abramo@alsa-project.org>
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  *
8*4882a593Smuzhiyun  *   This program is free software; you can redistribute it and/or modify
9*4882a593Smuzhiyun  *   it under the terms of the GNU General Public License as published by
10*4882a593Smuzhiyun  *   the Free Software Foundation; either version 2 of the License, or
11*4882a593Smuzhiyun  *   (at your option) any later version.
12*4882a593Smuzhiyun  *
13*4882a593Smuzhiyun  *   This program is distributed in the hope that it will be useful,
14*4882a593Smuzhiyun  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
15*4882a593Smuzhiyun  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16*4882a593Smuzhiyun  *   GNU General Public License for more details.
17*4882a593Smuzhiyun  *
18*4882a593Smuzhiyun  *   You should have received a copy of the GNU General Public License
19*4882a593Smuzhiyun  *   along with this program; if not, write to the Free Software
20*4882a593Smuzhiyun  *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
21*4882a593Smuzhiyun  *
22*4882a593Smuzhiyun  */
23*4882a593Smuzhiyun 
24*4882a593Smuzhiyun #ifndef _UAPI__SOUND_ASOUND_H
25*4882a593Smuzhiyun #define _UAPI__SOUND_ASOUND_H
26*4882a593Smuzhiyun 
27*4882a593Smuzhiyun #if defined(__KERNEL__) || defined(__linux__)
28*4882a593Smuzhiyun #include <linux/types.h>
29*4882a593Smuzhiyun #include <asm/byteorder.h>
30*4882a593Smuzhiyun #else
31*4882a593Smuzhiyun #include <endian.h>
32*4882a593Smuzhiyun #include <sys/ioctl.h>
33*4882a593Smuzhiyun #endif
34*4882a593Smuzhiyun 
35*4882a593Smuzhiyun #ifndef __KERNEL__
36*4882a593Smuzhiyun #include <stdlib.h>
37*4882a593Smuzhiyun #include <time.h>
38*4882a593Smuzhiyun #endif
39*4882a593Smuzhiyun 
40*4882a593Smuzhiyun /*
41*4882a593Smuzhiyun  *  protocol version
42*4882a593Smuzhiyun  */
43*4882a593Smuzhiyun 
44*4882a593Smuzhiyun #define SNDRV_PROTOCOL_VERSION(major, minor, subminor) (((major)<<16)|((minor)<<8)|(subminor))
45*4882a593Smuzhiyun #define SNDRV_PROTOCOL_MAJOR(version) (((version)>>16)&0xffff)
46*4882a593Smuzhiyun #define SNDRV_PROTOCOL_MINOR(version) (((version)>>8)&0xff)
47*4882a593Smuzhiyun #define SNDRV_PROTOCOL_MICRO(version) ((version)&0xff)
48*4882a593Smuzhiyun #define SNDRV_PROTOCOL_INCOMPATIBLE(kversion, uversion) \
49*4882a593Smuzhiyun 	(SNDRV_PROTOCOL_MAJOR(kversion) != SNDRV_PROTOCOL_MAJOR(uversion) || \
50*4882a593Smuzhiyun 	 (SNDRV_PROTOCOL_MAJOR(kversion) == SNDRV_PROTOCOL_MAJOR(uversion) && \
51*4882a593Smuzhiyun 	   SNDRV_PROTOCOL_MINOR(kversion) != SNDRV_PROTOCOL_MINOR(uversion)))
52*4882a593Smuzhiyun 
53*4882a593Smuzhiyun /****************************************************************************
54*4882a593Smuzhiyun  *                                                                          *
55*4882a593Smuzhiyun  *        Digital audio interface					    *
56*4882a593Smuzhiyun  *                                                                          *
57*4882a593Smuzhiyun  ****************************************************************************/
58*4882a593Smuzhiyun 
59*4882a593Smuzhiyun struct snd_aes_iec958 {
60*4882a593Smuzhiyun 	unsigned char status[24];	/* AES/IEC958 channel status bits */
61*4882a593Smuzhiyun 	unsigned char subcode[147];	/* AES/IEC958 subcode bits */
62*4882a593Smuzhiyun 	unsigned char pad;		/* nothing */
63*4882a593Smuzhiyun 	unsigned char dig_subframe[4];	/* AES/IEC958 subframe bits */
64*4882a593Smuzhiyun };
65*4882a593Smuzhiyun 
66*4882a593Smuzhiyun /****************************************************************************
67*4882a593Smuzhiyun  *                                                                          *
68*4882a593Smuzhiyun  *        CEA-861 Audio InfoFrame. Used in HDMI and DisplayPort		    *
69*4882a593Smuzhiyun  *                                                                          *
70*4882a593Smuzhiyun  ****************************************************************************/
71*4882a593Smuzhiyun 
72*4882a593Smuzhiyun struct snd_cea_861_aud_if {
73*4882a593Smuzhiyun 	unsigned char db1_ct_cc; /* coding type and channel count */
74*4882a593Smuzhiyun 	unsigned char db2_sf_ss; /* sample frequency and size */
75*4882a593Smuzhiyun 	unsigned char db3; /* not used, all zeros */
76*4882a593Smuzhiyun 	unsigned char db4_ca; /* channel allocation code */
77*4882a593Smuzhiyun 	unsigned char db5_dminh_lsv; /* downmix inhibit & level-shit values */
78*4882a593Smuzhiyun };
79*4882a593Smuzhiyun 
80*4882a593Smuzhiyun /****************************************************************************
81*4882a593Smuzhiyun  *                                                                          *
82*4882a593Smuzhiyun  *      Section for driver hardware dependent interface - /dev/snd/hw?      *
83*4882a593Smuzhiyun  *                                                                          *
84*4882a593Smuzhiyun  ****************************************************************************/
85*4882a593Smuzhiyun 
86*4882a593Smuzhiyun #define SNDRV_HWDEP_VERSION		SNDRV_PROTOCOL_VERSION(1, 0, 1)
87*4882a593Smuzhiyun 
88*4882a593Smuzhiyun enum {
89*4882a593Smuzhiyun 	SNDRV_HWDEP_IFACE_OPL2 = 0,
90*4882a593Smuzhiyun 	SNDRV_HWDEP_IFACE_OPL3,
91*4882a593Smuzhiyun 	SNDRV_HWDEP_IFACE_OPL4,
92*4882a593Smuzhiyun 	SNDRV_HWDEP_IFACE_SB16CSP,	/* Creative Signal Processor */
93*4882a593Smuzhiyun 	SNDRV_HWDEP_IFACE_EMU10K1,	/* FX8010 processor in EMU10K1 chip */
94*4882a593Smuzhiyun 	SNDRV_HWDEP_IFACE_YSS225,	/* Yamaha FX processor */
95*4882a593Smuzhiyun 	SNDRV_HWDEP_IFACE_ICS2115,	/* Wavetable synth */
96*4882a593Smuzhiyun 	SNDRV_HWDEP_IFACE_SSCAPE,	/* Ensoniq SoundScape ISA card (MC68EC000) */
97*4882a593Smuzhiyun 	SNDRV_HWDEP_IFACE_VX,		/* Digigram VX cards */
98*4882a593Smuzhiyun 	SNDRV_HWDEP_IFACE_MIXART,	/* Digigram miXart cards */
99*4882a593Smuzhiyun 	SNDRV_HWDEP_IFACE_USX2Y,	/* Tascam US122, US224 & US428 usb */
100*4882a593Smuzhiyun 	SNDRV_HWDEP_IFACE_EMUX_WAVETABLE, /* EmuX wavetable */
101*4882a593Smuzhiyun 	SNDRV_HWDEP_IFACE_BLUETOOTH,	/* Bluetooth audio */
102*4882a593Smuzhiyun 	SNDRV_HWDEP_IFACE_USX2Y_PCM,	/* Tascam US122, US224 & US428 rawusb pcm */
103*4882a593Smuzhiyun 	SNDRV_HWDEP_IFACE_PCXHR,	/* Digigram PCXHR */
104*4882a593Smuzhiyun 	SNDRV_HWDEP_IFACE_SB_RC,	/* SB Extigy/Audigy2NX remote control */
105*4882a593Smuzhiyun 	SNDRV_HWDEP_IFACE_HDA,		/* HD-audio */
106*4882a593Smuzhiyun 	SNDRV_HWDEP_IFACE_USB_STREAM,	/* direct access to usb stream */
107*4882a593Smuzhiyun 	SNDRV_HWDEP_IFACE_FW_DICE,	/* TC DICE FireWire device */
108*4882a593Smuzhiyun 	SNDRV_HWDEP_IFACE_FW_FIREWORKS,	/* Echo Audio Fireworks based device */
109*4882a593Smuzhiyun 	SNDRV_HWDEP_IFACE_FW_BEBOB,	/* BridgeCo BeBoB based device */
110*4882a593Smuzhiyun 	SNDRV_HWDEP_IFACE_FW_OXFW,	/* Oxford OXFW970/971 based device */
111*4882a593Smuzhiyun 	SNDRV_HWDEP_IFACE_FW_DIGI00X,	/* Digidesign Digi 002/003 family */
112*4882a593Smuzhiyun 	SNDRV_HWDEP_IFACE_FW_TASCAM,	/* TASCAM FireWire series */
113*4882a593Smuzhiyun 	SNDRV_HWDEP_IFACE_LINE6,	/* Line6 USB processors */
114*4882a593Smuzhiyun 	SNDRV_HWDEP_IFACE_FW_MOTU,	/* MOTU FireWire series */
115*4882a593Smuzhiyun 	SNDRV_HWDEP_IFACE_FW_FIREFACE,	/* RME Fireface series */
116*4882a593Smuzhiyun 
117*4882a593Smuzhiyun 	/* Don't forget to change the following: */
118*4882a593Smuzhiyun 	SNDRV_HWDEP_IFACE_LAST = SNDRV_HWDEP_IFACE_FW_FIREFACE
119*4882a593Smuzhiyun };
120*4882a593Smuzhiyun 
121*4882a593Smuzhiyun struct snd_hwdep_info {
122*4882a593Smuzhiyun 	unsigned int device;		/* WR: device number */
123*4882a593Smuzhiyun 	int card;			/* R: card number */
124*4882a593Smuzhiyun 	unsigned char id[64];		/* ID (user selectable) */
125*4882a593Smuzhiyun 	unsigned char name[80];		/* hwdep name */
126*4882a593Smuzhiyun 	int iface;			/* hwdep interface */
127*4882a593Smuzhiyun 	unsigned char reserved[64];	/* reserved for future */
128*4882a593Smuzhiyun };
129*4882a593Smuzhiyun 
130*4882a593Smuzhiyun /* generic DSP loader */
131*4882a593Smuzhiyun struct snd_hwdep_dsp_status {
132*4882a593Smuzhiyun 	unsigned int version;		/* R: driver-specific version */
133*4882a593Smuzhiyun 	unsigned char id[32];		/* R: driver-specific ID string */
134*4882a593Smuzhiyun 	unsigned int num_dsps;		/* R: number of DSP images to transfer */
135*4882a593Smuzhiyun 	unsigned int dsp_loaded;	/* R: bit flags indicating the loaded DSPs */
136*4882a593Smuzhiyun 	unsigned int chip_ready;	/* R: 1 = initialization finished */
137*4882a593Smuzhiyun 	unsigned char reserved[16];	/* reserved for future use */
138*4882a593Smuzhiyun };
139*4882a593Smuzhiyun 
140*4882a593Smuzhiyun struct snd_hwdep_dsp_image {
141*4882a593Smuzhiyun 	unsigned int index;		/* W: DSP index */
142*4882a593Smuzhiyun 	unsigned char name[64];		/* W: ID (e.g. file name) */
143*4882a593Smuzhiyun 	unsigned char __user *image;	/* W: binary image */
144*4882a593Smuzhiyun 	size_t length;			/* W: size of image in bytes */
145*4882a593Smuzhiyun 	unsigned long driver_data;	/* W: driver-specific data */
146*4882a593Smuzhiyun };
147*4882a593Smuzhiyun 
148*4882a593Smuzhiyun #define SNDRV_HWDEP_IOCTL_PVERSION	_IOR ('H', 0x00, int)
149*4882a593Smuzhiyun #define SNDRV_HWDEP_IOCTL_INFO		_IOR ('H', 0x01, struct snd_hwdep_info)
150*4882a593Smuzhiyun #define SNDRV_HWDEP_IOCTL_DSP_STATUS	_IOR('H', 0x02, struct snd_hwdep_dsp_status)
151*4882a593Smuzhiyun #define SNDRV_HWDEP_IOCTL_DSP_LOAD	_IOW('H', 0x03, struct snd_hwdep_dsp_image)
152*4882a593Smuzhiyun 
153*4882a593Smuzhiyun /*****************************************************************************
154*4882a593Smuzhiyun  *                                                                           *
155*4882a593Smuzhiyun  *             Digital Audio (PCM) interface - /dev/snd/pcm??                *
156*4882a593Smuzhiyun  *                                                                           *
157*4882a593Smuzhiyun  *****************************************************************************/
158*4882a593Smuzhiyun 
159*4882a593Smuzhiyun #define SNDRV_PCM_VERSION		SNDRV_PROTOCOL_VERSION(2, 0, 15)
160*4882a593Smuzhiyun 
161*4882a593Smuzhiyun typedef unsigned long snd_pcm_uframes_t;
162*4882a593Smuzhiyun typedef signed long snd_pcm_sframes_t;
163*4882a593Smuzhiyun 
164*4882a593Smuzhiyun enum {
165*4882a593Smuzhiyun 	SNDRV_PCM_CLASS_GENERIC = 0,	/* standard mono or stereo device */
166*4882a593Smuzhiyun 	SNDRV_PCM_CLASS_MULTI,		/* multichannel device */
167*4882a593Smuzhiyun 	SNDRV_PCM_CLASS_MODEM,		/* software modem class */
168*4882a593Smuzhiyun 	SNDRV_PCM_CLASS_DIGITIZER,	/* digitizer class */
169*4882a593Smuzhiyun 	/* Don't forget to change the following: */
170*4882a593Smuzhiyun 	SNDRV_PCM_CLASS_LAST = SNDRV_PCM_CLASS_DIGITIZER,
171*4882a593Smuzhiyun };
172*4882a593Smuzhiyun 
173*4882a593Smuzhiyun enum {
174*4882a593Smuzhiyun 	SNDRV_PCM_SUBCLASS_GENERIC_MIX = 0, /* mono or stereo subdevices are mixed together */
175*4882a593Smuzhiyun 	SNDRV_PCM_SUBCLASS_MULTI_MIX,	/* multichannel subdevices are mixed together */
176*4882a593Smuzhiyun 	/* Don't forget to change the following: */
177*4882a593Smuzhiyun 	SNDRV_PCM_SUBCLASS_LAST = SNDRV_PCM_SUBCLASS_MULTI_MIX,
178*4882a593Smuzhiyun };
179*4882a593Smuzhiyun 
180*4882a593Smuzhiyun enum {
181*4882a593Smuzhiyun 	SNDRV_PCM_STREAM_PLAYBACK = 0,
182*4882a593Smuzhiyun 	SNDRV_PCM_STREAM_CAPTURE,
183*4882a593Smuzhiyun 	SNDRV_PCM_STREAM_LAST = SNDRV_PCM_STREAM_CAPTURE,
184*4882a593Smuzhiyun };
185*4882a593Smuzhiyun 
186*4882a593Smuzhiyun typedef int __bitwise snd_pcm_access_t;
187*4882a593Smuzhiyun #define	SNDRV_PCM_ACCESS_MMAP_INTERLEAVED	((__force snd_pcm_access_t) 0) /* interleaved mmap */
188*4882a593Smuzhiyun #define	SNDRV_PCM_ACCESS_MMAP_NONINTERLEAVED	((__force snd_pcm_access_t) 1) /* noninterleaved mmap */
189*4882a593Smuzhiyun #define	SNDRV_PCM_ACCESS_MMAP_COMPLEX		((__force snd_pcm_access_t) 2) /* complex mmap */
190*4882a593Smuzhiyun #define	SNDRV_PCM_ACCESS_RW_INTERLEAVED		((__force snd_pcm_access_t) 3) /* readi/writei */
191*4882a593Smuzhiyun #define	SNDRV_PCM_ACCESS_RW_NONINTERLEAVED	((__force snd_pcm_access_t) 4) /* readn/writen */
192*4882a593Smuzhiyun #define	SNDRV_PCM_ACCESS_LAST		SNDRV_PCM_ACCESS_RW_NONINTERLEAVED
193*4882a593Smuzhiyun 
194*4882a593Smuzhiyun typedef int __bitwise snd_pcm_format_t;
195*4882a593Smuzhiyun #define	SNDRV_PCM_FORMAT_S8	((__force snd_pcm_format_t) 0)
196*4882a593Smuzhiyun #define	SNDRV_PCM_FORMAT_U8	((__force snd_pcm_format_t) 1)
197*4882a593Smuzhiyun #define	SNDRV_PCM_FORMAT_S16_LE	((__force snd_pcm_format_t) 2)
198*4882a593Smuzhiyun #define	SNDRV_PCM_FORMAT_S16_BE	((__force snd_pcm_format_t) 3)
199*4882a593Smuzhiyun #define	SNDRV_PCM_FORMAT_U16_LE	((__force snd_pcm_format_t) 4)
200*4882a593Smuzhiyun #define	SNDRV_PCM_FORMAT_U16_BE	((__force snd_pcm_format_t) 5)
201*4882a593Smuzhiyun #define	SNDRV_PCM_FORMAT_S24_LE	((__force snd_pcm_format_t) 6) /* low three bytes */
202*4882a593Smuzhiyun #define	SNDRV_PCM_FORMAT_S24_BE	((__force snd_pcm_format_t) 7) /* low three bytes */
203*4882a593Smuzhiyun #define	SNDRV_PCM_FORMAT_U24_LE	((__force snd_pcm_format_t) 8) /* low three bytes */
204*4882a593Smuzhiyun #define	SNDRV_PCM_FORMAT_U24_BE	((__force snd_pcm_format_t) 9) /* low three bytes */
205*4882a593Smuzhiyun #define	SNDRV_PCM_FORMAT_S32_LE	((__force snd_pcm_format_t) 10)
206*4882a593Smuzhiyun #define	SNDRV_PCM_FORMAT_S32_BE	((__force snd_pcm_format_t) 11)
207*4882a593Smuzhiyun #define	SNDRV_PCM_FORMAT_U32_LE	((__force snd_pcm_format_t) 12)
208*4882a593Smuzhiyun #define	SNDRV_PCM_FORMAT_U32_BE	((__force snd_pcm_format_t) 13)
209*4882a593Smuzhiyun #define	SNDRV_PCM_FORMAT_FLOAT_LE	((__force snd_pcm_format_t) 14) /* 4-byte float, IEEE-754 32-bit, range -1.0 to 1.0 */
210*4882a593Smuzhiyun #define	SNDRV_PCM_FORMAT_FLOAT_BE	((__force snd_pcm_format_t) 15) /* 4-byte float, IEEE-754 32-bit, range -1.0 to 1.0 */
211*4882a593Smuzhiyun #define	SNDRV_PCM_FORMAT_FLOAT64_LE	((__force snd_pcm_format_t) 16) /* 8-byte float, IEEE-754 64-bit, range -1.0 to 1.0 */
212*4882a593Smuzhiyun #define	SNDRV_PCM_FORMAT_FLOAT64_BE	((__force snd_pcm_format_t) 17) /* 8-byte float, IEEE-754 64-bit, range -1.0 to 1.0 */
213*4882a593Smuzhiyun #define	SNDRV_PCM_FORMAT_IEC958_SUBFRAME_LE ((__force snd_pcm_format_t) 18) /* IEC-958 subframe, Little Endian */
214*4882a593Smuzhiyun #define	SNDRV_PCM_FORMAT_IEC958_SUBFRAME_BE ((__force snd_pcm_format_t) 19) /* IEC-958 subframe, Big Endian */
215*4882a593Smuzhiyun #define	SNDRV_PCM_FORMAT_MU_LAW		((__force snd_pcm_format_t) 20)
216*4882a593Smuzhiyun #define	SNDRV_PCM_FORMAT_A_LAW		((__force snd_pcm_format_t) 21)
217*4882a593Smuzhiyun #define	SNDRV_PCM_FORMAT_IMA_ADPCM	((__force snd_pcm_format_t) 22)
218*4882a593Smuzhiyun #define	SNDRV_PCM_FORMAT_MPEG		((__force snd_pcm_format_t) 23)
219*4882a593Smuzhiyun #define	SNDRV_PCM_FORMAT_GSM		((__force snd_pcm_format_t) 24)
220*4882a593Smuzhiyun #define	SNDRV_PCM_FORMAT_S20_LE	((__force snd_pcm_format_t) 25) /* in four bytes, LSB justified */
221*4882a593Smuzhiyun #define	SNDRV_PCM_FORMAT_S20_BE	((__force snd_pcm_format_t) 26) /* in four bytes, LSB justified */
222*4882a593Smuzhiyun #define	SNDRV_PCM_FORMAT_U20_LE	((__force snd_pcm_format_t) 27) /* in four bytes, LSB justified */
223*4882a593Smuzhiyun #define	SNDRV_PCM_FORMAT_U20_BE	((__force snd_pcm_format_t) 28) /* in four bytes, LSB justified */
224*4882a593Smuzhiyun /* gap in the numbering for a future standard linear format */
225*4882a593Smuzhiyun #define	SNDRV_PCM_FORMAT_SPECIAL	((__force snd_pcm_format_t) 31)
226*4882a593Smuzhiyun #define	SNDRV_PCM_FORMAT_S24_3LE	((__force snd_pcm_format_t) 32)	/* in three bytes */
227*4882a593Smuzhiyun #define	SNDRV_PCM_FORMAT_S24_3BE	((__force snd_pcm_format_t) 33)	/* in three bytes */
228*4882a593Smuzhiyun #define	SNDRV_PCM_FORMAT_U24_3LE	((__force snd_pcm_format_t) 34)	/* in three bytes */
229*4882a593Smuzhiyun #define	SNDRV_PCM_FORMAT_U24_3BE	((__force snd_pcm_format_t) 35)	/* in three bytes */
230*4882a593Smuzhiyun #define	SNDRV_PCM_FORMAT_S20_3LE	((__force snd_pcm_format_t) 36)	/* in three bytes */
231*4882a593Smuzhiyun #define	SNDRV_PCM_FORMAT_S20_3BE	((__force snd_pcm_format_t) 37)	/* in three bytes */
232*4882a593Smuzhiyun #define	SNDRV_PCM_FORMAT_U20_3LE	((__force snd_pcm_format_t) 38)	/* in three bytes */
233*4882a593Smuzhiyun #define	SNDRV_PCM_FORMAT_U20_3BE	((__force snd_pcm_format_t) 39)	/* in three bytes */
234*4882a593Smuzhiyun #define	SNDRV_PCM_FORMAT_S18_3LE	((__force snd_pcm_format_t) 40)	/* in three bytes */
235*4882a593Smuzhiyun #define	SNDRV_PCM_FORMAT_S18_3BE	((__force snd_pcm_format_t) 41)	/* in three bytes */
236*4882a593Smuzhiyun #define	SNDRV_PCM_FORMAT_U18_3LE	((__force snd_pcm_format_t) 42)	/* in three bytes */
237*4882a593Smuzhiyun #define	SNDRV_PCM_FORMAT_U18_3BE	((__force snd_pcm_format_t) 43)	/* in three bytes */
238*4882a593Smuzhiyun #define	SNDRV_PCM_FORMAT_G723_24	((__force snd_pcm_format_t) 44) /* 8 samples in 3 bytes */
239*4882a593Smuzhiyun #define	SNDRV_PCM_FORMAT_G723_24_1B	((__force snd_pcm_format_t) 45) /* 1 sample in 1 byte */
240*4882a593Smuzhiyun #define	SNDRV_PCM_FORMAT_G723_40	((__force snd_pcm_format_t) 46) /* 8 Samples in 5 bytes */
241*4882a593Smuzhiyun #define	SNDRV_PCM_FORMAT_G723_40_1B	((__force snd_pcm_format_t) 47) /* 1 sample in 1 byte */
242*4882a593Smuzhiyun #define	SNDRV_PCM_FORMAT_DSD_U8		((__force snd_pcm_format_t) 48) /* DSD, 1-byte samples DSD (x8) */
243*4882a593Smuzhiyun #define	SNDRV_PCM_FORMAT_DSD_U16_LE	((__force snd_pcm_format_t) 49) /* DSD, 2-byte samples DSD (x16), little endian */
244*4882a593Smuzhiyun #define	SNDRV_PCM_FORMAT_DSD_U32_LE	((__force snd_pcm_format_t) 50) /* DSD, 4-byte samples DSD (x32), little endian */
245*4882a593Smuzhiyun #define	SNDRV_PCM_FORMAT_DSD_U16_BE	((__force snd_pcm_format_t) 51) /* DSD, 2-byte samples DSD (x16), big endian */
246*4882a593Smuzhiyun #define	SNDRV_PCM_FORMAT_DSD_U32_BE	((__force snd_pcm_format_t) 52) /* DSD, 4-byte samples DSD (x32), big endian */
247*4882a593Smuzhiyun #define	SNDRV_PCM_FORMAT_LAST		SNDRV_PCM_FORMAT_DSD_U32_BE
248*4882a593Smuzhiyun #define	SNDRV_PCM_FORMAT_FIRST		SNDRV_PCM_FORMAT_S8
249*4882a593Smuzhiyun 
250*4882a593Smuzhiyun #ifdef SNDRV_LITTLE_ENDIAN
251*4882a593Smuzhiyun #define	SNDRV_PCM_FORMAT_S16		SNDRV_PCM_FORMAT_S16_LE
252*4882a593Smuzhiyun #define	SNDRV_PCM_FORMAT_U16		SNDRV_PCM_FORMAT_U16_LE
253*4882a593Smuzhiyun #define	SNDRV_PCM_FORMAT_S24		SNDRV_PCM_FORMAT_S24_LE
254*4882a593Smuzhiyun #define	SNDRV_PCM_FORMAT_U24		SNDRV_PCM_FORMAT_U24_LE
255*4882a593Smuzhiyun #define	SNDRV_PCM_FORMAT_S32		SNDRV_PCM_FORMAT_S32_LE
256*4882a593Smuzhiyun #define	SNDRV_PCM_FORMAT_U32		SNDRV_PCM_FORMAT_U32_LE
257*4882a593Smuzhiyun #define	SNDRV_PCM_FORMAT_FLOAT		SNDRV_PCM_FORMAT_FLOAT_LE
258*4882a593Smuzhiyun #define	SNDRV_PCM_FORMAT_FLOAT64	SNDRV_PCM_FORMAT_FLOAT64_LE
259*4882a593Smuzhiyun #define	SNDRV_PCM_FORMAT_IEC958_SUBFRAME SNDRV_PCM_FORMAT_IEC958_SUBFRAME_LE
260*4882a593Smuzhiyun #define	SNDRV_PCM_FORMAT_S20		SNDRV_PCM_FORMAT_S20_LE
261*4882a593Smuzhiyun #define	SNDRV_PCM_FORMAT_U20		SNDRV_PCM_FORMAT_U20_LE
262*4882a593Smuzhiyun #endif
263*4882a593Smuzhiyun #ifdef SNDRV_BIG_ENDIAN
264*4882a593Smuzhiyun #define	SNDRV_PCM_FORMAT_S16		SNDRV_PCM_FORMAT_S16_BE
265*4882a593Smuzhiyun #define	SNDRV_PCM_FORMAT_U16		SNDRV_PCM_FORMAT_U16_BE
266*4882a593Smuzhiyun #define	SNDRV_PCM_FORMAT_S24		SNDRV_PCM_FORMAT_S24_BE
267*4882a593Smuzhiyun #define	SNDRV_PCM_FORMAT_U24		SNDRV_PCM_FORMAT_U24_BE
268*4882a593Smuzhiyun #define	SNDRV_PCM_FORMAT_S32		SNDRV_PCM_FORMAT_S32_BE
269*4882a593Smuzhiyun #define	SNDRV_PCM_FORMAT_U32		SNDRV_PCM_FORMAT_U32_BE
270*4882a593Smuzhiyun #define	SNDRV_PCM_FORMAT_FLOAT		SNDRV_PCM_FORMAT_FLOAT_BE
271*4882a593Smuzhiyun #define	SNDRV_PCM_FORMAT_FLOAT64	SNDRV_PCM_FORMAT_FLOAT64_BE
272*4882a593Smuzhiyun #define	SNDRV_PCM_FORMAT_IEC958_SUBFRAME SNDRV_PCM_FORMAT_IEC958_SUBFRAME_BE
273*4882a593Smuzhiyun #define	SNDRV_PCM_FORMAT_S20		SNDRV_PCM_FORMAT_S20_BE
274*4882a593Smuzhiyun #define	SNDRV_PCM_FORMAT_U20		SNDRV_PCM_FORMAT_U20_BE
275*4882a593Smuzhiyun #endif
276*4882a593Smuzhiyun 
277*4882a593Smuzhiyun typedef int __bitwise snd_pcm_subformat_t;
278*4882a593Smuzhiyun #define	SNDRV_PCM_SUBFORMAT_STD		((__force snd_pcm_subformat_t) 0)
279*4882a593Smuzhiyun #define	SNDRV_PCM_SUBFORMAT_LAST	SNDRV_PCM_SUBFORMAT_STD
280*4882a593Smuzhiyun 
281*4882a593Smuzhiyun #define SNDRV_PCM_INFO_MMAP		0x00000001	/* hardware supports mmap */
282*4882a593Smuzhiyun #define SNDRV_PCM_INFO_MMAP_VALID	0x00000002	/* period data are valid during transfer */
283*4882a593Smuzhiyun #define SNDRV_PCM_INFO_DOUBLE		0x00000004	/* Double buffering needed for PCM start/stop */
284*4882a593Smuzhiyun #define SNDRV_PCM_INFO_BATCH		0x00000010	/* double buffering */
285*4882a593Smuzhiyun #define SNDRV_PCM_INFO_SYNC_APPLPTR	0x00000020	/* need the explicit sync of appl_ptr update */
286*4882a593Smuzhiyun #define SNDRV_PCM_INFO_INTERLEAVED	0x00000100	/* channels are interleaved */
287*4882a593Smuzhiyun #define SNDRV_PCM_INFO_NONINTERLEAVED	0x00000200	/* channels are not interleaved */
288*4882a593Smuzhiyun #define SNDRV_PCM_INFO_COMPLEX		0x00000400	/* complex frame organization (mmap only) */
289*4882a593Smuzhiyun #define SNDRV_PCM_INFO_BLOCK_TRANSFER	0x00010000	/* hardware transfer block of samples */
290*4882a593Smuzhiyun #define SNDRV_PCM_INFO_OVERRANGE	0x00020000	/* hardware supports ADC (capture) overrange detection */
291*4882a593Smuzhiyun #define SNDRV_PCM_INFO_RESUME		0x00040000	/* hardware supports stream resume after suspend */
292*4882a593Smuzhiyun #define SNDRV_PCM_INFO_PAUSE		0x00080000	/* pause ioctl is supported */
293*4882a593Smuzhiyun #define SNDRV_PCM_INFO_HALF_DUPLEX	0x00100000	/* only half duplex */
294*4882a593Smuzhiyun #define SNDRV_PCM_INFO_JOINT_DUPLEX	0x00200000	/* playback and capture stream are somewhat correlated */
295*4882a593Smuzhiyun #define SNDRV_PCM_INFO_SYNC_START	0x00400000	/* pcm support some kind of sync go */
296*4882a593Smuzhiyun #define SNDRV_PCM_INFO_NO_PERIOD_WAKEUP	0x00800000	/* period wakeup can be disabled */
297*4882a593Smuzhiyun #define SNDRV_PCM_INFO_HAS_WALL_CLOCK   0x01000000      /* (Deprecated)has audio wall clock for audio/system time sync */
298*4882a593Smuzhiyun #define SNDRV_PCM_INFO_HAS_LINK_ATIME              0x01000000  /* report hardware link audio time, reset on startup */
299*4882a593Smuzhiyun #define SNDRV_PCM_INFO_HAS_LINK_ABSOLUTE_ATIME     0x02000000  /* report absolute hardware link audio time, not reset on startup */
300*4882a593Smuzhiyun #define SNDRV_PCM_INFO_HAS_LINK_ESTIMATED_ATIME    0x04000000  /* report estimated link audio time */
301*4882a593Smuzhiyun #define SNDRV_PCM_INFO_HAS_LINK_SYNCHRONIZED_ATIME 0x08000000  /* report synchronized audio/system time */
302*4882a593Smuzhiyun 
303*4882a593Smuzhiyun #define SNDRV_PCM_INFO_DRAIN_TRIGGER	0x40000000		/* internal kernel flag - trigger in drain */
304*4882a593Smuzhiyun #define SNDRV_PCM_INFO_FIFO_IN_FRAMES	0x80000000	/* internal kernel flag - FIFO size is in frames */
305*4882a593Smuzhiyun 
306*4882a593Smuzhiyun #if (__BITS_PER_LONG == 32 && defined(__USE_TIME_BITS64)) || defined __KERNEL__
307*4882a593Smuzhiyun #define __SND_STRUCT_TIME64
308*4882a593Smuzhiyun #endif
309*4882a593Smuzhiyun 
310*4882a593Smuzhiyun typedef int __bitwise snd_pcm_state_t;
311*4882a593Smuzhiyun #define	SNDRV_PCM_STATE_OPEN		((__force snd_pcm_state_t) 0) /* stream is open */
312*4882a593Smuzhiyun #define	SNDRV_PCM_STATE_SETUP		((__force snd_pcm_state_t) 1) /* stream has a setup */
313*4882a593Smuzhiyun #define	SNDRV_PCM_STATE_PREPARED	((__force snd_pcm_state_t) 2) /* stream is ready to start */
314*4882a593Smuzhiyun #define	SNDRV_PCM_STATE_RUNNING		((__force snd_pcm_state_t) 3) /* stream is running */
315*4882a593Smuzhiyun #define	SNDRV_PCM_STATE_XRUN		((__force snd_pcm_state_t) 4) /* stream reached an xrun */
316*4882a593Smuzhiyun #define	SNDRV_PCM_STATE_DRAINING	((__force snd_pcm_state_t) 5) /* stream is draining */
317*4882a593Smuzhiyun #define	SNDRV_PCM_STATE_PAUSED		((__force snd_pcm_state_t) 6) /* stream is paused */
318*4882a593Smuzhiyun #define	SNDRV_PCM_STATE_SUSPENDED	((__force snd_pcm_state_t) 7) /* hardware is suspended */
319*4882a593Smuzhiyun #define	SNDRV_PCM_STATE_DISCONNECTED	((__force snd_pcm_state_t) 8) /* hardware is disconnected */
320*4882a593Smuzhiyun #define	SNDRV_PCM_STATE_LAST		SNDRV_PCM_STATE_DISCONNECTED
321*4882a593Smuzhiyun 
322*4882a593Smuzhiyun enum {
323*4882a593Smuzhiyun 	SNDRV_PCM_MMAP_OFFSET_DATA = 0x00000000,
324*4882a593Smuzhiyun 	SNDRV_PCM_MMAP_OFFSET_STATUS_OLD = 0x80000000,
325*4882a593Smuzhiyun 	SNDRV_PCM_MMAP_OFFSET_CONTROL_OLD = 0x81000000,
326*4882a593Smuzhiyun 	SNDRV_PCM_MMAP_OFFSET_STATUS_NEW = 0x82000000,
327*4882a593Smuzhiyun 	SNDRV_PCM_MMAP_OFFSET_CONTROL_NEW = 0x83000000,
328*4882a593Smuzhiyun #ifdef __SND_STRUCT_TIME64
329*4882a593Smuzhiyun 	SNDRV_PCM_MMAP_OFFSET_STATUS = SNDRV_PCM_MMAP_OFFSET_STATUS_NEW,
330*4882a593Smuzhiyun 	SNDRV_PCM_MMAP_OFFSET_CONTROL = SNDRV_PCM_MMAP_OFFSET_CONTROL_NEW,
331*4882a593Smuzhiyun #else
332*4882a593Smuzhiyun 	SNDRV_PCM_MMAP_OFFSET_STATUS = SNDRV_PCM_MMAP_OFFSET_STATUS_OLD,
333*4882a593Smuzhiyun 	SNDRV_PCM_MMAP_OFFSET_CONTROL = SNDRV_PCM_MMAP_OFFSET_CONTROL_OLD,
334*4882a593Smuzhiyun #endif
335*4882a593Smuzhiyun };
336*4882a593Smuzhiyun 
337*4882a593Smuzhiyun union snd_pcm_sync_id {
338*4882a593Smuzhiyun 	unsigned char id[16];
339*4882a593Smuzhiyun 	unsigned short id16[8];
340*4882a593Smuzhiyun 	unsigned int id32[4];
341*4882a593Smuzhiyun };
342*4882a593Smuzhiyun 
343*4882a593Smuzhiyun struct snd_pcm_info {
344*4882a593Smuzhiyun 	unsigned int device;		/* RO/WR (control): device number */
345*4882a593Smuzhiyun 	unsigned int subdevice;		/* RO/WR (control): subdevice number */
346*4882a593Smuzhiyun 	int stream;			/* RO/WR (control): stream direction */
347*4882a593Smuzhiyun 	int card;			/* R: card number */
348*4882a593Smuzhiyun 	unsigned char id[64];		/* ID (user selectable) */
349*4882a593Smuzhiyun 	unsigned char name[80];		/* name of this device */
350*4882a593Smuzhiyun 	unsigned char subname[32];	/* subdevice name */
351*4882a593Smuzhiyun 	int dev_class;			/* SNDRV_PCM_CLASS_* */
352*4882a593Smuzhiyun 	int dev_subclass;		/* SNDRV_PCM_SUBCLASS_* */
353*4882a593Smuzhiyun 	unsigned int subdevices_count;
354*4882a593Smuzhiyun 	unsigned int subdevices_avail;
355*4882a593Smuzhiyun 	union snd_pcm_sync_id sync;	/* hardware synchronization ID */
356*4882a593Smuzhiyun 	unsigned char reserved[64];	/* reserved for future... */
357*4882a593Smuzhiyun };
358*4882a593Smuzhiyun 
359*4882a593Smuzhiyun typedef int snd_pcm_hw_param_t;
360*4882a593Smuzhiyun #define	SNDRV_PCM_HW_PARAM_ACCESS	0	/* Access type */
361*4882a593Smuzhiyun #define	SNDRV_PCM_HW_PARAM_FORMAT	1	/* Format */
362*4882a593Smuzhiyun #define	SNDRV_PCM_HW_PARAM_SUBFORMAT	2	/* Subformat */
363*4882a593Smuzhiyun #define	SNDRV_PCM_HW_PARAM_FIRST_MASK	SNDRV_PCM_HW_PARAM_ACCESS
364*4882a593Smuzhiyun #define	SNDRV_PCM_HW_PARAM_LAST_MASK	SNDRV_PCM_HW_PARAM_SUBFORMAT
365*4882a593Smuzhiyun 
366*4882a593Smuzhiyun #define	SNDRV_PCM_HW_PARAM_SAMPLE_BITS	8	/* Bits per sample */
367*4882a593Smuzhiyun #define	SNDRV_PCM_HW_PARAM_FRAME_BITS	9	/* Bits per frame */
368*4882a593Smuzhiyun #define	SNDRV_PCM_HW_PARAM_CHANNELS	10	/* Channels */
369*4882a593Smuzhiyun #define	SNDRV_PCM_HW_PARAM_RATE		11	/* Approx rate */
370*4882a593Smuzhiyun #define	SNDRV_PCM_HW_PARAM_PERIOD_TIME	12	/* Approx distance between
371*4882a593Smuzhiyun 						 * interrupts in us
372*4882a593Smuzhiyun 						 */
373*4882a593Smuzhiyun #define	SNDRV_PCM_HW_PARAM_PERIOD_SIZE	13	/* Approx frames between
374*4882a593Smuzhiyun 						 * interrupts
375*4882a593Smuzhiyun 						 */
376*4882a593Smuzhiyun #define	SNDRV_PCM_HW_PARAM_PERIOD_BYTES	14	/* Approx bytes between
377*4882a593Smuzhiyun 						 * interrupts
378*4882a593Smuzhiyun 						 */
379*4882a593Smuzhiyun #define	SNDRV_PCM_HW_PARAM_PERIODS	15	/* Approx interrupts per
380*4882a593Smuzhiyun 						 * buffer
381*4882a593Smuzhiyun 						 */
382*4882a593Smuzhiyun #define	SNDRV_PCM_HW_PARAM_BUFFER_TIME	16	/* Approx duration of buffer
383*4882a593Smuzhiyun 						 * in us
384*4882a593Smuzhiyun 						 */
385*4882a593Smuzhiyun #define	SNDRV_PCM_HW_PARAM_BUFFER_SIZE	17	/* Size of buffer in frames */
386*4882a593Smuzhiyun #define	SNDRV_PCM_HW_PARAM_BUFFER_BYTES	18	/* Size of buffer in bytes */
387*4882a593Smuzhiyun #define	SNDRV_PCM_HW_PARAM_TICK_TIME	19	/* Approx tick duration in us */
388*4882a593Smuzhiyun #define	SNDRV_PCM_HW_PARAM_FIRST_INTERVAL	SNDRV_PCM_HW_PARAM_SAMPLE_BITS
389*4882a593Smuzhiyun #define	SNDRV_PCM_HW_PARAM_LAST_INTERVAL	SNDRV_PCM_HW_PARAM_TICK_TIME
390*4882a593Smuzhiyun 
391*4882a593Smuzhiyun #define SNDRV_PCM_HW_PARAMS_NORESAMPLE	(1<<0)	/* avoid rate resampling */
392*4882a593Smuzhiyun #define SNDRV_PCM_HW_PARAMS_EXPORT_BUFFER	(1<<1)	/* export buffer */
393*4882a593Smuzhiyun #define SNDRV_PCM_HW_PARAMS_NO_PERIOD_WAKEUP	(1<<2)	/* disable period wakeups */
394*4882a593Smuzhiyun 
395*4882a593Smuzhiyun struct snd_interval {
396*4882a593Smuzhiyun 	unsigned int min, max;
397*4882a593Smuzhiyun 	unsigned int openmin:1,
398*4882a593Smuzhiyun 		     openmax:1,
399*4882a593Smuzhiyun 		     integer:1,
400*4882a593Smuzhiyun 		     empty:1;
401*4882a593Smuzhiyun };
402*4882a593Smuzhiyun 
403*4882a593Smuzhiyun #define SNDRV_MASK_MAX	256
404*4882a593Smuzhiyun 
405*4882a593Smuzhiyun struct snd_mask {
406*4882a593Smuzhiyun 	__u32 bits[(SNDRV_MASK_MAX+31)/32];
407*4882a593Smuzhiyun };
408*4882a593Smuzhiyun 
409*4882a593Smuzhiyun struct snd_pcm_hw_params {
410*4882a593Smuzhiyun 	unsigned int flags;
411*4882a593Smuzhiyun 	struct snd_mask masks[SNDRV_PCM_HW_PARAM_LAST_MASK -
412*4882a593Smuzhiyun 			       SNDRV_PCM_HW_PARAM_FIRST_MASK + 1];
413*4882a593Smuzhiyun 	struct snd_mask mres[5];	/* reserved masks */
414*4882a593Smuzhiyun 	struct snd_interval intervals[SNDRV_PCM_HW_PARAM_LAST_INTERVAL -
415*4882a593Smuzhiyun 				        SNDRV_PCM_HW_PARAM_FIRST_INTERVAL + 1];
416*4882a593Smuzhiyun 	struct snd_interval ires[9];	/* reserved intervals */
417*4882a593Smuzhiyun 	unsigned int rmask;		/* W: requested masks */
418*4882a593Smuzhiyun 	unsigned int cmask;		/* R: changed masks */
419*4882a593Smuzhiyun 	unsigned int info;		/* R: Info flags for returned setup */
420*4882a593Smuzhiyun 	unsigned int msbits;		/* R: used most significant bits */
421*4882a593Smuzhiyun 	unsigned int rate_num;		/* R: rate numerator */
422*4882a593Smuzhiyun 	unsigned int rate_den;		/* R: rate denominator */
423*4882a593Smuzhiyun 	snd_pcm_uframes_t fifo_size;	/* R: chip FIFO size in frames */
424*4882a593Smuzhiyun 	unsigned char reserved[64];	/* reserved for future */
425*4882a593Smuzhiyun };
426*4882a593Smuzhiyun 
427*4882a593Smuzhiyun enum {
428*4882a593Smuzhiyun 	SNDRV_PCM_TSTAMP_NONE = 0,
429*4882a593Smuzhiyun 	SNDRV_PCM_TSTAMP_ENABLE,
430*4882a593Smuzhiyun 	SNDRV_PCM_TSTAMP_LAST = SNDRV_PCM_TSTAMP_ENABLE,
431*4882a593Smuzhiyun };
432*4882a593Smuzhiyun 
433*4882a593Smuzhiyun struct snd_pcm_sw_params {
434*4882a593Smuzhiyun 	int tstamp_mode;			/* timestamp mode */
435*4882a593Smuzhiyun 	unsigned int period_step;
436*4882a593Smuzhiyun 	unsigned int sleep_min;			/* min ticks to sleep */
437*4882a593Smuzhiyun 	snd_pcm_uframes_t avail_min;		/* min avail frames for wakeup */
438*4882a593Smuzhiyun 	snd_pcm_uframes_t xfer_align;		/* obsolete: xfer size need to be a multiple */
439*4882a593Smuzhiyun 	snd_pcm_uframes_t start_threshold;	/* min hw_avail frames for automatic start */
440*4882a593Smuzhiyun 	snd_pcm_uframes_t stop_threshold;	/* min avail frames for automatic stop */
441*4882a593Smuzhiyun 	snd_pcm_uframes_t silence_threshold;	/* min distance from noise for silence filling */
442*4882a593Smuzhiyun 	snd_pcm_uframes_t silence_size;		/* silence block size */
443*4882a593Smuzhiyun 	snd_pcm_uframes_t boundary;		/* pointers wrap point */
444*4882a593Smuzhiyun 	unsigned int proto;			/* protocol version */
445*4882a593Smuzhiyun 	unsigned int tstamp_type;		/* timestamp type (req. proto >= 2.0.12) */
446*4882a593Smuzhiyun 	unsigned char reserved[56];		/* reserved for future */
447*4882a593Smuzhiyun };
448*4882a593Smuzhiyun 
449*4882a593Smuzhiyun struct snd_pcm_channel_info {
450*4882a593Smuzhiyun 	unsigned int channel;
451*4882a593Smuzhiyun 	__kernel_off_t offset;		/* mmap offset */
452*4882a593Smuzhiyun 	unsigned int first;		/* offset to first sample in bits */
453*4882a593Smuzhiyun 	unsigned int step;		/* samples distance in bits */
454*4882a593Smuzhiyun };
455*4882a593Smuzhiyun 
456*4882a593Smuzhiyun enum {
457*4882a593Smuzhiyun 	/*
458*4882a593Smuzhiyun 	 *  first definition for backwards compatibility only,
459*4882a593Smuzhiyun 	 *  maps to wallclock/link time for HDAudio playback and DEFAULT/DMA time for everything else
460*4882a593Smuzhiyun 	 */
461*4882a593Smuzhiyun 	SNDRV_PCM_AUDIO_TSTAMP_TYPE_COMPAT = 0,
462*4882a593Smuzhiyun 
463*4882a593Smuzhiyun 	/* timestamp definitions */
464*4882a593Smuzhiyun 	SNDRV_PCM_AUDIO_TSTAMP_TYPE_DEFAULT = 1,           /* DMA time, reported as per hw_ptr */
465*4882a593Smuzhiyun 	SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK = 2,	           /* link time reported by sample or wallclock counter, reset on startup */
466*4882a593Smuzhiyun 	SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK_ABSOLUTE = 3,	   /* link time reported by sample or wallclock counter, not reset on startup */
467*4882a593Smuzhiyun 	SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK_ESTIMATED = 4,    /* link time estimated indirectly */
468*4882a593Smuzhiyun 	SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK_SYNCHRONIZED = 5, /* link time synchronized with system time */
469*4882a593Smuzhiyun 	SNDRV_PCM_AUDIO_TSTAMP_TYPE_LAST = SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK_SYNCHRONIZED
470*4882a593Smuzhiyun };
471*4882a593Smuzhiyun 
472*4882a593Smuzhiyun #ifndef __KERNEL__
473*4882a593Smuzhiyun /* explicit padding avoids incompatibility between i386 and x86-64 */
474*4882a593Smuzhiyun typedef struct { unsigned char pad[sizeof(time_t) - sizeof(int)]; } __time_pad;
475*4882a593Smuzhiyun 
476*4882a593Smuzhiyun struct snd_pcm_status {
477*4882a593Smuzhiyun 	snd_pcm_state_t state;		/* stream state */
478*4882a593Smuzhiyun 	__time_pad pad1;		/* align to timespec */
479*4882a593Smuzhiyun 	struct timespec trigger_tstamp;	/* time when stream was started/stopped/paused */
480*4882a593Smuzhiyun 	struct timespec tstamp;		/* reference timestamp */
481*4882a593Smuzhiyun 	snd_pcm_uframes_t appl_ptr;	/* appl ptr */
482*4882a593Smuzhiyun 	snd_pcm_uframes_t hw_ptr;	/* hw ptr */
483*4882a593Smuzhiyun 	snd_pcm_sframes_t delay;	/* current delay in frames */
484*4882a593Smuzhiyun 	snd_pcm_uframes_t avail;	/* number of frames available */
485*4882a593Smuzhiyun 	snd_pcm_uframes_t avail_max;	/* max frames available on hw since last status */
486*4882a593Smuzhiyun 	snd_pcm_uframes_t overrange;	/* count of ADC (capture) overrange detections from last status */
487*4882a593Smuzhiyun 	snd_pcm_state_t suspended_state; /* suspended stream state */
488*4882a593Smuzhiyun 	__u32 audio_tstamp_data;	 /* needed for 64-bit alignment, used for configs/report to/from userspace */
489*4882a593Smuzhiyun 	struct timespec audio_tstamp;	/* sample counter, wall clock, PHC or on-demand sync'ed */
490*4882a593Smuzhiyun 	struct timespec driver_tstamp;	/* useful in case reference system tstamp is reported with delay */
491*4882a593Smuzhiyun 	__u32 audio_tstamp_accuracy;	/* in ns units, only valid if indicated in audio_tstamp_data */
492*4882a593Smuzhiyun 	unsigned char reserved[52-2*sizeof(struct timespec)]; /* must be filled with zero */
493*4882a593Smuzhiyun };
494*4882a593Smuzhiyun #endif
495*4882a593Smuzhiyun 
496*4882a593Smuzhiyun /*
497*4882a593Smuzhiyun  * For mmap operations, we need the 64-bit layout, both for compat mode,
498*4882a593Smuzhiyun  * and for y2038 compatibility. For 64-bit applications, the two definitions
499*4882a593Smuzhiyun  * are identical, so we keep the traditional version.
500*4882a593Smuzhiyun  */
501*4882a593Smuzhiyun #ifdef __SND_STRUCT_TIME64
502*4882a593Smuzhiyun #define __snd_pcm_mmap_status64		snd_pcm_mmap_status
503*4882a593Smuzhiyun #define __snd_pcm_mmap_control64	snd_pcm_mmap_control
504*4882a593Smuzhiyun #define __snd_pcm_sync_ptr64		snd_pcm_sync_ptr
505*4882a593Smuzhiyun #ifdef __KERNEL__
506*4882a593Smuzhiyun #define __snd_timespec64		__kernel_timespec
507*4882a593Smuzhiyun #else
508*4882a593Smuzhiyun #define __snd_timespec64		timespec
509*4882a593Smuzhiyun #endif
510*4882a593Smuzhiyun struct __snd_timespec {
511*4882a593Smuzhiyun 	__s32 tv_sec;
512*4882a593Smuzhiyun 	__s32 tv_nsec;
513*4882a593Smuzhiyun };
514*4882a593Smuzhiyun #else
515*4882a593Smuzhiyun #define __snd_pcm_mmap_status		snd_pcm_mmap_status
516*4882a593Smuzhiyun #define __snd_pcm_mmap_control		snd_pcm_mmap_control
517*4882a593Smuzhiyun #define __snd_pcm_sync_ptr		snd_pcm_sync_ptr
518*4882a593Smuzhiyun #define __snd_timespec			timespec
519*4882a593Smuzhiyun struct __snd_timespec64 {
520*4882a593Smuzhiyun 	__s64 tv_sec;
521*4882a593Smuzhiyun 	__s64 tv_nsec;
522*4882a593Smuzhiyun };
523*4882a593Smuzhiyun 
524*4882a593Smuzhiyun #endif
525*4882a593Smuzhiyun 
526*4882a593Smuzhiyun struct __snd_pcm_mmap_status {
527*4882a593Smuzhiyun 	snd_pcm_state_t state;		/* RO: state - SNDRV_PCM_STATE_XXXX */
528*4882a593Smuzhiyun 	int pad1;			/* Needed for 64 bit alignment */
529*4882a593Smuzhiyun 	snd_pcm_uframes_t hw_ptr;	/* RO: hw ptr (0...boundary-1) */
530*4882a593Smuzhiyun 	struct __snd_timespec tstamp;	/* Timestamp */
531*4882a593Smuzhiyun 	snd_pcm_state_t suspended_state; /* RO: suspended stream state */
532*4882a593Smuzhiyun 	struct __snd_timespec audio_tstamp; /* from sample counter or wall clock */
533*4882a593Smuzhiyun };
534*4882a593Smuzhiyun 
535*4882a593Smuzhiyun struct __snd_pcm_mmap_control {
536*4882a593Smuzhiyun 	snd_pcm_uframes_t appl_ptr;	/* RW: appl ptr (0...boundary-1) */
537*4882a593Smuzhiyun 	snd_pcm_uframes_t avail_min;	/* RW: min available frames for wakeup */
538*4882a593Smuzhiyun };
539*4882a593Smuzhiyun 
540*4882a593Smuzhiyun #define SNDRV_PCM_SYNC_PTR_HWSYNC	(1<<0)	/* execute hwsync */
541*4882a593Smuzhiyun #define SNDRV_PCM_SYNC_PTR_APPL		(1<<1)	/* get appl_ptr from driver (r/w op) */
542*4882a593Smuzhiyun #define SNDRV_PCM_SYNC_PTR_AVAIL_MIN	(1<<2)	/* get avail_min from driver */
543*4882a593Smuzhiyun 
544*4882a593Smuzhiyun struct __snd_pcm_sync_ptr {
545*4882a593Smuzhiyun 	unsigned int flags;
546*4882a593Smuzhiyun 	union {
547*4882a593Smuzhiyun 		struct __snd_pcm_mmap_status status;
548*4882a593Smuzhiyun 		unsigned char reserved[64];
549*4882a593Smuzhiyun 	} s;
550*4882a593Smuzhiyun 	union {
551*4882a593Smuzhiyun 		struct __snd_pcm_mmap_control control;
552*4882a593Smuzhiyun 		unsigned char reserved[64];
553*4882a593Smuzhiyun 	} c;
554*4882a593Smuzhiyun };
555*4882a593Smuzhiyun 
556*4882a593Smuzhiyun #if defined(__BYTE_ORDER) ? __BYTE_ORDER == __BIG_ENDIAN : defined(__BIG_ENDIAN)
557*4882a593Smuzhiyun typedef char __pad_before_uframe[sizeof(__u64) - sizeof(snd_pcm_uframes_t)];
558*4882a593Smuzhiyun typedef char __pad_after_uframe[0];
559*4882a593Smuzhiyun #endif
560*4882a593Smuzhiyun 
561*4882a593Smuzhiyun #if defined(__BYTE_ORDER) ? __BYTE_ORDER == __LITTLE_ENDIAN : defined(__LITTLE_ENDIAN)
562*4882a593Smuzhiyun typedef char __pad_before_uframe[0];
563*4882a593Smuzhiyun typedef char __pad_after_uframe[sizeof(__u64) - sizeof(snd_pcm_uframes_t)];
564*4882a593Smuzhiyun #endif
565*4882a593Smuzhiyun 
566*4882a593Smuzhiyun struct __snd_pcm_mmap_status64 {
567*4882a593Smuzhiyun 	snd_pcm_state_t state;		/* RO: state - SNDRV_PCM_STATE_XXXX */
568*4882a593Smuzhiyun 	__u32 pad1;			/* Needed for 64 bit alignment */
569*4882a593Smuzhiyun 	__pad_before_uframe __pad1;
570*4882a593Smuzhiyun 	snd_pcm_uframes_t hw_ptr;	/* RO: hw ptr (0...boundary-1) */
571*4882a593Smuzhiyun 	__pad_after_uframe __pad2;
572*4882a593Smuzhiyun 	struct __snd_timespec64 tstamp;	/* Timestamp */
573*4882a593Smuzhiyun 	snd_pcm_state_t suspended_state;/* RO: suspended stream state */
574*4882a593Smuzhiyun 	__u32 pad3;			/* Needed for 64 bit alignment */
575*4882a593Smuzhiyun 	struct __snd_timespec64 audio_tstamp; /* sample counter or wall clock */
576*4882a593Smuzhiyun };
577*4882a593Smuzhiyun 
578*4882a593Smuzhiyun struct __snd_pcm_mmap_control64 {
579*4882a593Smuzhiyun 	__pad_before_uframe __pad1;
580*4882a593Smuzhiyun 	snd_pcm_uframes_t appl_ptr;	 /* RW: appl ptr (0...boundary-1) */
581*4882a593Smuzhiyun 	__pad_before_uframe __pad2;
582*4882a593Smuzhiyun 
583*4882a593Smuzhiyun 	__pad_before_uframe __pad3;
584*4882a593Smuzhiyun 	snd_pcm_uframes_t  avail_min;	 /* RW: min available frames for wakeup */
585*4882a593Smuzhiyun 	__pad_after_uframe __pad4;
586*4882a593Smuzhiyun };
587*4882a593Smuzhiyun 
588*4882a593Smuzhiyun struct __snd_pcm_sync_ptr64 {
589*4882a593Smuzhiyun 	__u32 flags;
590*4882a593Smuzhiyun 	__u32 pad1;
591*4882a593Smuzhiyun 	union {
592*4882a593Smuzhiyun 		struct __snd_pcm_mmap_status64 status;
593*4882a593Smuzhiyun 		unsigned char reserved[64];
594*4882a593Smuzhiyun 	} s;
595*4882a593Smuzhiyun 	union {
596*4882a593Smuzhiyun 		struct __snd_pcm_mmap_control64 control;
597*4882a593Smuzhiyun 		unsigned char reserved[64];
598*4882a593Smuzhiyun 	} c;
599*4882a593Smuzhiyun };
600*4882a593Smuzhiyun 
601*4882a593Smuzhiyun struct snd_xferi {
602*4882a593Smuzhiyun 	snd_pcm_sframes_t result;
603*4882a593Smuzhiyun 	void __user *buf;
604*4882a593Smuzhiyun 	snd_pcm_uframes_t frames;
605*4882a593Smuzhiyun };
606*4882a593Smuzhiyun 
607*4882a593Smuzhiyun struct snd_xfern {
608*4882a593Smuzhiyun 	snd_pcm_sframes_t result;
609*4882a593Smuzhiyun 	void __user * __user *bufs;
610*4882a593Smuzhiyun 	snd_pcm_uframes_t frames;
611*4882a593Smuzhiyun };
612*4882a593Smuzhiyun 
613*4882a593Smuzhiyun enum {
614*4882a593Smuzhiyun 	SNDRV_PCM_TSTAMP_TYPE_GETTIMEOFDAY = 0,	/* gettimeofday equivalent */
615*4882a593Smuzhiyun 	SNDRV_PCM_TSTAMP_TYPE_MONOTONIC,	/* posix_clock_monotonic equivalent */
616*4882a593Smuzhiyun 	SNDRV_PCM_TSTAMP_TYPE_MONOTONIC_RAW,    /* monotonic_raw (no NTP) */
617*4882a593Smuzhiyun 	SNDRV_PCM_TSTAMP_TYPE_LAST = SNDRV_PCM_TSTAMP_TYPE_MONOTONIC_RAW,
618*4882a593Smuzhiyun };
619*4882a593Smuzhiyun 
620*4882a593Smuzhiyun /* channel positions */
621*4882a593Smuzhiyun enum {
622*4882a593Smuzhiyun 	SNDRV_CHMAP_UNKNOWN = 0,
623*4882a593Smuzhiyun 	SNDRV_CHMAP_NA,		/* N/A, silent */
624*4882a593Smuzhiyun 	SNDRV_CHMAP_MONO,	/* mono stream */
625*4882a593Smuzhiyun 	/* this follows the alsa-lib mixer channel value + 3 */
626*4882a593Smuzhiyun 	SNDRV_CHMAP_FL,		/* front left */
627*4882a593Smuzhiyun 	SNDRV_CHMAP_FR,		/* front right */
628*4882a593Smuzhiyun 	SNDRV_CHMAP_RL,		/* rear left */
629*4882a593Smuzhiyun 	SNDRV_CHMAP_RR,		/* rear right */
630*4882a593Smuzhiyun 	SNDRV_CHMAP_FC,		/* front center */
631*4882a593Smuzhiyun 	SNDRV_CHMAP_LFE,	/* LFE */
632*4882a593Smuzhiyun 	SNDRV_CHMAP_SL,		/* side left */
633*4882a593Smuzhiyun 	SNDRV_CHMAP_SR,		/* side right */
634*4882a593Smuzhiyun 	SNDRV_CHMAP_RC,		/* rear center */
635*4882a593Smuzhiyun 	/* new definitions */
636*4882a593Smuzhiyun 	SNDRV_CHMAP_FLC,	/* front left center */
637*4882a593Smuzhiyun 	SNDRV_CHMAP_FRC,	/* front right center */
638*4882a593Smuzhiyun 	SNDRV_CHMAP_RLC,	/* rear left center */
639*4882a593Smuzhiyun 	SNDRV_CHMAP_RRC,	/* rear right center */
640*4882a593Smuzhiyun 	SNDRV_CHMAP_FLW,	/* front left wide */
641*4882a593Smuzhiyun 	SNDRV_CHMAP_FRW,	/* front right wide */
642*4882a593Smuzhiyun 	SNDRV_CHMAP_FLH,	/* front left high */
643*4882a593Smuzhiyun 	SNDRV_CHMAP_FCH,	/* front center high */
644*4882a593Smuzhiyun 	SNDRV_CHMAP_FRH,	/* front right high */
645*4882a593Smuzhiyun 	SNDRV_CHMAP_TC,		/* top center */
646*4882a593Smuzhiyun 	SNDRV_CHMAP_TFL,	/* top front left */
647*4882a593Smuzhiyun 	SNDRV_CHMAP_TFR,	/* top front right */
648*4882a593Smuzhiyun 	SNDRV_CHMAP_TFC,	/* top front center */
649*4882a593Smuzhiyun 	SNDRV_CHMAP_TRL,	/* top rear left */
650*4882a593Smuzhiyun 	SNDRV_CHMAP_TRR,	/* top rear right */
651*4882a593Smuzhiyun 	SNDRV_CHMAP_TRC,	/* top rear center */
652*4882a593Smuzhiyun 	/* new definitions for UAC2 */
653*4882a593Smuzhiyun 	SNDRV_CHMAP_TFLC,	/* top front left center */
654*4882a593Smuzhiyun 	SNDRV_CHMAP_TFRC,	/* top front right center */
655*4882a593Smuzhiyun 	SNDRV_CHMAP_TSL,	/* top side left */
656*4882a593Smuzhiyun 	SNDRV_CHMAP_TSR,	/* top side right */
657*4882a593Smuzhiyun 	SNDRV_CHMAP_LLFE,	/* left LFE */
658*4882a593Smuzhiyun 	SNDRV_CHMAP_RLFE,	/* right LFE */
659*4882a593Smuzhiyun 	SNDRV_CHMAP_BC,		/* bottom center */
660*4882a593Smuzhiyun 	SNDRV_CHMAP_BLC,	/* bottom left center */
661*4882a593Smuzhiyun 	SNDRV_CHMAP_BRC,	/* bottom right center */
662*4882a593Smuzhiyun 	SNDRV_CHMAP_LAST = SNDRV_CHMAP_BRC,
663*4882a593Smuzhiyun };
664*4882a593Smuzhiyun 
665*4882a593Smuzhiyun #define SNDRV_CHMAP_POSITION_MASK	0xffff
666*4882a593Smuzhiyun #define SNDRV_CHMAP_PHASE_INVERSE	(0x01 << 16)
667*4882a593Smuzhiyun #define SNDRV_CHMAP_DRIVER_SPEC		(0x02 << 16)
668*4882a593Smuzhiyun 
669*4882a593Smuzhiyun #define SNDRV_PCM_IOCTL_PVERSION	_IOR('A', 0x00, int)
670*4882a593Smuzhiyun #define SNDRV_PCM_IOCTL_INFO		_IOR('A', 0x01, struct snd_pcm_info)
671*4882a593Smuzhiyun #define SNDRV_PCM_IOCTL_TSTAMP		_IOW('A', 0x02, int)
672*4882a593Smuzhiyun #define SNDRV_PCM_IOCTL_TTSTAMP		_IOW('A', 0x03, int)
673*4882a593Smuzhiyun #define SNDRV_PCM_IOCTL_USER_PVERSION	_IOW('A', 0x04, int)
674*4882a593Smuzhiyun #define SNDRV_PCM_IOCTL_HW_REFINE	_IOWR('A', 0x10, struct snd_pcm_hw_params)
675*4882a593Smuzhiyun #define SNDRV_PCM_IOCTL_HW_PARAMS	_IOWR('A', 0x11, struct snd_pcm_hw_params)
676*4882a593Smuzhiyun #define SNDRV_PCM_IOCTL_HW_FREE		_IO('A', 0x12)
677*4882a593Smuzhiyun #define SNDRV_PCM_IOCTL_SW_PARAMS	_IOWR('A', 0x13, struct snd_pcm_sw_params)
678*4882a593Smuzhiyun #define SNDRV_PCM_IOCTL_STATUS		_IOR('A', 0x20, struct snd_pcm_status)
679*4882a593Smuzhiyun #define SNDRV_PCM_IOCTL_DELAY		_IOR('A', 0x21, snd_pcm_sframes_t)
680*4882a593Smuzhiyun #define SNDRV_PCM_IOCTL_HWSYNC		_IO('A', 0x22)
681*4882a593Smuzhiyun #define __SNDRV_PCM_IOCTL_SYNC_PTR	_IOWR('A', 0x23, struct __snd_pcm_sync_ptr)
682*4882a593Smuzhiyun #define __SNDRV_PCM_IOCTL_SYNC_PTR64	_IOWR('A', 0x23, struct __snd_pcm_sync_ptr64)
683*4882a593Smuzhiyun #define SNDRV_PCM_IOCTL_SYNC_PTR	_IOWR('A', 0x23, struct snd_pcm_sync_ptr)
684*4882a593Smuzhiyun #define SNDRV_PCM_IOCTL_STATUS_EXT	_IOWR('A', 0x24, struct snd_pcm_status)
685*4882a593Smuzhiyun #define SNDRV_PCM_IOCTL_CHANNEL_INFO	_IOR('A', 0x32, struct snd_pcm_channel_info)
686*4882a593Smuzhiyun #define SNDRV_PCM_IOCTL_PREPARE		_IO('A', 0x40)
687*4882a593Smuzhiyun #define SNDRV_PCM_IOCTL_RESET		_IO('A', 0x41)
688*4882a593Smuzhiyun #define SNDRV_PCM_IOCTL_START		_IO('A', 0x42)
689*4882a593Smuzhiyun #define SNDRV_PCM_IOCTL_DROP		_IO('A', 0x43)
690*4882a593Smuzhiyun #define SNDRV_PCM_IOCTL_DRAIN		_IO('A', 0x44)
691*4882a593Smuzhiyun #define SNDRV_PCM_IOCTL_PAUSE		_IOW('A', 0x45, int)
692*4882a593Smuzhiyun #define SNDRV_PCM_IOCTL_REWIND		_IOW('A', 0x46, snd_pcm_uframes_t)
693*4882a593Smuzhiyun #define SNDRV_PCM_IOCTL_RESUME		_IO('A', 0x47)
694*4882a593Smuzhiyun #define SNDRV_PCM_IOCTL_XRUN		_IO('A', 0x48)
695*4882a593Smuzhiyun #define SNDRV_PCM_IOCTL_FORWARD		_IOW('A', 0x49, snd_pcm_uframes_t)
696*4882a593Smuzhiyun #define SNDRV_PCM_IOCTL_WRITEI_FRAMES	_IOW('A', 0x50, struct snd_xferi)
697*4882a593Smuzhiyun #define SNDRV_PCM_IOCTL_READI_FRAMES	_IOR('A', 0x51, struct snd_xferi)
698*4882a593Smuzhiyun #define SNDRV_PCM_IOCTL_WRITEN_FRAMES	_IOW('A', 0x52, struct snd_xfern)
699*4882a593Smuzhiyun #define SNDRV_PCM_IOCTL_READN_FRAMES	_IOR('A', 0x53, struct snd_xfern)
700*4882a593Smuzhiyun #define SNDRV_PCM_IOCTL_LINK		_IOW('A', 0x60, int)
701*4882a593Smuzhiyun #define SNDRV_PCM_IOCTL_UNLINK		_IO('A', 0x61)
702*4882a593Smuzhiyun 
703*4882a593Smuzhiyun /*****************************************************************************
704*4882a593Smuzhiyun  *                                                                           *
705*4882a593Smuzhiyun  *                            MIDI v1.0 interface                            *
706*4882a593Smuzhiyun  *                                                                           *
707*4882a593Smuzhiyun  *****************************************************************************/
708*4882a593Smuzhiyun 
709*4882a593Smuzhiyun /*
710*4882a593Smuzhiyun  *  Raw MIDI section - /dev/snd/midi??
711*4882a593Smuzhiyun  */
712*4882a593Smuzhiyun 
713*4882a593Smuzhiyun #define SNDRV_RAWMIDI_VERSION		SNDRV_PROTOCOL_VERSION(2, 0, 1)
714*4882a593Smuzhiyun 
715*4882a593Smuzhiyun enum {
716*4882a593Smuzhiyun 	SNDRV_RAWMIDI_STREAM_OUTPUT = 0,
717*4882a593Smuzhiyun 	SNDRV_RAWMIDI_STREAM_INPUT,
718*4882a593Smuzhiyun 	SNDRV_RAWMIDI_STREAM_LAST = SNDRV_RAWMIDI_STREAM_INPUT,
719*4882a593Smuzhiyun };
720*4882a593Smuzhiyun 
721*4882a593Smuzhiyun #define SNDRV_RAWMIDI_INFO_OUTPUT		0x00000001
722*4882a593Smuzhiyun #define SNDRV_RAWMIDI_INFO_INPUT		0x00000002
723*4882a593Smuzhiyun #define SNDRV_RAWMIDI_INFO_DUPLEX		0x00000004
724*4882a593Smuzhiyun 
725*4882a593Smuzhiyun struct snd_rawmidi_info {
726*4882a593Smuzhiyun 	unsigned int device;		/* RO/WR (control): device number */
727*4882a593Smuzhiyun 	unsigned int subdevice;		/* RO/WR (control): subdevice number */
728*4882a593Smuzhiyun 	int stream;			/* WR: stream */
729*4882a593Smuzhiyun 	int card;			/* R: card number */
730*4882a593Smuzhiyun 	unsigned int flags;		/* SNDRV_RAWMIDI_INFO_XXXX */
731*4882a593Smuzhiyun 	unsigned char id[64];		/* ID (user selectable) */
732*4882a593Smuzhiyun 	unsigned char name[80];		/* name of device */
733*4882a593Smuzhiyun 	unsigned char subname[32];	/* name of active or selected subdevice */
734*4882a593Smuzhiyun 	unsigned int subdevices_count;
735*4882a593Smuzhiyun 	unsigned int subdevices_avail;
736*4882a593Smuzhiyun 	unsigned char reserved[64];	/* reserved for future use */
737*4882a593Smuzhiyun };
738*4882a593Smuzhiyun 
739*4882a593Smuzhiyun struct snd_rawmidi_params {
740*4882a593Smuzhiyun 	int stream;
741*4882a593Smuzhiyun 	size_t buffer_size;		/* queue size in bytes */
742*4882a593Smuzhiyun 	size_t avail_min;		/* minimum avail bytes for wakeup */
743*4882a593Smuzhiyun 	unsigned int no_active_sensing: 1; /* do not send active sensing byte in close() */
744*4882a593Smuzhiyun 	unsigned char reserved[16];	/* reserved for future use */
745*4882a593Smuzhiyun };
746*4882a593Smuzhiyun 
747*4882a593Smuzhiyun #ifndef __KERNEL__
748*4882a593Smuzhiyun struct snd_rawmidi_status {
749*4882a593Smuzhiyun 	int stream;
750*4882a593Smuzhiyun 	__time_pad pad1;
751*4882a593Smuzhiyun 	struct timespec tstamp;		/* Timestamp */
752*4882a593Smuzhiyun 	size_t avail;			/* available bytes */
753*4882a593Smuzhiyun 	size_t xruns;			/* count of overruns since last status (in bytes) */
754*4882a593Smuzhiyun 	unsigned char reserved[16];	/* reserved for future use */
755*4882a593Smuzhiyun };
756*4882a593Smuzhiyun #endif
757*4882a593Smuzhiyun 
758*4882a593Smuzhiyun #define SNDRV_RAWMIDI_IOCTL_PVERSION	_IOR('W', 0x00, int)
759*4882a593Smuzhiyun #define SNDRV_RAWMIDI_IOCTL_INFO	_IOR('W', 0x01, struct snd_rawmidi_info)
760*4882a593Smuzhiyun #define SNDRV_RAWMIDI_IOCTL_PARAMS	_IOWR('W', 0x10, struct snd_rawmidi_params)
761*4882a593Smuzhiyun #define SNDRV_RAWMIDI_IOCTL_STATUS	_IOWR('W', 0x20, struct snd_rawmidi_status)
762*4882a593Smuzhiyun #define SNDRV_RAWMIDI_IOCTL_DROP	_IOW('W', 0x30, int)
763*4882a593Smuzhiyun #define SNDRV_RAWMIDI_IOCTL_DRAIN	_IOW('W', 0x31, int)
764*4882a593Smuzhiyun 
765*4882a593Smuzhiyun /*
766*4882a593Smuzhiyun  *  Timer section - /dev/snd/timer
767*4882a593Smuzhiyun  */
768*4882a593Smuzhiyun 
769*4882a593Smuzhiyun #define SNDRV_TIMER_VERSION		SNDRV_PROTOCOL_VERSION(2, 0, 7)
770*4882a593Smuzhiyun 
771*4882a593Smuzhiyun enum {
772*4882a593Smuzhiyun 	SNDRV_TIMER_CLASS_NONE = -1,
773*4882a593Smuzhiyun 	SNDRV_TIMER_CLASS_SLAVE = 0,
774*4882a593Smuzhiyun 	SNDRV_TIMER_CLASS_GLOBAL,
775*4882a593Smuzhiyun 	SNDRV_TIMER_CLASS_CARD,
776*4882a593Smuzhiyun 	SNDRV_TIMER_CLASS_PCM,
777*4882a593Smuzhiyun 	SNDRV_TIMER_CLASS_LAST = SNDRV_TIMER_CLASS_PCM,
778*4882a593Smuzhiyun };
779*4882a593Smuzhiyun 
780*4882a593Smuzhiyun /* slave timer classes */
781*4882a593Smuzhiyun enum {
782*4882a593Smuzhiyun 	SNDRV_TIMER_SCLASS_NONE = 0,
783*4882a593Smuzhiyun 	SNDRV_TIMER_SCLASS_APPLICATION,
784*4882a593Smuzhiyun 	SNDRV_TIMER_SCLASS_SEQUENCER,		/* alias */
785*4882a593Smuzhiyun 	SNDRV_TIMER_SCLASS_OSS_SEQUENCER,	/* alias */
786*4882a593Smuzhiyun 	SNDRV_TIMER_SCLASS_LAST = SNDRV_TIMER_SCLASS_OSS_SEQUENCER,
787*4882a593Smuzhiyun };
788*4882a593Smuzhiyun 
789*4882a593Smuzhiyun /* global timers (device member) */
790*4882a593Smuzhiyun #define SNDRV_TIMER_GLOBAL_SYSTEM	0
791*4882a593Smuzhiyun #define SNDRV_TIMER_GLOBAL_RTC		1	/* unused */
792*4882a593Smuzhiyun #define SNDRV_TIMER_GLOBAL_HPET		2
793*4882a593Smuzhiyun #define SNDRV_TIMER_GLOBAL_HRTIMER	3
794*4882a593Smuzhiyun 
795*4882a593Smuzhiyun /* info flags */
796*4882a593Smuzhiyun #define SNDRV_TIMER_FLG_SLAVE		(1<<0)	/* cannot be controlled */
797*4882a593Smuzhiyun 
798*4882a593Smuzhiyun struct snd_timer_id {
799*4882a593Smuzhiyun 	int dev_class;
800*4882a593Smuzhiyun 	int dev_sclass;
801*4882a593Smuzhiyun 	int card;
802*4882a593Smuzhiyun 	int device;
803*4882a593Smuzhiyun 	int subdevice;
804*4882a593Smuzhiyun };
805*4882a593Smuzhiyun 
806*4882a593Smuzhiyun struct snd_timer_ginfo {
807*4882a593Smuzhiyun 	struct snd_timer_id tid;	/* requested timer ID */
808*4882a593Smuzhiyun 	unsigned int flags;		/* timer flags - SNDRV_TIMER_FLG_* */
809*4882a593Smuzhiyun 	int card;			/* card number */
810*4882a593Smuzhiyun 	unsigned char id[64];		/* timer identification */
811*4882a593Smuzhiyun 	unsigned char name[80];		/* timer name */
812*4882a593Smuzhiyun 	unsigned long reserved0;	/* reserved for future use */
813*4882a593Smuzhiyun 	unsigned long resolution;	/* average period resolution in ns */
814*4882a593Smuzhiyun 	unsigned long resolution_min;	/* minimal period resolution in ns */
815*4882a593Smuzhiyun 	unsigned long resolution_max;	/* maximal period resolution in ns */
816*4882a593Smuzhiyun 	unsigned int clients;		/* active timer clients */
817*4882a593Smuzhiyun 	unsigned char reserved[32];
818*4882a593Smuzhiyun };
819*4882a593Smuzhiyun 
820*4882a593Smuzhiyun struct snd_timer_gparams {
821*4882a593Smuzhiyun 	struct snd_timer_id tid;	/* requested timer ID */
822*4882a593Smuzhiyun 	unsigned long period_num;	/* requested precise period duration (in seconds) - numerator */
823*4882a593Smuzhiyun 	unsigned long period_den;	/* requested precise period duration (in seconds) - denominator */
824*4882a593Smuzhiyun 	unsigned char reserved[32];
825*4882a593Smuzhiyun };
826*4882a593Smuzhiyun 
827*4882a593Smuzhiyun struct snd_timer_gstatus {
828*4882a593Smuzhiyun 	struct snd_timer_id tid;	/* requested timer ID */
829*4882a593Smuzhiyun 	unsigned long resolution;	/* current period resolution in ns */
830*4882a593Smuzhiyun 	unsigned long resolution_num;	/* precise current period resolution (in seconds) - numerator */
831*4882a593Smuzhiyun 	unsigned long resolution_den;	/* precise current period resolution (in seconds) - denominator */
832*4882a593Smuzhiyun 	unsigned char reserved[32];
833*4882a593Smuzhiyun };
834*4882a593Smuzhiyun 
835*4882a593Smuzhiyun struct snd_timer_select {
836*4882a593Smuzhiyun 	struct snd_timer_id id;	/* bind to timer ID */
837*4882a593Smuzhiyun 	unsigned char reserved[32];	/* reserved */
838*4882a593Smuzhiyun };
839*4882a593Smuzhiyun 
840*4882a593Smuzhiyun struct snd_timer_info {
841*4882a593Smuzhiyun 	unsigned int flags;		/* timer flags - SNDRV_TIMER_FLG_* */
842*4882a593Smuzhiyun 	int card;			/* card number */
843*4882a593Smuzhiyun 	unsigned char id[64];		/* timer identificator */
844*4882a593Smuzhiyun 	unsigned char name[80];		/* timer name */
845*4882a593Smuzhiyun 	unsigned long reserved0;	/* reserved for future use */
846*4882a593Smuzhiyun 	unsigned long resolution;	/* average period resolution in ns */
847*4882a593Smuzhiyun 	unsigned char reserved[64];	/* reserved */
848*4882a593Smuzhiyun };
849*4882a593Smuzhiyun 
850*4882a593Smuzhiyun #define SNDRV_TIMER_PSFLG_AUTO		(1<<0)	/* auto start, otherwise one-shot */
851*4882a593Smuzhiyun #define SNDRV_TIMER_PSFLG_EXCLUSIVE	(1<<1)	/* exclusive use, precise start/stop/pause/continue */
852*4882a593Smuzhiyun #define SNDRV_TIMER_PSFLG_EARLY_EVENT	(1<<2)	/* write early event to the poll queue */
853*4882a593Smuzhiyun 
854*4882a593Smuzhiyun struct snd_timer_params {
855*4882a593Smuzhiyun 	unsigned int flags;		/* flags - SNDRV_TIMER_PSFLG_* */
856*4882a593Smuzhiyun 	unsigned int ticks;		/* requested resolution in ticks */
857*4882a593Smuzhiyun 	unsigned int queue_size;	/* total size of queue (32-1024) */
858*4882a593Smuzhiyun 	unsigned int reserved0;		/* reserved, was: failure locations */
859*4882a593Smuzhiyun 	unsigned int filter;		/* event filter (bitmask of SNDRV_TIMER_EVENT_*) */
860*4882a593Smuzhiyun 	unsigned char reserved[60];	/* reserved */
861*4882a593Smuzhiyun };
862*4882a593Smuzhiyun 
863*4882a593Smuzhiyun #ifndef __KERNEL__
864*4882a593Smuzhiyun struct snd_timer_status {
865*4882a593Smuzhiyun 	struct timespec tstamp;		/* Timestamp - last update */
866*4882a593Smuzhiyun 	unsigned int resolution;	/* current period resolution in ns */
867*4882a593Smuzhiyun 	unsigned int lost;		/* counter of master tick lost */
868*4882a593Smuzhiyun 	unsigned int overrun;		/* count of read queue overruns */
869*4882a593Smuzhiyun 	unsigned int queue;		/* used queue size */
870*4882a593Smuzhiyun 	unsigned char reserved[64];	/* reserved */
871*4882a593Smuzhiyun };
872*4882a593Smuzhiyun #endif
873*4882a593Smuzhiyun 
874*4882a593Smuzhiyun #define SNDRV_TIMER_IOCTL_PVERSION	_IOR('T', 0x00, int)
875*4882a593Smuzhiyun #define SNDRV_TIMER_IOCTL_NEXT_DEVICE	_IOWR('T', 0x01, struct snd_timer_id)
876*4882a593Smuzhiyun #define SNDRV_TIMER_IOCTL_TREAD_OLD	_IOW('T', 0x02, int)
877*4882a593Smuzhiyun #define SNDRV_TIMER_IOCTL_GINFO		_IOWR('T', 0x03, struct snd_timer_ginfo)
878*4882a593Smuzhiyun #define SNDRV_TIMER_IOCTL_GPARAMS	_IOW('T', 0x04, struct snd_timer_gparams)
879*4882a593Smuzhiyun #define SNDRV_TIMER_IOCTL_GSTATUS	_IOWR('T', 0x05, struct snd_timer_gstatus)
880*4882a593Smuzhiyun #define SNDRV_TIMER_IOCTL_SELECT	_IOW('T', 0x10, struct snd_timer_select)
881*4882a593Smuzhiyun #define SNDRV_TIMER_IOCTL_INFO		_IOR('T', 0x11, struct snd_timer_info)
882*4882a593Smuzhiyun #define SNDRV_TIMER_IOCTL_PARAMS	_IOW('T', 0x12, struct snd_timer_params)
883*4882a593Smuzhiyun #define SNDRV_TIMER_IOCTL_STATUS	_IOR('T', 0x14, struct snd_timer_status)
884*4882a593Smuzhiyun /* The following four ioctls are changed since 1.0.9 due to confliction */
885*4882a593Smuzhiyun #define SNDRV_TIMER_IOCTL_START		_IO('T', 0xa0)
886*4882a593Smuzhiyun #define SNDRV_TIMER_IOCTL_STOP		_IO('T', 0xa1)
887*4882a593Smuzhiyun #define SNDRV_TIMER_IOCTL_CONTINUE	_IO('T', 0xa2)
888*4882a593Smuzhiyun #define SNDRV_TIMER_IOCTL_PAUSE		_IO('T', 0xa3)
889*4882a593Smuzhiyun #define SNDRV_TIMER_IOCTL_TREAD64	_IOW('T', 0xa4, int)
890*4882a593Smuzhiyun 
891*4882a593Smuzhiyun #if __BITS_PER_LONG == 64
892*4882a593Smuzhiyun #define SNDRV_TIMER_IOCTL_TREAD SNDRV_TIMER_IOCTL_TREAD_OLD
893*4882a593Smuzhiyun #else
894*4882a593Smuzhiyun #define SNDRV_TIMER_IOCTL_TREAD ((sizeof(__kernel_long_t) >= sizeof(time_t)) ? \
895*4882a593Smuzhiyun 				 SNDRV_TIMER_IOCTL_TREAD_OLD : \
896*4882a593Smuzhiyun 				 SNDRV_TIMER_IOCTL_TREAD64)
897*4882a593Smuzhiyun #endif
898*4882a593Smuzhiyun 
899*4882a593Smuzhiyun struct snd_timer_read {
900*4882a593Smuzhiyun 	unsigned int resolution;
901*4882a593Smuzhiyun 	unsigned int ticks;
902*4882a593Smuzhiyun };
903*4882a593Smuzhiyun 
904*4882a593Smuzhiyun enum {
905*4882a593Smuzhiyun 	SNDRV_TIMER_EVENT_RESOLUTION = 0,	/* val = resolution in ns */
906*4882a593Smuzhiyun 	SNDRV_TIMER_EVENT_TICK,			/* val = ticks */
907*4882a593Smuzhiyun 	SNDRV_TIMER_EVENT_START,		/* val = resolution in ns */
908*4882a593Smuzhiyun 	SNDRV_TIMER_EVENT_STOP,			/* val = 0 */
909*4882a593Smuzhiyun 	SNDRV_TIMER_EVENT_CONTINUE,		/* val = resolution in ns */
910*4882a593Smuzhiyun 	SNDRV_TIMER_EVENT_PAUSE,		/* val = 0 */
911*4882a593Smuzhiyun 	SNDRV_TIMER_EVENT_EARLY,		/* val = 0, early event */
912*4882a593Smuzhiyun 	SNDRV_TIMER_EVENT_SUSPEND,		/* val = 0 */
913*4882a593Smuzhiyun 	SNDRV_TIMER_EVENT_RESUME,		/* val = resolution in ns */
914*4882a593Smuzhiyun 	/* master timer events for slave timer instances */
915*4882a593Smuzhiyun 	SNDRV_TIMER_EVENT_MSTART = SNDRV_TIMER_EVENT_START + 10,
916*4882a593Smuzhiyun 	SNDRV_TIMER_EVENT_MSTOP = SNDRV_TIMER_EVENT_STOP + 10,
917*4882a593Smuzhiyun 	SNDRV_TIMER_EVENT_MCONTINUE = SNDRV_TIMER_EVENT_CONTINUE + 10,
918*4882a593Smuzhiyun 	SNDRV_TIMER_EVENT_MPAUSE = SNDRV_TIMER_EVENT_PAUSE + 10,
919*4882a593Smuzhiyun 	SNDRV_TIMER_EVENT_MSUSPEND = SNDRV_TIMER_EVENT_SUSPEND + 10,
920*4882a593Smuzhiyun 	SNDRV_TIMER_EVENT_MRESUME = SNDRV_TIMER_EVENT_RESUME + 10,
921*4882a593Smuzhiyun };
922*4882a593Smuzhiyun 
923*4882a593Smuzhiyun #ifndef __KERNEL__
924*4882a593Smuzhiyun struct snd_timer_tread {
925*4882a593Smuzhiyun 	int event;
926*4882a593Smuzhiyun 	__time_pad pad1;
927*4882a593Smuzhiyun 	struct timespec tstamp;
928*4882a593Smuzhiyun 	unsigned int val;
929*4882a593Smuzhiyun 	__time_pad pad2;
930*4882a593Smuzhiyun };
931*4882a593Smuzhiyun #endif
932*4882a593Smuzhiyun 
933*4882a593Smuzhiyun /****************************************************************************
934*4882a593Smuzhiyun  *                                                                          *
935*4882a593Smuzhiyun  *        Section for driver control interface - /dev/snd/control?          *
936*4882a593Smuzhiyun  *                                                                          *
937*4882a593Smuzhiyun  ****************************************************************************/
938*4882a593Smuzhiyun 
939*4882a593Smuzhiyun #define SNDRV_CTL_VERSION		SNDRV_PROTOCOL_VERSION(2, 0, 8)
940*4882a593Smuzhiyun 
941*4882a593Smuzhiyun struct snd_ctl_card_info {
942*4882a593Smuzhiyun 	int card;			/* card number */
943*4882a593Smuzhiyun 	int pad;			/* reserved for future (was type) */
944*4882a593Smuzhiyun 	unsigned char id[16];		/* ID of card (user selectable) */
945*4882a593Smuzhiyun 	unsigned char driver[16];	/* Driver name */
946*4882a593Smuzhiyun 	unsigned char name[32];		/* Short name of soundcard */
947*4882a593Smuzhiyun 	unsigned char longname[80];	/* name + info text about soundcard */
948*4882a593Smuzhiyun 	unsigned char reserved_[16];	/* reserved for future (was ID of mixer) */
949*4882a593Smuzhiyun 	unsigned char mixername[80];	/* visual mixer identification */
950*4882a593Smuzhiyun 	unsigned char components[128];	/* card components / fine identification, delimited with one space (AC97 etc..) */
951*4882a593Smuzhiyun };
952*4882a593Smuzhiyun 
953*4882a593Smuzhiyun typedef int __bitwise snd_ctl_elem_type_t;
954*4882a593Smuzhiyun #define	SNDRV_CTL_ELEM_TYPE_NONE	((__force snd_ctl_elem_type_t) 0) /* invalid */
955*4882a593Smuzhiyun #define	SNDRV_CTL_ELEM_TYPE_BOOLEAN	((__force snd_ctl_elem_type_t) 1) /* boolean type */
956*4882a593Smuzhiyun #define	SNDRV_CTL_ELEM_TYPE_INTEGER	((__force snd_ctl_elem_type_t) 2) /* integer type */
957*4882a593Smuzhiyun #define	SNDRV_CTL_ELEM_TYPE_ENUMERATED	((__force snd_ctl_elem_type_t) 3) /* enumerated type */
958*4882a593Smuzhiyun #define	SNDRV_CTL_ELEM_TYPE_BYTES	((__force snd_ctl_elem_type_t) 4) /* byte array */
959*4882a593Smuzhiyun #define	SNDRV_CTL_ELEM_TYPE_IEC958	((__force snd_ctl_elem_type_t) 5) /* IEC958 (S/PDIF) setup */
960*4882a593Smuzhiyun #define	SNDRV_CTL_ELEM_TYPE_INTEGER64	((__force snd_ctl_elem_type_t) 6) /* 64-bit integer type */
961*4882a593Smuzhiyun #define	SNDRV_CTL_ELEM_TYPE_LAST	SNDRV_CTL_ELEM_TYPE_INTEGER64
962*4882a593Smuzhiyun 
963*4882a593Smuzhiyun typedef int __bitwise snd_ctl_elem_iface_t;
964*4882a593Smuzhiyun #define	SNDRV_CTL_ELEM_IFACE_CARD	((__force snd_ctl_elem_iface_t) 0) /* global control */
965*4882a593Smuzhiyun #define	SNDRV_CTL_ELEM_IFACE_HWDEP	((__force snd_ctl_elem_iface_t) 1) /* hardware dependent device */
966*4882a593Smuzhiyun #define	SNDRV_CTL_ELEM_IFACE_MIXER	((__force snd_ctl_elem_iface_t) 2) /* virtual mixer device */
967*4882a593Smuzhiyun #define	SNDRV_CTL_ELEM_IFACE_PCM	((__force snd_ctl_elem_iface_t) 3) /* PCM device */
968*4882a593Smuzhiyun #define	SNDRV_CTL_ELEM_IFACE_RAWMIDI	((__force snd_ctl_elem_iface_t) 4) /* RawMidi device */
969*4882a593Smuzhiyun #define	SNDRV_CTL_ELEM_IFACE_TIMER	((__force snd_ctl_elem_iface_t) 5) /* timer device */
970*4882a593Smuzhiyun #define	SNDRV_CTL_ELEM_IFACE_SEQUENCER	((__force snd_ctl_elem_iface_t) 6) /* sequencer client */
971*4882a593Smuzhiyun #define	SNDRV_CTL_ELEM_IFACE_LAST	SNDRV_CTL_ELEM_IFACE_SEQUENCER
972*4882a593Smuzhiyun 
973*4882a593Smuzhiyun #define SNDRV_CTL_ELEM_ACCESS_READ		(1<<0)
974*4882a593Smuzhiyun #define SNDRV_CTL_ELEM_ACCESS_WRITE		(1<<1)
975*4882a593Smuzhiyun #define SNDRV_CTL_ELEM_ACCESS_READWRITE		(SNDRV_CTL_ELEM_ACCESS_READ|SNDRV_CTL_ELEM_ACCESS_WRITE)
976*4882a593Smuzhiyun #define SNDRV_CTL_ELEM_ACCESS_VOLATILE		(1<<2)	/* control value may be changed without a notification */
977*4882a593Smuzhiyun // (1 << 3) is unused.
978*4882a593Smuzhiyun #define SNDRV_CTL_ELEM_ACCESS_TLV_READ		(1<<4)	/* TLV read is possible */
979*4882a593Smuzhiyun #define SNDRV_CTL_ELEM_ACCESS_TLV_WRITE		(1<<5)	/* TLV write is possible */
980*4882a593Smuzhiyun #define SNDRV_CTL_ELEM_ACCESS_TLV_READWRITE	(SNDRV_CTL_ELEM_ACCESS_TLV_READ|SNDRV_CTL_ELEM_ACCESS_TLV_WRITE)
981*4882a593Smuzhiyun #define SNDRV_CTL_ELEM_ACCESS_TLV_COMMAND	(1<<6)	/* TLV command is possible */
982*4882a593Smuzhiyun #define SNDRV_CTL_ELEM_ACCESS_INACTIVE		(1<<8)	/* control does actually nothing, but may be updated */
983*4882a593Smuzhiyun #define SNDRV_CTL_ELEM_ACCESS_LOCK		(1<<9)	/* write lock */
984*4882a593Smuzhiyun #define SNDRV_CTL_ELEM_ACCESS_OWNER		(1<<10)	/* write lock owner */
985*4882a593Smuzhiyun #define SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK	(1<<28)	/* kernel use a TLV callback */
986*4882a593Smuzhiyun #define SNDRV_CTL_ELEM_ACCESS_USER		(1<<29) /* user space element */
987*4882a593Smuzhiyun /* bits 30 and 31 are obsoleted (for indirect access) */
988*4882a593Smuzhiyun 
989*4882a593Smuzhiyun /* for further details see the ACPI and PCI power management specification */
990*4882a593Smuzhiyun #define SNDRV_CTL_POWER_D0		0x0000	/* full On */
991*4882a593Smuzhiyun #define SNDRV_CTL_POWER_D1		0x0100	/* partial On */
992*4882a593Smuzhiyun #define SNDRV_CTL_POWER_D2		0x0200	/* partial On */
993*4882a593Smuzhiyun #define SNDRV_CTL_POWER_D3		0x0300	/* Off */
994*4882a593Smuzhiyun #define SNDRV_CTL_POWER_D3hot		(SNDRV_CTL_POWER_D3|0x0000)	/* Off, with power */
995*4882a593Smuzhiyun #define SNDRV_CTL_POWER_D3cold		(SNDRV_CTL_POWER_D3|0x0001)	/* Off, without power */
996*4882a593Smuzhiyun 
997*4882a593Smuzhiyun #define SNDRV_CTL_ELEM_ID_NAME_MAXLEN	44
998*4882a593Smuzhiyun 
999*4882a593Smuzhiyun struct snd_ctl_elem_id {
1000*4882a593Smuzhiyun 	unsigned int numid;		/* numeric identifier, zero = invalid */
1001*4882a593Smuzhiyun 	snd_ctl_elem_iface_t iface;	/* interface identifier */
1002*4882a593Smuzhiyun 	unsigned int device;		/* device/client number */
1003*4882a593Smuzhiyun 	unsigned int subdevice;		/* subdevice (substream) number */
1004*4882a593Smuzhiyun 	unsigned char name[SNDRV_CTL_ELEM_ID_NAME_MAXLEN];		/* ASCII name of item */
1005*4882a593Smuzhiyun 	unsigned int index;		/* index of item */
1006*4882a593Smuzhiyun };
1007*4882a593Smuzhiyun 
1008*4882a593Smuzhiyun struct snd_ctl_elem_list {
1009*4882a593Smuzhiyun 	unsigned int offset;		/* W: first element ID to get */
1010*4882a593Smuzhiyun 	unsigned int space;		/* W: count of element IDs to get */
1011*4882a593Smuzhiyun 	unsigned int used;		/* R: count of element IDs set */
1012*4882a593Smuzhiyun 	unsigned int count;		/* R: count of all elements */
1013*4882a593Smuzhiyun 	struct snd_ctl_elem_id __user *pids; /* R: IDs */
1014*4882a593Smuzhiyun 	unsigned char reserved[50];
1015*4882a593Smuzhiyun };
1016*4882a593Smuzhiyun 
1017*4882a593Smuzhiyun struct snd_ctl_elem_info {
1018*4882a593Smuzhiyun 	struct snd_ctl_elem_id id;	/* W: element ID */
1019*4882a593Smuzhiyun 	snd_ctl_elem_type_t type;	/* R: value type - SNDRV_CTL_ELEM_TYPE_* */
1020*4882a593Smuzhiyun 	unsigned int access;		/* R: value access (bitmask) - SNDRV_CTL_ELEM_ACCESS_* */
1021*4882a593Smuzhiyun 	unsigned int count;		/* count of values */
1022*4882a593Smuzhiyun 	__kernel_pid_t owner;		/* owner's PID of this control */
1023*4882a593Smuzhiyun 	union {
1024*4882a593Smuzhiyun 		struct {
1025*4882a593Smuzhiyun 			long min;		/* R: minimum value */
1026*4882a593Smuzhiyun 			long max;		/* R: maximum value */
1027*4882a593Smuzhiyun 			long step;		/* R: step (0 variable) */
1028*4882a593Smuzhiyun 		} integer;
1029*4882a593Smuzhiyun 		struct {
1030*4882a593Smuzhiyun 			long long min;		/* R: minimum value */
1031*4882a593Smuzhiyun 			long long max;		/* R: maximum value */
1032*4882a593Smuzhiyun 			long long step;		/* R: step (0 variable) */
1033*4882a593Smuzhiyun 		} integer64;
1034*4882a593Smuzhiyun 		struct {
1035*4882a593Smuzhiyun 			unsigned int items;	/* R: number of items */
1036*4882a593Smuzhiyun 			unsigned int item;	/* W: item number */
1037*4882a593Smuzhiyun 			char name[64];		/* R: value name */
1038*4882a593Smuzhiyun 			__u64 names_ptr;	/* W: names list (ELEM_ADD only) */
1039*4882a593Smuzhiyun 			unsigned int names_length;
1040*4882a593Smuzhiyun 		} enumerated;
1041*4882a593Smuzhiyun 		unsigned char reserved[128];
1042*4882a593Smuzhiyun 	} value;
1043*4882a593Smuzhiyun 	unsigned char reserved[64];
1044*4882a593Smuzhiyun };
1045*4882a593Smuzhiyun 
1046*4882a593Smuzhiyun struct snd_ctl_elem_value {
1047*4882a593Smuzhiyun 	struct snd_ctl_elem_id id;	/* W: element ID */
1048*4882a593Smuzhiyun 	unsigned int indirect: 1;	/* W: indirect access - obsoleted */
1049*4882a593Smuzhiyun 	union {
1050*4882a593Smuzhiyun 		union {
1051*4882a593Smuzhiyun 			long value[128];
1052*4882a593Smuzhiyun 			long *value_ptr;	/* obsoleted */
1053*4882a593Smuzhiyun 		} integer;
1054*4882a593Smuzhiyun 		union {
1055*4882a593Smuzhiyun 			long long value[64];
1056*4882a593Smuzhiyun 			long long *value_ptr;	/* obsoleted */
1057*4882a593Smuzhiyun 		} integer64;
1058*4882a593Smuzhiyun 		union {
1059*4882a593Smuzhiyun 			unsigned int item[128];
1060*4882a593Smuzhiyun 			unsigned int *item_ptr;	/* obsoleted */
1061*4882a593Smuzhiyun 		} enumerated;
1062*4882a593Smuzhiyun 		union {
1063*4882a593Smuzhiyun 			unsigned char data[512];
1064*4882a593Smuzhiyun 			unsigned char *data_ptr;	/* obsoleted */
1065*4882a593Smuzhiyun 		} bytes;
1066*4882a593Smuzhiyun 		struct snd_aes_iec958 iec958;
1067*4882a593Smuzhiyun 	} value;		/* RO */
1068*4882a593Smuzhiyun 	unsigned char reserved[128];
1069*4882a593Smuzhiyun };
1070*4882a593Smuzhiyun 
1071*4882a593Smuzhiyun struct snd_ctl_tlv {
1072*4882a593Smuzhiyun 	unsigned int numid;	/* control element numeric identification */
1073*4882a593Smuzhiyun 	unsigned int length;	/* in bytes aligned to 4 */
1074*4882a593Smuzhiyun 	unsigned int tlv[0];	/* first TLV */
1075*4882a593Smuzhiyun };
1076*4882a593Smuzhiyun 
1077*4882a593Smuzhiyun #define SNDRV_CTL_IOCTL_PVERSION	_IOR('U', 0x00, int)
1078*4882a593Smuzhiyun #define SNDRV_CTL_IOCTL_CARD_INFO	_IOR('U', 0x01, struct snd_ctl_card_info)
1079*4882a593Smuzhiyun #define SNDRV_CTL_IOCTL_ELEM_LIST	_IOWR('U', 0x10, struct snd_ctl_elem_list)
1080*4882a593Smuzhiyun #define SNDRV_CTL_IOCTL_ELEM_INFO	_IOWR('U', 0x11, struct snd_ctl_elem_info)
1081*4882a593Smuzhiyun #define SNDRV_CTL_IOCTL_ELEM_READ	_IOWR('U', 0x12, struct snd_ctl_elem_value)
1082*4882a593Smuzhiyun #define SNDRV_CTL_IOCTL_ELEM_WRITE	_IOWR('U', 0x13, struct snd_ctl_elem_value)
1083*4882a593Smuzhiyun #define SNDRV_CTL_IOCTL_ELEM_LOCK	_IOW('U', 0x14, struct snd_ctl_elem_id)
1084*4882a593Smuzhiyun #define SNDRV_CTL_IOCTL_ELEM_UNLOCK	_IOW('U', 0x15, struct snd_ctl_elem_id)
1085*4882a593Smuzhiyun #define SNDRV_CTL_IOCTL_SUBSCRIBE_EVENTS _IOWR('U', 0x16, int)
1086*4882a593Smuzhiyun #define SNDRV_CTL_IOCTL_ELEM_ADD	_IOWR('U', 0x17, struct snd_ctl_elem_info)
1087*4882a593Smuzhiyun #define SNDRV_CTL_IOCTL_ELEM_REPLACE	_IOWR('U', 0x18, struct snd_ctl_elem_info)
1088*4882a593Smuzhiyun #define SNDRV_CTL_IOCTL_ELEM_REMOVE	_IOWR('U', 0x19, struct snd_ctl_elem_id)
1089*4882a593Smuzhiyun #define SNDRV_CTL_IOCTL_TLV_READ	_IOWR('U', 0x1a, struct snd_ctl_tlv)
1090*4882a593Smuzhiyun #define SNDRV_CTL_IOCTL_TLV_WRITE	_IOWR('U', 0x1b, struct snd_ctl_tlv)
1091*4882a593Smuzhiyun #define SNDRV_CTL_IOCTL_TLV_COMMAND	_IOWR('U', 0x1c, struct snd_ctl_tlv)
1092*4882a593Smuzhiyun #define SNDRV_CTL_IOCTL_HWDEP_NEXT_DEVICE _IOWR('U', 0x20, int)
1093*4882a593Smuzhiyun #define SNDRV_CTL_IOCTL_HWDEP_INFO	_IOR('U', 0x21, struct snd_hwdep_info)
1094*4882a593Smuzhiyun #define SNDRV_CTL_IOCTL_PCM_NEXT_DEVICE	_IOR('U', 0x30, int)
1095*4882a593Smuzhiyun #define SNDRV_CTL_IOCTL_PCM_INFO	_IOWR('U', 0x31, struct snd_pcm_info)
1096*4882a593Smuzhiyun #define SNDRV_CTL_IOCTL_PCM_PREFER_SUBDEVICE _IOW('U', 0x32, int)
1097*4882a593Smuzhiyun #define SNDRV_CTL_IOCTL_RAWMIDI_NEXT_DEVICE _IOWR('U', 0x40, int)
1098*4882a593Smuzhiyun #define SNDRV_CTL_IOCTL_RAWMIDI_INFO	_IOWR('U', 0x41, struct snd_rawmidi_info)
1099*4882a593Smuzhiyun #define SNDRV_CTL_IOCTL_RAWMIDI_PREFER_SUBDEVICE _IOW('U', 0x42, int)
1100*4882a593Smuzhiyun #define SNDRV_CTL_IOCTL_POWER		_IOWR('U', 0xd0, int)
1101*4882a593Smuzhiyun #define SNDRV_CTL_IOCTL_POWER_STATE	_IOR('U', 0xd1, int)
1102*4882a593Smuzhiyun 
1103*4882a593Smuzhiyun /*
1104*4882a593Smuzhiyun  *  Read interface.
1105*4882a593Smuzhiyun  */
1106*4882a593Smuzhiyun 
1107*4882a593Smuzhiyun enum sndrv_ctl_event_type {
1108*4882a593Smuzhiyun 	SNDRV_CTL_EVENT_ELEM = 0,
1109*4882a593Smuzhiyun 	SNDRV_CTL_EVENT_LAST = SNDRV_CTL_EVENT_ELEM,
1110*4882a593Smuzhiyun };
1111*4882a593Smuzhiyun 
1112*4882a593Smuzhiyun #define SNDRV_CTL_EVENT_MASK_VALUE	(1<<0)	/* element value was changed */
1113*4882a593Smuzhiyun #define SNDRV_CTL_EVENT_MASK_INFO	(1<<1)	/* element info was changed */
1114*4882a593Smuzhiyun #define SNDRV_CTL_EVENT_MASK_ADD	(1<<2)	/* element was added */
1115*4882a593Smuzhiyun #define SNDRV_CTL_EVENT_MASK_TLV	(1<<3)	/* element TLV tree was changed */
1116*4882a593Smuzhiyun #define SNDRV_CTL_EVENT_MASK_REMOVE	(~0U)	/* element was removed */
1117*4882a593Smuzhiyun 
1118*4882a593Smuzhiyun struct snd_ctl_event {
1119*4882a593Smuzhiyun 	int type;	/* event type - SNDRV_CTL_EVENT_* */
1120*4882a593Smuzhiyun 	union {
1121*4882a593Smuzhiyun 		struct {
1122*4882a593Smuzhiyun 			unsigned int mask;
1123*4882a593Smuzhiyun 			struct snd_ctl_elem_id id;
1124*4882a593Smuzhiyun 		} elem;
1125*4882a593Smuzhiyun 		unsigned char data8[60];
1126*4882a593Smuzhiyun 	} data;
1127*4882a593Smuzhiyun };
1128*4882a593Smuzhiyun 
1129*4882a593Smuzhiyun /*
1130*4882a593Smuzhiyun  *  Control names
1131*4882a593Smuzhiyun  */
1132*4882a593Smuzhiyun 
1133*4882a593Smuzhiyun #define SNDRV_CTL_NAME_NONE				""
1134*4882a593Smuzhiyun #define SNDRV_CTL_NAME_PLAYBACK				"Playback "
1135*4882a593Smuzhiyun #define SNDRV_CTL_NAME_CAPTURE				"Capture "
1136*4882a593Smuzhiyun 
1137*4882a593Smuzhiyun #define SNDRV_CTL_NAME_IEC958_NONE			""
1138*4882a593Smuzhiyun #define SNDRV_CTL_NAME_IEC958_SWITCH			"Switch"
1139*4882a593Smuzhiyun #define SNDRV_CTL_NAME_IEC958_VOLUME			"Volume"
1140*4882a593Smuzhiyun #define SNDRV_CTL_NAME_IEC958_DEFAULT			"Default"
1141*4882a593Smuzhiyun #define SNDRV_CTL_NAME_IEC958_MASK			"Mask"
1142*4882a593Smuzhiyun #define SNDRV_CTL_NAME_IEC958_CON_MASK			"Con Mask"
1143*4882a593Smuzhiyun #define SNDRV_CTL_NAME_IEC958_PRO_MASK			"Pro Mask"
1144*4882a593Smuzhiyun #define SNDRV_CTL_NAME_IEC958_PCM_STREAM		"PCM Stream"
1145*4882a593Smuzhiyun #define SNDRV_CTL_NAME_IEC958(expl,direction,what)	"IEC958 " expl SNDRV_CTL_NAME_##direction SNDRV_CTL_NAME_IEC958_##what
1146*4882a593Smuzhiyun 
1147*4882a593Smuzhiyun #endif /* _UAPI__SOUND_ASOUND_H */
1148