1*4882a593Smuzhiyun /* SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR Linux-OpenIB) */ 2*4882a593Smuzhiyun /* QLogic qedr NIC Driver 3*4882a593Smuzhiyun * Copyright (c) 2015-2016 QLogic Corporation 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * This software is available to you under a choice of one of two 6*4882a593Smuzhiyun * licenses. You may choose to be licensed under the terms of the GNU 7*4882a593Smuzhiyun * General Public License (GPL) Version 2, available from the file 8*4882a593Smuzhiyun * COPYING in the main directory of this source tree, or the 9*4882a593Smuzhiyun * OpenIB.org BSD license below: 10*4882a593Smuzhiyun * 11*4882a593Smuzhiyun * Redistribution and use in source and binary forms, with or 12*4882a593Smuzhiyun * without modification, are permitted provided that the following 13*4882a593Smuzhiyun * conditions are met: 14*4882a593Smuzhiyun * 15*4882a593Smuzhiyun * - Redistributions of source code must retain the above 16*4882a593Smuzhiyun * copyright notice, this list of conditions and the following 17*4882a593Smuzhiyun * disclaimer. 18*4882a593Smuzhiyun * 19*4882a593Smuzhiyun * - Redistributions in binary form must reproduce the above 20*4882a593Smuzhiyun * copyright notice, this list of conditions and the following 21*4882a593Smuzhiyun * disclaimer in the documentation and /or other materials 22*4882a593Smuzhiyun * provided with the distribution. 23*4882a593Smuzhiyun * 24*4882a593Smuzhiyun * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 25*4882a593Smuzhiyun * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 26*4882a593Smuzhiyun * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 27*4882a593Smuzhiyun * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 28*4882a593Smuzhiyun * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 29*4882a593Smuzhiyun * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 30*4882a593Smuzhiyun * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 31*4882a593Smuzhiyun * SOFTWARE. 32*4882a593Smuzhiyun */ 33*4882a593Smuzhiyun #ifndef __QEDR_USER_H__ 34*4882a593Smuzhiyun #define __QEDR_USER_H__ 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun #include <linux/types.h> 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun #define QEDR_ABI_VERSION (8) 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun /* user kernel communication data structures. */ 41*4882a593Smuzhiyun enum qedr_alloc_ucontext_flags { 42*4882a593Smuzhiyun QEDR_ALLOC_UCTX_EDPM_MODE = 1 << 0, 43*4882a593Smuzhiyun QEDR_ALLOC_UCTX_DB_REC = 1 << 1, 44*4882a593Smuzhiyun QEDR_SUPPORT_DPM_SIZES = 1 << 2, 45*4882a593Smuzhiyun }; 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun struct qedr_alloc_ucontext_req { 48*4882a593Smuzhiyun __u32 context_flags; 49*4882a593Smuzhiyun __u32 reserved; 50*4882a593Smuzhiyun }; 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun #define QEDR_LDPM_MAX_SIZE (8192) 53*4882a593Smuzhiyun #define QEDR_EDPM_TRANS_SIZE (64) 54*4882a593Smuzhiyun #define QEDR_EDPM_MAX_SIZE (ROCE_REQ_MAX_INLINE_DATA_SIZE) 55*4882a593Smuzhiyun 56*4882a593Smuzhiyun enum qedr_rdma_dpm_type { 57*4882a593Smuzhiyun QEDR_DPM_TYPE_NONE = 0, 58*4882a593Smuzhiyun QEDR_DPM_TYPE_ROCE_ENHANCED = 1 << 0, 59*4882a593Smuzhiyun QEDR_DPM_TYPE_ROCE_LEGACY = 1 << 1, 60*4882a593Smuzhiyun QEDR_DPM_TYPE_IWARP_LEGACY = 1 << 2, 61*4882a593Smuzhiyun QEDR_DPM_TYPE_ROCE_EDPM_MODE = 1 << 3, 62*4882a593Smuzhiyun QEDR_DPM_SIZES_SET = 1 << 4, 63*4882a593Smuzhiyun }; 64*4882a593Smuzhiyun 65*4882a593Smuzhiyun struct qedr_alloc_ucontext_resp { 66*4882a593Smuzhiyun __aligned_u64 db_pa; 67*4882a593Smuzhiyun __u32 db_size; 68*4882a593Smuzhiyun 69*4882a593Smuzhiyun __u32 max_send_wr; 70*4882a593Smuzhiyun __u32 max_recv_wr; 71*4882a593Smuzhiyun __u32 max_srq_wr; 72*4882a593Smuzhiyun __u32 sges_per_send_wr; 73*4882a593Smuzhiyun __u32 sges_per_recv_wr; 74*4882a593Smuzhiyun __u32 sges_per_srq_wr; 75*4882a593Smuzhiyun __u32 max_cqes; 76*4882a593Smuzhiyun __u8 dpm_flags; 77*4882a593Smuzhiyun __u8 wids_enabled; 78*4882a593Smuzhiyun __u16 wid_count; 79*4882a593Smuzhiyun __u16 ldpm_limit_size; 80*4882a593Smuzhiyun __u8 edpm_trans_size; 81*4882a593Smuzhiyun __u8 reserved; 82*4882a593Smuzhiyun __u16 edpm_limit_size; 83*4882a593Smuzhiyun __u8 padding[6]; 84*4882a593Smuzhiyun }; 85*4882a593Smuzhiyun 86*4882a593Smuzhiyun struct qedr_alloc_pd_ureq { 87*4882a593Smuzhiyun __aligned_u64 rsvd1; 88*4882a593Smuzhiyun }; 89*4882a593Smuzhiyun 90*4882a593Smuzhiyun struct qedr_alloc_pd_uresp { 91*4882a593Smuzhiyun __u32 pd_id; 92*4882a593Smuzhiyun __u32 reserved; 93*4882a593Smuzhiyun }; 94*4882a593Smuzhiyun 95*4882a593Smuzhiyun struct qedr_create_cq_ureq { 96*4882a593Smuzhiyun __aligned_u64 addr; 97*4882a593Smuzhiyun __aligned_u64 len; 98*4882a593Smuzhiyun }; 99*4882a593Smuzhiyun 100*4882a593Smuzhiyun struct qedr_create_cq_uresp { 101*4882a593Smuzhiyun __u32 db_offset; 102*4882a593Smuzhiyun __u16 icid; 103*4882a593Smuzhiyun __u16 reserved; 104*4882a593Smuzhiyun __aligned_u64 db_rec_addr; 105*4882a593Smuzhiyun }; 106*4882a593Smuzhiyun 107*4882a593Smuzhiyun struct qedr_create_qp_ureq { 108*4882a593Smuzhiyun __u32 qp_handle_hi; 109*4882a593Smuzhiyun __u32 qp_handle_lo; 110*4882a593Smuzhiyun 111*4882a593Smuzhiyun /* SQ */ 112*4882a593Smuzhiyun /* user space virtual address of SQ buffer */ 113*4882a593Smuzhiyun __aligned_u64 sq_addr; 114*4882a593Smuzhiyun 115*4882a593Smuzhiyun /* length of SQ buffer */ 116*4882a593Smuzhiyun __aligned_u64 sq_len; 117*4882a593Smuzhiyun 118*4882a593Smuzhiyun /* RQ */ 119*4882a593Smuzhiyun /* user space virtual address of RQ buffer */ 120*4882a593Smuzhiyun __aligned_u64 rq_addr; 121*4882a593Smuzhiyun 122*4882a593Smuzhiyun /* length of RQ buffer */ 123*4882a593Smuzhiyun __aligned_u64 rq_len; 124*4882a593Smuzhiyun }; 125*4882a593Smuzhiyun 126*4882a593Smuzhiyun struct qedr_create_qp_uresp { 127*4882a593Smuzhiyun __u32 qp_id; 128*4882a593Smuzhiyun __u32 atomic_supported; 129*4882a593Smuzhiyun 130*4882a593Smuzhiyun /* SQ */ 131*4882a593Smuzhiyun __u32 sq_db_offset; 132*4882a593Smuzhiyun __u16 sq_icid; 133*4882a593Smuzhiyun 134*4882a593Smuzhiyun /* RQ */ 135*4882a593Smuzhiyun __u32 rq_db_offset; 136*4882a593Smuzhiyun __u16 rq_icid; 137*4882a593Smuzhiyun 138*4882a593Smuzhiyun __u32 rq_db2_offset; 139*4882a593Smuzhiyun __u32 reserved; 140*4882a593Smuzhiyun 141*4882a593Smuzhiyun /* address of SQ doorbell recovery user entry */ 142*4882a593Smuzhiyun __aligned_u64 sq_db_rec_addr; 143*4882a593Smuzhiyun 144*4882a593Smuzhiyun /* address of RQ doorbell recovery user entry */ 145*4882a593Smuzhiyun __aligned_u64 rq_db_rec_addr; 146*4882a593Smuzhiyun 147*4882a593Smuzhiyun }; 148*4882a593Smuzhiyun 149*4882a593Smuzhiyun struct qedr_create_srq_ureq { 150*4882a593Smuzhiyun /* user space virtual address of producer pair */ 151*4882a593Smuzhiyun __aligned_u64 prod_pair_addr; 152*4882a593Smuzhiyun 153*4882a593Smuzhiyun /* user space virtual address of SRQ buffer */ 154*4882a593Smuzhiyun __aligned_u64 srq_addr; 155*4882a593Smuzhiyun 156*4882a593Smuzhiyun /* length of SRQ buffer */ 157*4882a593Smuzhiyun __aligned_u64 srq_len; 158*4882a593Smuzhiyun }; 159*4882a593Smuzhiyun 160*4882a593Smuzhiyun struct qedr_create_srq_uresp { 161*4882a593Smuzhiyun __u16 srq_id; 162*4882a593Smuzhiyun __u16 reserved0; 163*4882a593Smuzhiyun __u32 reserved1; 164*4882a593Smuzhiyun }; 165*4882a593Smuzhiyun 166*4882a593Smuzhiyun /* doorbell recovery entry allocated and populated by userspace doorbelling 167*4882a593Smuzhiyun * entities and mapped to kernel. Kernel uses this to register doorbell 168*4882a593Smuzhiyun * information with doorbell drop recovery mechanism. 169*4882a593Smuzhiyun */ 170*4882a593Smuzhiyun struct qedr_user_db_rec { 171*4882a593Smuzhiyun __aligned_u64 db_data; /* doorbell data */ 172*4882a593Smuzhiyun }; 173*4882a593Smuzhiyun 174*4882a593Smuzhiyun #endif /* __QEDR_USER_H__ */ 175